CN111158863B - Interrupt controller processing method and device and electronic equipment - Google Patents

Interrupt controller processing method and device and electronic equipment Download PDF

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Publication number
CN111158863B
CN111158863B CN201911417508.0A CN201911417508A CN111158863B CN 111158863 B CN111158863 B CN 111158863B CN 201911417508 A CN201911417508 A CN 201911417508A CN 111158863 B CN111158863 B CN 111158863B
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virtual machine
interrupt
interrupt controller
virtual
processor
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CN111158863A (en
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高翔
朱琛
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Loongson Technology Corp Ltd
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Loongson Technology Corp Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45579I/O management, e.g. providing access to device drivers or storage

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

According to the processing method and device for the interrupt controller and the electronic equipment, the virtual processor interrupt is monitored through the virtual machine, and the interrupt processing program in the virtual machine is started, so that the interrupt processing program initiates a reading request for a state register of the interrupt controller; when the kernel virtual machine captures that the virtual processor is in a page fault abnormality and an address of the page fault abnormality points to the interrupt controller, and when the running state of the virtual processor is in an interrupt state, a page fault processing program of the kernel virtual machine is started and a preset memory address in the virtual machine is filled into a page table of the virtual machine so that the attribute of the page table is set to be read-only, and therefore the information of a state register of the interrupt controller of the virtual machine can be read quickly by utilizing the preset memory address and the attribute of the page table, and the problem that the information of the state register can be read only after the virtual machine needs to exit to a VMM in the prior art is avoided.

Description

Interrupt controller processing method and device and electronic equipment
Technical Field
The present disclosure relates to computer technologies, and in particular, to a method and an apparatus for processing an interrupt controller, and an electronic device.
Background
With the continuous development of virtual machine technology, the virtual machine technology can be widely applied to scenes such as data centers, cloud computing services and the like. Each virtual machine instance managed by a Kernel virtual machine (Kernel-Based Virtual Machine, KVM for short) is treated by the operating system as a process. Input and Output (IO) virtualization refers to device-dependent virtualization, which essentially is the multiplexing of peripheral resources of a limited physical host by a virtual device built by a virtual machine through a virtual machine monitor (Virtual Machine Monitor, VMM) to simulate the effects of real peripheral access. While IO interrupt virtualization is part of IO virtualization, a virtual machine uses an interrupt controller that will use the virtual machine to manage multiple IO peripheral interrupts.
FIG. 1 is a schematic diagram of a prior art virtual machine interrupt handling process; as shown in FIG. 1, the bold line in the flow diagram represents actions that may cause processor exceptions or state switching, where the solid line represents accessing registers of the interrupt controller. QEMU is VMM (virtual machine monitor) on a host computer, emulates a CPU by dynamic binary translation, and provides a series of hardware models that make guests think that himself is directly crossed with hardware, in fact, crossed with hardware emulated by QEMU, which translates these instructions to real hardware for operation. In this mode, the gusts os can interact with hard disk, network card, CPU, CD-ROM, audio device and USB device on the host. Because KVM is a hardware-assisted virtualization technology, it is mainly responsible for complex CPU and memory virtualization, while Qemu is responsible for I/O virtualization, and both cooperate to exert their own advantages, thereby complement each other.
As can be seen from fig. 1, one register access of the interrupt controller by the virtual processor needs to go through the flow of the virtual processor- > KVM- > QEMU (VMM) - > KVM- > virtual processor, where each step needs to save several state information and thread information for restoring the virtual process to the interrupt controller.
In the prior art, in order to improve the processing efficiency, the behavior of the interrupt controller can be directly simulated in the KVM. FIG. 2 is a schematic diagram illustrating another prior art virtual machine interrupt handling process; in particular, during the process that the virtual processor in the interrupt response stage accesses the register of the interrupt controller, the KVM may directly return data to the virtual processor, without going through QEMU (open source virtual machine), and the simulation flow is simplified into a virtual processor- > KVM- > virtual processor.
However, in the response process of the IO virtual interrupt, the virtual processor reads the register to obtain the state of the interrupt controller, and the processing flow is still not simplified enough, that is, although the state of the interrupt controller reaches the KVM before the interrupt is generated, the KVM still needs to be passed when the interrupt state is read. That is, in the conventional method, there is still a problem of state switching.
Disclosure of Invention
Aiming at the technical problems, the disclosure provides a processing method and device of an interrupt controller and electronic equipment.
In a first aspect, the present disclosure provides a method for processing an interrupt controller of a virtual machine, including:
the virtual machine monitors the virtual processor interrupt, and starts an interrupt processing program in the virtual machine, so that the interrupt processing program initiates a reading request to a state register of the interrupt controller;
when the kernel virtual machine captures that the virtual processor is in page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of a state register of the interrupt controller in the virtual machine;
when the running state is an interrupt state, a page fault processing program of an interrupt controller is started and a preset memory address in a virtual machine is filled into a page table of the virtual machine, so that the attribute of the page table is set to be read-only;
and returning to the step that the interrupt processing program initiates a read request to the state register of the interrupt controller, and outputting a read result.
In an alternative example, when the attribute of the page table of the virtual machine is read-only, and the virtual machine performs a write operation to the status register of the interrupt controller, the method further includes:
the kernel virtual machine calls a pre-stored interrupt controller logic code to update the running state of the virtual processor into a non-interrupt state according to the preset memory address;
and the virtual machine executes the writing operation on the state register of the interrupt controller.
In an alternative example, the virtual machine monitors the virtual processor interrupt, and before starting the interrupt handler in the virtual machine, the method further includes:
the virtual machine receives an interrupt request sent by a physical host;
and the interrupt controller executes the hardware logic codes pre-stored in the kernel virtual machine so as to update the running state of the virtual processor into an interrupt state by the preset memory address.
In an alternative example, the virtual machine monitoring for a virtual processor interrupt includes:
and the interrupt controller sends the generated interrupt request to the virtual processor so that the virtual machine monitors the interrupt of the virtual processor.
In an alternative example, the method further comprises:
setting a preset memory address in the virtual machine, wherein the preset memory address is used for recording the running state of the virtual processor;
the preset memory address is the same as the address of the state register of the interrupt controller in the virtual machine.
In a second aspect, the present disclosure provides a processing apparatus of an interrupt controller of a virtual machine, including:
the virtual machine is used for starting an interrupt processing program in the virtual machine when the virtual processor interrupt is monitored, so that the interrupt processing program initiates a reading request for a state register of the interrupt processing program to the interrupt controller;
the kernel virtual machine is used for judging the running state of the virtual processor according to the address of the state register of the interrupt controller in the virtual machine when the virtual processor is captured to generate page fault abnormality and the address of the page fault abnormality points to the interrupt controller;
when the running state is an interrupt state, starting an unfilled page processing program of an interrupt controller in a kernel virtual machine and filling a preset memory address in the virtual machine into a page table of the virtual machine so as to set the attribute of the page table to be read-only;
the virtual machine is further configured to restart the step of the interrupt handler initiating a read request to its status register to the interrupt controller, and output a read result.
In an alternative example, the apparatus further comprises:
the kernel virtual machine is further used for calling a pre-stored hardware logic code to update the running state of the virtual processor into a non-interrupt state according to the preset memory address when the attribute of the page table of the virtual machine is read-only and the virtual machine executes writing operation on the state register of the interrupt controller;
the virtual machine is used for executing writing operation to the state register of the interrupt controller.
In an alternative example, the virtual machine is further configured to, before detecting that the virtual processor interrupts and starting an interrupt handler in the virtual machine, receive an interrupt request sent by the physical host, and the interrupt controller executes the interrupt controller logic code pre-stored in the kernel virtual machine, so as to update the preset memory address to an interrupt state from the running state of the virtual processor.
In an alternative example, the interrupt controller is further configured to send the generated interrupt request to the virtual processor, so that the virtual machine monitors the virtual processor interrupt.
In an alternative example, a preset memory address is set in the virtual machine, where the preset memory address is used to record the running state of the virtual processor;
the preset memory address is the same as the address of the state register of the interrupt controller in the virtual machine.
In a third aspect, a processing apparatus of an interrupt controller of a virtual machine includes:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to:
the virtual machine monitors the virtual processor interrupt, and starts an interrupt processing program in the virtual machine, so that the interrupt processing program initiates a reading request to a state register of the interrupt controller;
when the interrupt controller processes the read request and the page fault occurs, the kernel virtual machine judges the running state of the virtual processor according to the address of the state register of the interrupt controller in the virtual machine;
when the running state is an interrupt state, starting an unfilled page processing program of an interrupt controller in a kernel virtual machine and filling a preset memory address in the virtual machine into a page table of the virtual machine so as to set the attribute of the page table to be read-only;
and returning to the step that the interrupt processing program initiates a read request to the state register of the interrupt controller, and outputting a read result.
In a fourth aspect, the present disclosure provides an electronic device in which a processing apparatus of an interrupt controller of a virtual machine as set forth in any one of the preceding claims is installed.
In a fifth aspect, the present disclosure provides a storage medium containing computer executable instructions for performing a method as described in any one of the preceding, when executed by a computer processor.
According to the processing method and device for the interrupt controller and the electronic equipment, the virtual processor interrupt is monitored through the virtual machine, and the interrupt processing program in the virtual machine is started, so that the interrupt processing program initiates a reading request for a state register of the interrupt controller; when the kernel virtual machine captures that the virtual processor is in page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of a state register of the interrupt controller in the virtual machine; when the running state is an interrupt state, starting an unfilled page processing program of an interrupt controller in a kernel virtual machine and filling a preset memory address in the virtual machine into a page table of the virtual machine so as to set the attribute of the page table to be read-only; and returning to the step that the interrupt processing program initiates a read request to the state register of the interrupt controller, and outputting a read result. Therefore, by utilizing the preset memory address and the attribute of the page table, the virtual machine can quickly read the information of the state register of the interrupt controller of the virtual machine, and the problem that the information of the state register can be read only after the virtual machine in the prior art needs to exit to the VMM is avoided.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate examples consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
FIG. 1 is a schematic diagram of a prior art virtual machine interrupt handling process;
FIG. 2 is a schematic diagram illustrating another prior art virtual machine interrupt handling process;
FIG. 3 is a flowchart illustrating a method for processing an interrupt controller of a virtual machine according to an example of the present disclosure;
FIG. 4 is a flow chart illustrating a method of processing an interrupt controller of another virtual machine according to an example of the present disclosure;
FIG. 5 illustrates a flow diagram of a method of processing an interrupt controller of a virtual machine provided by examples of the present disclosure;
fig. 6 is a schematic structural diagram of a processing apparatus of an interrupt controller of a virtual machine according to an example three of the present disclosure;
fig. 7 is a schematic hardware structure of a processing device of an interrupt controller of a virtual machine according to an example three of the present disclosure;
fig. 8 is a schematic structural diagram of an electronic device according to a fourth example of the present disclosure.
Explicit examples of the present disclosure have been shown by the above drawings, and will be described in more detail later. These drawings and the written description are not intended to limit the scope of the disclosed concepts in any way, but rather to illustrate the disclosed concepts to those skilled in the art by reference to specific examples.
Detailed description of the preferred embodiments
Exemplary examples will be described in detail herein, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The examples described in the following exemplary examples do not represent all examples consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present disclosure as detailed in the accompanying claims.
With the continuous development of virtual machine technology, the virtual machine technology can be widely applied to scenes such as data centers, cloud computing services and the like. Kernel virtual machine (Kernel-Based Virtual Machine, KVM) is an open source virtual machine monitor (Virtual Machine Monitor, VMM) based on an open source operating system. KVM is kernel based, with each virtual machine instance it manages being treated by the operating system as a process. Input and Output (IO) virtualization refers to device-dependent virtualization, which essentially is the multiplexing of peripheral resources of a limited physical host by a virtual device built by a virtual machine through a VMM to simulate the effects of real peripheral access. While IO interrupt virtualization is part of IO virtualization, a virtual machine uses an interrupt controller that will use the virtual machine to manage multiple IO peripheral interrupts.
FIG. 1 is a schematic diagram of a prior art virtual machine interrupt handling process; as shown in FIG. 1, the bold line in the flow diagram represents actions that may cause processor exceptions or state switching, where the solid line represents accessing registers of the interrupt controller. As can be seen from fig. 1, one register access of the interrupt controller by the virtual processor needs to go through the flow of the virtual processor- > KVM- > QEMU (open source virtual machine) - > KVM- > virtual processor, where each step needs to save several state information and thread information for restoring the virtual process to the interrupt controller.
In the prior art, in order to improve the processing efficiency, the behavior of the interrupt controller can be directly simulated in the KVM. FIG. 2 is a schematic diagram illustrating another prior art virtual machine interrupt handling process; in particular, during the process that the virtual processor in the interrupt response stage accesses the register of the interrupt controller, the KVM may directly return data to the virtual processor, without going through QEMU (open source virtual machine), and the simulation flow is simplified into a virtual processor- > KVM- > virtual processor.
However, in the response process of the IO virtual interrupt, the virtual processor reads the register to obtain the state of the interrupt controller, and the processing flow is still not simplified enough, that is, although the state of the interrupt controller reaches the KVM before the interrupt is generated, the KVM still needs to be passed when the interrupt state is read. That is, in the conventional method, there is still a problem of state switching.
The following describes the technical solutions of the present disclosure and how the technical solutions of the present application solve the above technical problems in detail with specific examples. The following specific examples may be combined with each other, and some examples may not be repeated for the same or similar concepts or processes. Examples of the present disclosure will be described below with reference to the accompanying drawings.
Aiming at the technical problem that the information of the state register can be read only after the virtual machine exits to the VMM in the prior art, fig. 3 is a flow chart of a processing method of the interrupt controller of the virtual machine provided in an example of the disclosure.
As shown in fig. 3, the method includes:
step 101, a virtual machine monitors the interrupt of a virtual processor, and starts an interrupt processing program in the virtual machine so that the interrupt processing program initiates a reading request to a state register of the interrupt controller;
102, when the kernel virtual machine captures that the virtual processor is in a page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of a state register of the interrupt controller in the virtual machine;
step 103, when the running state is an interrupt state, starting a page fault processing program of the kernel virtual machine and filling a preset memory address in the virtual machine into a page table of the virtual machine so as to set the attribute of the page table to be read-only;
step 104, executing the step that the interrupt processing program initiates a read request to the interrupt controller for the status register, and outputting a read result.
It should be noted that, the execution body of the processing method of the interrupt controller of the virtual machine provided by the present disclosure is a processing device of the interrupt controller of the virtual machine, and the processing method of the interrupt controller based on the virtual machine can be applied to simulation of the IO interrupt operation by the virtual machine.
In addition, the processing device of the interrupt controller of the virtual machine can be written in languages such as C/C++, java, shell or Python; the electronic device may be a desktop computer, a tablet computer, a smart phone, etc.; the operating system may be a windows system, an ios system, a Linux system, or a system that may be operated based on the electronic device, and the disclosure does not limit the electronic device and the operating system.
In the processing method of the interrupt controller of the virtual machine, firstly, the virtual machine monitors the interrupt of the virtual processor, and starts an interrupt processing program in the virtual machine, so that the interrupt processing program initiates a reading request to a state register of the interrupt controller.
The virtual processor interrupt is realized by forwarding the generated interrupt request to the virtual processor by the interrupt controller so that the virtual machine monitors the virtual processor interrupt. The source of the interrupt request may specifically be a virtual peripheral, that is, when the virtual peripheral needs to synchronize with the virtual machine CPU using an interrupt, the virtual peripheral will generate an interrupt request and process it through the virtual interrupt controller logic, and then send it to the virtual processor and cause it to interrupt. That is, the I/O interrupt is a means of synchronization between the virtual processor and the virtual peripheral, and when the virtual peripheral has an event that requires synchronization with the virtual processor thread, the virtual interrupt controller is notified of the request. The virtual interrupt controller sets the register according to the interrupt trigger logic.
Subsequently, when the interrupt controller is processing a read request, the virtual processor will access the interrupt controller's registers through addresses of 0xe 010000000-0 xe010000fff, while typically there is no memory or other device in the address space of 0xe 010000000-0 xe01000 ffff. At this time, a page fault abnormality will occur. This will make the information of the status register of the interrupt controller unreadable. That is, when the kernel virtual machine captures that the virtual processor has a page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine finds that the running state of the virtual processor is an interrupt state, and the built-in page fault processing program is started, so that the pre-stored memory address of the virtual machine is written into the page table of the virtual machine, and in the process, the attribute of the page table is set to be read-only. That is, the problem of page fault abnormality is solved, and the step of the interrupt handler initiating a read request to the interrupt controller for its status register is re-executed at this time, i.e. a read result can be output.
In other words, to solve this technical problem, the value of the register is filled into a 4KB physical memory page, the page is mapped to the 0xe 010000000-0 xe01000ffff address of the virtual machine, and the page is set as a read-only attribute in the page table of the virtual machine, so that the virtual processor directly reads the preset memory address of the virtual machine to obtain the value stored in the status register in the interrupt controller. That is, the kernel virtual machine will directly obtain the address of the status register of the interrupt controller in the virtual machine, and read the current value of the address, so as to determine the current running state of the virtual machine according to the value.
The processing method of the interrupt controller of the virtual machine provided by the embodiment of the disclosure enables the virtual machine to quickly read the information of the state register of the interrupt controller of the virtual machine by utilizing the preset memory address and the attribute of the page table, so that the problem that the information of the state register can be read only after the virtual machine needs to exit to the VMM in the prior art is avoided.
On the basis of each example of the above-mentioned example one, in order to further explain the processing method of the interrupt controller of the virtual machine provided by the present disclosure, fig. 4 is a schematic flow chart of the processing method of the interrupt controller of the virtual machine provided by the example one of the present disclosure, and fig. 5 is a schematic flow chart of the processing method of the interrupt controller of the virtual machine provided by the example one of the present disclosure. As shown in fig. 4 and 5, the processing method of the interrupt controller of the virtual machine includes:
step 201, the kernel virtual machine receives an interrupt request sent by the virtual machine;
step 202, executing an interrupt controller logic code pre-stored in the kernel virtual machine by an interrupt controller of the kernel virtual machine so as to update the running state of the virtual processor into an interrupt state by the preset memory address;
step 203, the interrupt controller sends the generated interrupt request to the virtual processor, so that the virtual machine monitors the interrupt of the virtual processor;
step 204, starting an interrupt handler in the virtual machine, so that the interrupt handler initiates a read request of a state register of the interrupt handler to an interrupt controller;
step 205, when the kernel virtual machine captures that the virtual processor has a page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of the state register of the interrupt controller in the virtual machine;
step 206, when the running state is an interrupt state, starting a page fault processing program of the kernel virtual machine and filling a preset memory address in the virtual machine into a page table of the virtual machine so as to set the attribute of the page table to be read-only;
step 207, executing the step that the interrupt processing program initiates a read request to the interrupt controller for its status register, and outputting the read result.
It should be noted that, the execution body of the processing method of the interrupt controller of the virtual machine provided by the present disclosure is a processing device of the interrupt controller of the virtual machine, and the processing method of the interrupt controller based on the virtual machine can be applied to simulation of the IO interrupt operation by the virtual machine.
In addition, the processing device of the interrupt controller of the virtual machine can be written in languages such as C/C++, java, shell or Python; the electronic device may be a desktop computer, a tablet computer, a smart phone, etc.; the operating system may be a windows system, an ios system, a Linux system, or a system that may be operated based on the electronic device, and the disclosure does not limit the electronic device and the operating system.
Unlike the foregoing examples, in this example, a process of updating the running state of the virtual processor is also included.
Specifically, a preset memory address is further set in the virtual machine, and the preset memory address is used for recording the running state of the virtual processor; the preset memory address is the same as the address of the state register of the interrupt controller in the virtual machine.
And once the kernel virtual machine receives an interrupt request sent by the virtual machine, the interrupt controller executes the interrupt controller logic code pre-stored in the kernel virtual machine so as to update the running state of the virtual processor into an interrupt state by the preset memory address.
And the interrupt controller sends the generated interrupt request to the virtual processor so that the virtual machine monitors the interrupt of the virtual processor.
Subsequently, as in the previous example, an interrupt handler in the virtual machine is started to cause the interrupt handler to initiate a read request to its status register to the interrupt controller; when the kernel virtual machine captures that the virtual processor is in page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of a state register of the interrupt controller in the virtual machine; when the running state is an interrupt state, starting a page fault processing program of the kernel virtual machine, and filling a preset memory address in the virtual machine into a page table of the virtual machine so as to set the attribute of the page table to be read-only; and returning to the step that the interrupt processing program initiates a read request to the state register of the interrupt controller, and outputting a read result.
As shown in fig. 5, in the case where the page table entry is not swapped out, neither the read operation of the register of the interrupt controller needs to be trapped in KVM, but the direct access to the memory is only the register write operation needs to be trapped in KVM emulation.
In other alternative examples, writing to the interrupt controller's status register for a virtual machine row may also occur after the virtual machine's page table attribute is read-only. At this time, the kernel virtual machine calls a pre-stored hardware logic code to update the running state of the virtual processor into a non-interrupt state according to the preset memory address; and the virtual machine executes the writing operation on the state register of the interrupt controller.
Fig. 6 is a schematic structural diagram of a processing apparatus of an interrupt controller of a virtual machine according to an example three of the present disclosure.
As shown in fig. 6, a processing apparatus of an interrupt controller of a virtual machine includes:
the virtual machine 10 is configured to, upon detecting an interrupt of the virtual processor, start an interrupt handler in the virtual machine 10, so that the interrupt handler initiates a read request to the interrupt controller for a status register thereof;
the kernel virtual machine 20 is configured to determine an operation state of the virtual machine 10 according to an address of a status register of the interrupt controller in the virtual machine 10 when the virtual processor is captured and an address of the page fault is directed to the interrupt controller;
when the running state is an interrupt state, starting a page fault processing program of the kernel virtual machine 20 and filling a preset memory address in the virtual machine 10 into a page table of the virtual machine 10 so as to set the attribute of the page table to be read-only;
the virtual machine 10 is further configured to restart the step of the interrupt handler initiating a read request to its status register to the interrupt controller and output the read result.
In an alternative example, the apparatus further comprises:
the kernel virtual machine 20 is further configured to, when the attribute of the page table of the virtual machine 10 is read-only, and the virtual machine 10 performs a write operation on the status register of the interrupt controller, call a pre-stored interrupt controller logic code to update the running state of the virtual machine 10 to a non-interrupt state according to the preset memory address;
the virtual machine 10 is configured to perform a write operation to a status register of the interrupt controller.
In an alternative example, the kernel virtual machine 20 is further configured to receive an interrupt request sent by the virtual machine before detecting a virtual processor interrupt and starting an interrupt handler in the virtual machine 10;
the interrupt controller of the kernel virtual machine 20 executes the hardware logic code pre-stored in the kernel virtual machine to update the preset memory address to the interrupt state of the virtual processor.
In an alternative example, the interrupt controller is further configured to send the generated interrupt request to the virtual machine 10 processor, so that the virtual machine 10 monitors the virtual machine 10 processor for an interrupt.
In an alternative example, a preset memory address is set in the virtual machine 10, where the preset memory address is used to record the running state of the virtual machine 10;
wherein the preset memory address is the same as the address of the status register of the interrupt controller in the virtual machine 10.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working processes and corresponding advantageous effects of the above-described system may refer to corresponding processes in the foregoing method examples, which are not described herein again.
In other examples, fig. 7 is a schematic hardware structure of a processing apparatus of an interrupt controller of a virtual machine according to example three of the present disclosure. As shown in fig. 7, the processing device of the interrupt controller of the virtual machine may specifically include:
a processor 32;
a memory 31 for storing processor-executable instructions;
wherein the processor 32 is configured to:
the virtual machine monitors the virtual processor interrupt, and starts an interrupt processing program in the virtual machine, so that the interrupt processing program initiates a reading request to a state register of the interrupt controller;
when the kernel virtual machine captures that the virtual processor is in page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of a state register of the interrupt controller in the virtual machine;
when the running state is an interrupt state, a page fault processing program of an interrupt controller is started and a preset memory address in a virtual machine is filled into a page table of the virtual machine, so that the attribute of the page table is set to be read-only;
and returning to the step that the interrupt processing program initiates a read request to the state register of the interrupt controller, and outputting a read result.
The memory 31 may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc. While processor 32 may be implemented by one or more Application Specific Integrated Circuits (ASICs), digital signal processor architectures (DSPs), digital Signal Processing Devices (DSPDs), programmable Logic Devices (PLDs), field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessor architectures, or other electronic components.
The instructions may be written in a language such as C/C++, java, shell, or Python, which is not limited by this example.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working processes and corresponding advantageous effects of the above-described system may refer to corresponding processes in the foregoing method examples, which are not described herein again.
Fig. 8 is a schematic structural diagram of an electronic device provided in example four of the present disclosure, where the processing apparatus 6 of the interrupt controller of the virtual machine according to any one of the foregoing is installed in the electronic device 4.
It should be noted that, the processing apparatus of the interrupt controller of the virtual machine may be applied to various electronic devices, the operation method may be referred to the above-described scheme disclosed in the first or second example, and the structure may be referred to the above-described scheme disclosed in the third example.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following the general principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
The present disclosure provides a storage medium containing computer executable instructions for performing a method as described in any of the preceding, when executed by a computer processor.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims (13)

1. A method for processing an interrupt controller of a virtual machine, comprising:
the virtual machine monitors the virtual processor interrupt, and starts an interrupt processing program in the virtual machine, so that the interrupt processing program initiates a reading request to a state register of the interrupt controller;
when the kernel virtual machine captures that the virtual processor is in page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of a state register of the interrupt controller in the virtual machine;
when the running state is an interrupt state, a page fault processing program of an interrupt controller is started, a preset memory address in a virtual machine is filled into a page table of the virtual machine, and the attribute of the page table is set to be read-only;
and returning to the step that the interrupt processing program initiates a read request to the state register of the interrupt controller, and outputting a read result.
2. The processing method of claim 1, wherein when the attribute of the page table of the virtual machine is read-only and the virtual machine performs a write operation to a status register of the interrupt controller, the method further comprises:
the kernel virtual machine calls a pre-stored interrupt controller logic code to update the running state of the virtual processor into a non-interrupt state according to the preset memory address;
and the virtual machine executes the writing operation on the state register of the interrupt controller.
3. The processing method of claim 1, wherein the virtual machine monitors for virtual processor interrupts and, prior to starting an interrupt handler in the virtual machine, further comprises:
the kernel virtual machine receives an interrupt request sent by the virtual machine;
the interrupt controller of the kernel virtual machine executes hardware logic codes pre-stored in the kernel virtual machine so as to update the running state of the virtual processor into an interrupt state by the preset memory address.
4. A processing method according to claim 3, wherein the virtual machine monitors for virtual processor interrupts, comprising:
and the interrupt controller sends the generated interrupt request to the virtual processor so that the virtual machine monitors the interrupt of the virtual processor.
5. The method of any one of claims 1-4, further comprising:
setting a preset memory address in the virtual machine, wherein the preset memory address is used for recording the running state of the virtual processor;
the preset memory address is the same as the address of the state register of the interrupt controller in the virtual machine.
6. A processing apparatus of an interrupt controller of a virtual machine, comprising:
the virtual machine is used for starting an interrupt processing program in the virtual machine when the virtual processor interrupt is monitored, so that the interrupt processing program initiates a reading request for a state register of the interrupt processing program to the interrupt controller;
the kernel virtual machine is used for capturing that the virtual processor is in page fault abnormality and judging the running state of the virtual processor according to the address of the state register of the interrupt controller in the virtual machine when the address of the page fault abnormality points to the interrupt controller;
when the running state is an interrupt state, starting an unfilled page processing program of an interrupt controller in a kernel virtual machine, filling a preset memory address in the virtual machine into a page table of the virtual machine, and setting the attribute of the page table to be read-only;
the virtual machine is further configured to restart the step of the interrupt handler initiating a read request to its status register to the interrupt controller, and output a read result.
7. The processing apparatus of claim 6, wherein the apparatus further comprises:
the kernel virtual machine is further used for calling a pre-stored interrupt controller logic code to update the running state of the virtual processor into a non-interrupt state according to the preset memory address when the attribute of the page table of the virtual machine is read-only and the virtual machine executes writing operation on the state register of the interrupt controller;
the virtual machine is used for executing writing operation to the state register of the interrupt controller.
8. The processing apparatus according to claim 6, wherein,
the kernel virtual machine is also used for receiving an interrupt request sent by the virtual machine;
the interrupt controller of the kernel virtual machine executes hardware logic codes pre-stored in the kernel virtual machine so as to update the running state of the virtual processor into an interrupt state by the preset memory address.
9. The processing apparatus according to claim 8, wherein,
the interrupt controller is further configured to send the generated interrupt request to the virtual processor, so that the virtual machine monitors the interrupt of the virtual processor.
10. A processing apparatus according to any one of claims 6 to 9, wherein,
the virtual machine is provided with a preset memory address, and the preset memory address is used for recording the running state of the virtual processor;
the preset memory address is the same as the address of the state register of the interrupt controller in the virtual machine.
11. A processing apparatus of an interrupt controller of a virtual machine, comprising:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to:
the virtual machine monitors the virtual processor interrupt, and starts an interrupt processing program in the virtual machine, so that the interrupt processing program initiates a reading request to a state register of the interrupt controller;
when the kernel virtual machine captures that the virtual processor is in page fault abnormality and the address of the page fault abnormality points to the interrupt controller, the kernel virtual machine judges the running state of the virtual processor according to the address of a state register of the interrupt controller in the virtual machine;
when the running state is an interrupt state, starting an unfilled page processing program of an interrupt controller in a kernel virtual machine, filling a preset memory address in the virtual machine into a page table of the virtual machine, and setting the attribute of the page table to be read-only;
and returning to the step that the interrupt processing program initiates a read request to the state register of the interrupt controller, and outputting a read result.
12. An electronic device, wherein a processing apparatus of an interrupt controller of a virtual machine according to any one of claims 6 to 10 is installed in the electronic device.
13. A storage medium containing computer executable instructions which, when executed by a computer processor, are for performing the method of any of claims 1-5.
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