CN111146293B - Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof - Google Patents

Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof Download PDF

Info

Publication number
CN111146293B
CN111146293B CN202010005976.3A CN202010005976A CN111146293B CN 111146293 B CN111146293 B CN 111146293B CN 202010005976 A CN202010005976 A CN 202010005976A CN 111146293 B CN111146293 B CN 111146293B
Authority
CN
China
Prior art keywords
alo
thin film
double electric
film transistor
preparation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010005976.3A
Other languages
Chinese (zh)
Other versions
CN111146293A (en
Inventor
裴艳丽
李贞文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Yat Sen University
Original Assignee
Sun Yat Sen University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Yat Sen University filed Critical Sun Yat Sen University
Priority to CN202010005976.3A priority Critical patent/CN111146293B/en
Publication of CN111146293A publication Critical patent/CN111146293A/en
Application granted granted Critical
Publication of CN111146293B publication Critical patent/CN111146293B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • H01L21/441Deposition of conductive or insulating materials for electrodes
    • H01L21/445Deposition of conductive or insulating materials for electrodes from a liquid, e.g. electrolytic deposition
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065Analogue means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Manufacturing & Machinery (AREA)
  • Theoretical Computer Science (AREA)
  • Neurology (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Molecular Biology (AREA)
  • General Health & Medical Sciences (AREA)
  • Evolutionary Computation (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention discloses a method based on AlOxThe device structure comprises a substrate, a bottom gate electrode and AlO from bottom to topxThe double-electric-layer dielectric layer, the oxide semiconductor active layer and the source drain electrode at the top; the AlOxThe double electric layer medium layer passes through AlOxSpin-coating or printing a precursor solution, and then performing heat treatment at 150-400 ℃; the oxide semiconductor active layer is prepared by spin coating or printing through a precursor solution of the oxide semiconductor active layer and then performing heat treatment, wherein the heat treatment temperature is 200-300 ℃. The invention passes through AlOxSpin coating or printing precursor solution, and then heat treating to prepare AlO capable of formingxThe double electric layer dielectric layer has lower requirements on equipment, low preparation cost and simple operation, and can be prepared in a large area; and AlOxThe preparation temperature of the double electric layer dielectric layer and the oxide semiconductor active layer is low, and the compatibility with a flexible circuit system is good.

Description

Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof
Technical Field
The invention belongs to the technical field of semiconductor microelectronic devices and artificial intelligence, and particularly relates to an AlO-based semiconductor microelectronic devicexA nerve bionic device of a double electric layer thin film transistor and a preparation method.
Background
With the advent of the big data era, artificial intelligence technology is continuously developing. At present, the artificial neural network calculation is mainly based on the existing von Neumann calculation system, is realized by an algorithm, is limited by the problem of a storage wall, and has large equipment volume, high energy consumption and low efficiency. With the increasing data volume, the existing computing system can hardly deal with the development of artificial intelligence. In recent years, industries and research organizations are dedicated to developing novel nerve bionic devices, directly simulating the behaviors of neurons and nerve synapses of the human brain on a hardware level, and building a brain-like neural network circuit, so that the human-like neural network formed by large-scale parallel computation and high plasticity as the human brain is realized, the problem of a storage wall is fundamentally solved, and the development of an artificial intelligence technology is promoted. The existing nerve bionic device comprises a memristor, an atom switch, a phase change memory, a ferroelectric transistor, an electric double layer transistor and the like. The nerve bionic device based on the double electric layer transistor has the following advantages: 1. signal transmission and autonomous learning can be performed simultaneously; 2. the neurosynaptic performance can be regulated and controlled and the working energy consumption can be reduced by adding an additional grid; 3. a hardwired neural network may be implemented based on a capacitively coupled mode of operation.
In conventional studies, liquid dielectrics and organic substances such as polymer electrolytes, for example, chitosan, are often used as electric double layer media in the core portion of an electric double layer transistor, and thus problems in terms of packaging, reliability, and the like are encountered in practical use, and it is difficult to market the electric double layer media. In addition, as a solid-state electric double layer transistor, Al prepared by a PECVD method2O3Or SiO2And the like, but the operation difficulty is high due to high cost. The technical scheme of the invention adopts the solution method to prepare the Al2O3Dielectric layer of Al by adjusting2O3The configuration of the precursor realizes the electric double layer characteristics. Based on Al2O3The thin film transistor of the double electric layers has the function of neural synapse, and has the advantages of simple process, low cost, good compatibility and the like.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides an AlO-based materialxThe nerve bionic device of the double electric layer thin film transistor has the advantages of simple process, high packaging reliability, low cost and good compatibility.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
based on AlOxThe device structure comprises a substrate, a bottom gate electrode and AlO from bottom to topxThe double electric layer dielectric layer, the oxide semiconductor active layer and the source electrode and the drain electrode on the top; the AlOxThe double electric layer medium layer passes through AlOxSpin coating or printing the precursor solution, and heat treating at the same temperature150-400 ℃; the oxide semiconductor active layer is prepared by spin coating or printing an oxide precursor solution and then performing heat treatment, wherein the heat treatment temperature is 200-300 ℃;
the AlOxThe precursor solution comprises aluminum nitrate, hydrogen peroxide, nitric acid and ammonia water.
The invention provides a method based on AlOxAn oxide semiconductor thin film transistor nerve bionic device of an electric double layer and a preparation method thereof. Specifically, in AlOxAdding nitric acid and ammonia water into a precursor solution of the dielectric layer, and reacting by using a solution combustion method to form AlO with an ion channel and hydrogen ionsxAnd an electric double layer formed at the dielectric layer/semiconductor interface and at the dielectric layer/gate electrode interface by applying a bias voltage to the gate electrode such that ions in the dielectric layer move to the dielectric layer interface edge. The electric double layer has two coupling principles: electrostatic coupling and electrochemical doping. The channel conductance of the active layer generates volatile and nonvolatile changes through the electrostatic coupling of an electric double layer and the electrochemical doping/de-doping effect, so that the short-range plasticity and the long-range plasticity of the nerve synapse are realized.
Specifically, the substrate selected by the invention is an insulating hard substrate or a flexible substrate, and preferably, the insulating hard substrate is Si/SiO2Glass, sapphire, the flexible substrate is PET or PI.
The oxide semiconductor active layer is a metal oxide semiconductor conventionally used In the field, and preferably, the oxide semiconductor active layer is InGaZnO, InZnO, In2O3And ZnO. Further, the metal oxide semiconductor active layer is In2O3
Preferably, the bottom gate electrode is heavily doped with Si or metal.
Preferably, the source drain electrode is a metal or a transparent conductive film. Further, the metal is Pt, Au or Al, and the transparent conductive film is ITO.
The invention adopts AlOxThe film is double electric layer medium and is prepared through solution spinning process with solute removed from the precursor solutionAdding nitric acid and ammonia water with proper concentration in addition to aluminum nitrate and hydrogen peroxide solution as solvent to prepare the AlOxThe film has movable hydrogen ions and ion channels, the gate electrode applies voltage to control the formation of an electric double layer to control the conductance of the channel of the active layer, the electric double layer does not disappear rapidly after the voltage is removed, the action of the next applied voltage is superposed on the former step, and the effect has frequency dependence. Meanwhile, the channel electrochemical doping effect caused under the action of the electric field can realize the conversion from the short-range characteristic to the long-range characteristic of the nerve synapse.
The invention provides a method based on AlOxThe preparation method of the nerve bionic device of the electric double-layer thin film transistor comprises the following steps:
s1, adopting heavily doped Si as a substrate, and simultaneously using the heavily doped Si as a bottom gate electrode;
s2, preparing AlOxPrecursor solution for later use;
s3, preparing an oxide precursor solution of the oxide semiconductor active layer for later use;
s4, treating the surface of the bottom gate electrode by adopting plasma or UV (ultraviolet), so as to improve the hydrophilicity of the surface;
s5, firstly spin-coating or printing AlO on the surface of the bottom gate electrode at room temperaturexPrecursor solution, then heat-treating to form AlOxThe heat treatment temperature of the double electric layer dielectric layer is 150-400 ℃; then AlO is addedxSpin-coating or printing an oxide precursor solution on the surface of the double-electrode-layer dielectric layer at room temperature, and performing heat treatment to form an oxide semiconductor active layer, wherein the heat treatment temperature is 200-300 ℃;
s6, etching the oxide semiconductor active layer according to different channel size requirements;
s7, evaporating and plating source and drain electrodes.
Preferably, in the above step, S2. formulating AlOxPrecursor solution: weighing Al (NO)3)3·9H2Dissolving O solute in hydrogen peroxide solution, adding 28% ammonia water and 65% -70% nitric acid, continuously stirring for 24h, filtering and standing; s3, preparing an oxide precursor solution of an oxide semiconductor active layer: weighing In (NO)3)3·5H2O solute is dissolved in hydrogen peroxide solution, continuously stirred for 24h and filtered and kept stand.
In the invention, the AlO isxThe precursor solution prepared by the double electric layer medium is an inorganic solution of nitrate, nitric acid and ammonia water are added, and the solvent is hydrogen peroxide solution; the active layer precursor solution can be InGaZnO, InZnO, In2O3And any nitrate inorganic solution in ZnO is prepared by the processes of stirring, filtering, standing and the like. According to the invention, nitric acid and ammonia water are added into a traditional oxide dielectric layer precursor solution, and a large number of hydrogen ions and ion channels are introduced into a dielectric film, so that the double-electric-layer effect is realized. The transistor forms an electric double layer by applying voltage, adjusts the voltage to realize the regulation and control of two modes of electrostatic coupling and electrochemical doping/de-doping of the electric double layer, thereby controlling the change of the channel conductance of the active layer, having relaxation property and realizing various performance simulations of the nerve synapse.
In the invention, the bottom gate electrode effect of the device can be replaced by a top floating gate electrode, so that the array of a plurality of devices is convenient, the device is expected to be applied to the design of an integrated circuit, and the device has certain value on the research and development of a nervous system chip. Specifically, the device structure comprises a substrate, a bottom gate electrode and AlO from bottom to topxThe floating gate electrode comprises an electric double layer dielectric layer, an oxide semiconductor active layer and a floating gate electrode on the top, and a source electrode and a drain electrode.
Compared with the prior art, the invention has the beneficial effects that:
1. through AlOxThe precursor solution is spin-coated or printed, and then is thermally treated to prepare the AlOxThe double electric layer dielectric layer has low requirement on equipment, low preparation cost and simple operation, and can be prepared in a large area.
2、AlOxThe preparation temperature of the double electric layer dielectric layer and the oxide semiconductor active layer is low, and the compatibility with a flexible circuit system is good.
3. The bottom gate electrode effect of the device can be replaced by a top electrode floating gate electrode, so that the array of a plurality of devices is convenient, the device is expected to be applied to the design of integrated circuits, and has certain value on the research and development of nervous system chips.
Drawings
FIG. 1 shows AlO-based samples according to example 1 of the present inventionxStructural cross-sectional view of the electric double layer thin film transistor neuro-bionic device.
FIG. 2 shows AlO-based samples according to example 1 of the present inventionxA curve diagram of the reciprocating I-V transfer characteristic of the nerve bionic device of the double electric layer thin film transistor.
FIG. 3 shows AlO-based samples according to example 1 of the present inventionxAnd a graph of source-drain current is output after a pulse voltage is applied to a bottom gate electrode of the nerve bionic device of the double electric layer thin film transistor for stimulation.
FIG. 4 shows AlO-based samples according to example 1 of the present inventionxAnd a curve graph of source-drain current is output after double-pulse voltage stimulation is applied to a bottom gate electrode in the nerve bionic device of the double-electric-layer thin film transistor.
FIG. 5 shows AlO-based samples according to example 1 of the present inventionxDouble-pulse facilitation (PPF) exponential diagram of a neuro-biomimetic device of an electric double layer thin film transistor.
FIG. 6 shows AlO-based samples according to example 1 of the present inventionxThe curve of source-drain current is output by applying a plurality of pulse voltages to the bottom gate electrode in the nerve bionic device of the electric double layer thin film transistor, namely a schematic diagram for simulating the transition from short-term plasticity (STP) to long-term plasticity (LTP).
FIG. 7 shows AlO-based samples according to example 2 of the present inventionxStructural cross-sectional view of the electric double layer thin film transistor neuro-bionic device.
The reference numbers in fig. 1 and 7 illustrate:
1 is heavily doped Si substrate (used as bottom gate electrode at the same time), 2 is AlOxA double electric layer dielectric layer, 3 is a source electrode, 4 is a drain electrode, and 5 is InOxAnd the active layer channel 6 is a floating gate electrode.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to specific embodiments and the accompanying drawings, but the scope of the present invention is not limited to the embodiments.
Example 1:
based on AlOxThe preparation method of the nerve bionic device of the electric double-layer thin film transistor comprises the following steps:
referring to fig. 1, in this embodiment, a heavily doped Si substrate is used as the substrate, and the material of the bottom gate electrode is heavily doped Si to prepare AlOxThe precursor solution of the double-electric-layer medium is an aluminum nitrate inorganic solution, wherein nitric acid and ammonia water are added, the precursor solution of the active layer is an indium nitrate inorganic solution, and the source electrode and the drain electrode are made of Al. The specific operation steps are as follows:
(1) configuration of AlOxPrecursor solution, 375mg Al (NO) was weighed3)3·9H2O solute was dissolved in 5ml of hydrogen peroxide solution, 222ul of ammonia (28% concentration) and 160ul of nitric acid (65% -70% concentration) were added, stirring was continued for 24h and filtration was allowed to stand.
(2) Configuring InOxPrecursor solution, 377mg of In (NO) was weighed3)3·5H2O solute was dissolved in 5ml of hydrogen peroxide solution, stirred continuously for 24h and filtered and left to stand.
(3) And treating the surface of the heavily doped Si substrate by adopting UV for 30min to improve the hydrophilicity of the surface of the substrate.
(4) Spin coating AlO in a glove box at room temperature and humidity below 10% RHxThe rotation speed of the precursor solution is 4300r/min, the time is 30s, the spin-coated substrate is placed on a hot plate at the temperature of 300 ℃ for heating for 30min, and the precursor is subjected to a solution combustion method reaction to form AlOxFilm and evaporate off excess solvent. Repeating spin coating for 5 times to make AlOxThe thickness of the electric double layer dielectric film reaches about 30 nm.
(5) After spin coating 5 layers of AlOxAfter the film, spin-coating InOxAnd (3) precursor solution. InO was also spin coated in a glove box at room temperature and humidity below 10% RHxThe rotation speed of the precursor solution is 4300r/min, the time is 30s, the spin-coated substrate is placed on a hot plate at the temperature of 230 ℃ for heating for 2h, and the precursor is subjected to a solution combustion method reaction to form InOxFilm and evaporate off excess solvent. Spin coating 1 time to InOxActive sourceThe thickness of the layer film reaches about 10 nm.
(6) And forming an active layer channel pattern by a photoetching process.
(7) The source and drain electrodes were prepared to a thickness of 150nm by electron beam evaporation.
Fig. 2 is a graph of the round-trip I-V transfer characteristics of embodiment 1, where a label 1 is a source-drain current curve output by-3 to 3V scanning (regarded as forward scanning) of a gate voltage, a label 2 is a source-drain current curve output by 3 to-3V scanning (regarded as reverse scanning) of the gate voltage, and the label 2 is higher than the label 1 curve in an on state, and correspondingly, the reverse scanning of the source-drain current is larger than the forward scanning, which indicates that the reverse scanning effect result is a result of superposition based on the forward scanning effect, which is similar to the memory effect of a neural synapse.
Fig. 3 is a graph of output source-drain Current of the gate electrode stimulated by a pulse voltage in example 1, that is, a schematic diagram of Current after simulation of excitotory Post-synthetic Current (EPSC).
Fig. 4 is a graph of output source-drain current when a double-pulse voltage stimulus is applied to the gate in example 1.
Fig. 5 is a graph of the double-pulse facilitation (PPF) index of the neuro-biomimetic device of example 1.
Fig. 6 is a graph of the gate applying a plurality of pulse voltages to stimulate output source-drain current in example 1, that is, a schematic diagram for simulating the transition from short-term plasticity (STP) to long-term plasticity (LTP).
Example 2:
referring to fig. 7, in this embodiment, a heavily doped Si substrate is used as a substrate, a material of a bottom gate electrode is heavily doped Si, a precursor solution for preparing an AlOx electric double layer medium is an aluminum nitrate inorganic solution, wherein nitric acid and ammonia water are added, a precursor solution of an active layer is an indium nitrate inorganic solution, and a material of a source electrode, a drain electrode, and a floating gate electrode is Al. The specific operation steps are as follows:
(1) configuration of AlOxPrecursor solution, 375mg Al (NO) was weighed3)3·9H2O solute dissolved in 5ml hydrogen peroxideTo the solution, 222ul of aqueous ammonia (28% strength) and 160ul of nitric acid (65% -70% strength) were added, stirring was continued for 24h and the mixture was filtered and allowed to stand.
(2) Configuring InOxPrecursor solution, 377mg of In (NO) was weighed3)3·5H2O solute was dissolved in 5ml of hydrogen peroxide solution, stirred continuously for 24h and filtered and left to stand.
(3) And treating the surface of the heavily doped Si substrate by adopting plasma for 30min to improve the hydrophilicity of the surface of the substrate.
(4) Spin coating AlO in a glove box at room temperature and humidity below 10% RHxThe rotation speed of the precursor solution is 4300r/min, the time is 30s, the spin-coated substrate is placed on a hot plate at the temperature of 300 ℃ for heating for 30min, and the precursor is subjected to a solution combustion method reaction to form AlOxFilm and evaporate off excess solvent. Repeating spin coating for 5 times to make AlOxThe thickness of the electric double layer dielectric film reaches about 30 nm.
(5) After spin coating 5 layers of AlOxAfter the film, spin-coating InOxAnd (3) precursor solution. InO was also spin coated in a glove box at room temperature and humidity below 10% RHxThe rotation speed of the precursor solution is 4300r/min, the time is 30s, the spin-coated substrate is placed on a hot plate at the temperature of 230 ℃ for heating for 2h, and the precursor is subjected to a solution combustion method reaction to form InOxFilm and evaporate off excess solvent. Spin coating 1 time to InOxThe thickness of the active layer film reaches about 10 nm.
(6) And forming an active layer channel pattern by a photoetching process.
(7) Floating gate electrodes and source and drain electrodes with the thickness of 150nm are prepared by electron beam evaporation.
The test results shown in fig. 2 to 6 are all the results of the bottom gate electrode alone, and the floating gate electrode is floating without any voltage applied. The floating gate electrode alone (the bottom gate electrode floating) also has similar effects, and the description of the floating gate electrode is omitted here.
Variations and modifications to the above-described embodiments may occur to those skilled in the art, which fall within the scope and spirit of the above description. Therefore, the present invention is not limited to the specific embodiments disclosed and described above, and some modifications and variations of the present invention should fall within the scope of the claims of the present invention. In addition, although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims (9)

1. Based on AlOxThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized by comprising the following steps of:
s1, adopting heavily doped Si as a substrate, and simultaneously using the heavily doped Si as a bottom gate electrode;
s2, preparing AlOxPrecursor solution for later use;
s3, preparing an oxide precursor solution of the oxide semiconductor active layer for later use;
s4, treating the surface of the bottom gate electrode by adopting plasma or UV (ultraviolet), so as to improve the hydrophilicity of the surface;
s5, firstly spin-coating or printing AlO on the surface of the bottom gate electrode at room temperaturexPrecursor solution, then heat-treating to form AlOxThe heat treatment temperature of the double electric layer dielectric layer is 150-400 ℃; then AlO is addedxSpin-coating or printing an oxide precursor solution on the surface of the double-electrode-layer dielectric layer at room temperature, and performing heat treatment to form an oxide semiconductor active layer, wherein the heat treatment temperature is 200-300 ℃;
s6, etching the oxide semiconductor active layer according to different channel size requirements;
s7, evaporating a source electrode and a drain electrode;
the nerve bionic device structure comprises a substrate, a bottom gate electrode and AlO from bottom to topxThe double electric layer dielectric layer, the oxide semiconductor active layer and the source electrode and the drain electrode on the top; the AlOxThe precursor solution comprises aluminum nitrate, hydrogen peroxide, nitric acid and ammonia water.
2. AlO-based material according to claim 1xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized in that the substrate is an insulating hard substrate or a flexible substrate.
3. AlO-based material according to claim 2xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized in that the insulating hard substrate is Si/SiO2Glass, sapphire, the flexible substrate is PET or PI.
4. AlO-based material according to claim 1xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized In that the oxide semiconductor active layer is InGaZnO, InZnO and In2O3And ZnO.
5. AlO-based according to claim 4xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized In that the oxide semiconductor active layer is In2O3
6. AlO-based material according to claim 1xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized in that the bottom gate electrode is heavily doped with Si or metal.
7. AlO-based material according to claim 1xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized in that the source electrode and the drain electrode are metal or transparent conductive films.
8. AlO-based material according to claim 7xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized in that the metal is Pt, Au or Al, and the transparent conductive thin film is ITO.
9. AlO-based material according to claim 1xThe preparation method of the nerve bionic device of the double electric layer thin film transistor is characterized in that,
s2, preparing AlOxPrecursor solution: weighing Al (NO)3)3·9H2Dissolving O in hydrogen peroxide solution, adding 28% ammonia water and 65% -70% nitric acid, continuously stirring for 24h, filtering and standing;
s3, preparing an oxide precursor solution: weighing In (NO)3)3·5H2O is dissolved in hydrogen peroxide solution, stirred for 24h and filtered and left to stand.
CN202010005976.3A 2020-01-03 2020-01-03 Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof Active CN111146293B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010005976.3A CN111146293B (en) 2020-01-03 2020-01-03 Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010005976.3A CN111146293B (en) 2020-01-03 2020-01-03 Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof

Publications (2)

Publication Number Publication Date
CN111146293A CN111146293A (en) 2020-05-12
CN111146293B true CN111146293B (en) 2021-04-27

Family

ID=70523549

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010005976.3A Active CN111146293B (en) 2020-01-03 2020-01-03 Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof

Country Status (1)

Country Link
CN (1) CN111146293B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107003572A (en) * 2014-11-28 2017-08-01 夏普株式会社 Liquid crystal display device
CN107328838A (en) * 2017-04-13 2017-11-07 南京大学 A kind of electronic biosensor and preparation method based on bigrid single-electronic transistor
CN108389909A (en) * 2018-01-31 2018-08-10 京东方科技集团股份有限公司 Thin film transistor (TFT) and preparation method thereof, display device and detection ion concentration method
CN110416312A (en) * 2019-07-19 2019-11-05 复旦大学 A kind of low-power consumption nerve synapse thin film transistor (TFT) and preparation method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107003572A (en) * 2014-11-28 2017-08-01 夏普株式会社 Liquid crystal display device
CN107328838A (en) * 2017-04-13 2017-11-07 南京大学 A kind of electronic biosensor and preparation method based on bigrid single-electronic transistor
CN108389909A (en) * 2018-01-31 2018-08-10 京东方科技集团股份有限公司 Thin film transistor (TFT) and preparation method thereof, display device and detection ion concentration method
CN110416312A (en) * 2019-07-19 2019-11-05 复旦大学 A kind of low-power consumption nerve synapse thin film transistor (TFT) and preparation method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于KH550-GO固态电解质中电容耦合作用的双侧栅IZO薄膜晶体管;郭立强,温娟,程广贵,袁宁一,丁建宁;《物理学报》;20160908;第65卷(第17期);第379-386页 *

Also Published As

Publication number Publication date
CN111146293A (en) 2020-05-12

Similar Documents

Publication Publication Date Title
CN110610984B (en) Synaptic transistor and preparation method thereof
US20230327579A1 (en) Friction Nano Power Generation Synaptic Transistor
WO2018113142A1 (en) A porphyrin memristor and the fabrication method thereof
Sun et al. Multilevel memory and artificial synaptic plasticity in P (VDF-TrFE)-based ferroelectric field effect transistors
CN112397392B (en) Bionic synaptic transistor and its preparing process
Xue et al. Native drift and Mott nanochannel in layered V2O5 film for synaptic and nociceptive simulation
CN111628078A (en) Synaptic transistor based on two-dimensional and three-dimensional perovskite composite structure and preparation method thereof
CN111081875A (en) Ferroelectric polarization regulated artificial synapse device and preparation method thereof
Liu et al. Organic synaptic devices based on ionic gel with reduced leakage current
He et al. Flexible oxide-based Schottky neuromorphic TFTs with configurable spiking dynamic functions
CN112864164B (en) Three-terminal artificial optical synapse and preparation method thereof
CN112885964B (en) Multi-field regulation memristor and preparation method thereof
Zhang et al. Synaptic transistor arrays based on PVA/lignin composite electrolyte films
CN111146293B (en) Based on AlOxNerve bionic device of double electric layer thin film transistor and preparation method thereof
CN110797459B (en) Ferroelectric-regulated two-end conducting polymer artificial synapse device and preparation method and application thereof
Liu et al. Field-driven modulating of In-Sn-O synaptic transistors with a precisely controlled weight update
Kim et al. Weighted-sum operation of three-terminal synapse transistors in array configuration using spin-coated Li-doped ZrO2 electrolyte gate insulator
CN112436060A (en) Thin film transistor doped with potassium ions and preparation method thereof
CN109037449B (en) Organic field effect transistor memory and preparation method thereof
CN114583053B (en) All-solid-state organic electrochemical transistor and preparation method thereof
Gong et al. Study of short-term synaptic plasticity in Ion-Gel gated graphene electric-double-layer synaptic transistors
CN113035946A (en) MXene-doped synapse type thin film transistor and preparation method thereof
Zhou et al. Effect of adjacent lateral inhibition on light and electric-stimulated synaptic transistors
CN111106238A (en) Bidirectional threshold gating device based on metal doping and preparation method thereof
Chen et al. Artificial neurosynaptic device based on amorphous oxides for artificial neural network constructing

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant