CN111144346B - Fingerprint identification detection circuit, fingerprint scanning circuit and display device - Google Patents
Fingerprint identification detection circuit, fingerprint scanning circuit and display device Download PDFInfo
- Publication number
- CN111144346B CN111144346B CN201911398052.8A CN201911398052A CN111144346B CN 111144346 B CN111144346 B CN 111144346B CN 201911398052 A CN201911398052 A CN 201911398052A CN 111144346 B CN111144346 B CN 111144346B
- Authority
- CN
- China
- Prior art keywords
- transistor
- transistors
- control
- voltage
- fingerprint identification
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
Landscapes
- Engineering & Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
- Image Input (AREA)
- Measurement Of The Respiration, Hearing Ability, Form, And Blood Characteristics Of Living Organisms (AREA)
Abstract
The invention provides a fingerprint identification detection circuit, a fingerprint scanning circuit and a display device, wherein the gates of first to N transistors in all transistors of the fingerprint identification detection circuit are electrically connected to the same control signal end, so that the first to N transistors can complete the control process only through one driving circuit in the fingerprint scanning circuit, thereby reducing the number of the driving circuits and the number of corresponding scanning lines in the fingerprint scanning circuit, further simplifying the composition of the fingerprint scanning circuit, reducing the area of a frame occupied by the driving circuit and the area of a display area occupied by the scanning lines, and ensuring that the aperture ratio of the display device is high and conforms to the narrow frame trend.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a fingerprint identification detection circuit, a fingerprint scanning circuit, and a display device.
Background
The in-plane fingerprint identification technology is an important innovative technology in recent years and is a key technical index for realizing a real full-screen by mobile terminal product manufacturers. The prior fingerprint identification devices have capacitance type and ultrasonic type, and different types of fingerprint identification devices have advantages and disadvantages, but the common defect is that the induction distance of the fingerprint identification device is short, the structure and the performance of the fingerprint identification device are seriously limited, and the application of the fingerprint identification device in mobile terminal products is influenced.
Therefore, research and development personnel develop an optical fingerprint identification device, and the optical fingerprint identification device has the advantage of long-distance induction due to the fact that the optical fingerprint identification device identifies fingerprints, and is widely applied. However, the existing optical fingerprint identification structure occupies a large area, and cannot be well combined with an in-plane fingerprint identification technology to be used in a mobile terminal product.
Disclosure of Invention
In view of the above, the present invention provides a fingerprint identification detection circuit, a fingerprint scanning circuit and a display device, which effectively solve the technical problems in the prior art, and by optimizing the structure of the fingerprint identification detection circuit, the composition of the fingerprint scanning circuit is simplified, the occupied area of the fingerprint scanning circuit is reduced, and the display device is ensured to have a high aperture ratio and to meet the narrow frame trend.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
a fingerprint identification detection circuit comprises a plurality of transistors, wherein the transistors comprise a first transistor, a second transistor, a third transistor and a fourth transistor, the operation state of the first transistor is changed for the same time, the second transistor is changed for the same time, and N is an integer not less than 2; when the first transistor to the Nth transistor control the working state to change at any time:
when the conduction types of the first transistor to the Nth transistor are the same, and the first transistor to the Nth transistor are controlled to be changed from a first working state to a second working state, the duration of the second working state of the first transistor to the Nth transistor is nested in sequence; or, the first to N-th transistors include first to iN-th type transistors and first to jP-th type transistors, and the first N-type transistor to the iN-type transistor are controlled to be changed from the first working state to the second working state, the durations of the second working states of the first N-type transistor to the iN-type transistor are nested iN sequence, and when the first P-type transistor to the jP-type transistor are controlled to be changed into the first working state from the second working state, the duration time of the first working state from the first P-type transistor to the jP th-type transistor is nested in sequence, the duration time of the second working state of any N-type transistor and the duration time of the first working state of any P-type transistor are nested with each other, i and j are positive integers, and the sum of i and j is not more than N;
the gates of the first to nth transistors are electrically connected to the same control signal terminal.
Optionally, the threshold voltages of the first transistor to the nth transistor are different.
Optionally, when the conduction types of the first to nth transistors are the same, the control signal terminal outputs a first voltage to an N +1 th voltage, the first voltage is used to control the first to nth transistors to be in a first working state, the k +1 th voltage is only used to control the first to kth transistors to be in a second working state, and k is a positive integer not greater than N.
Optionally, the first transistor to the nth transistor are all N-type transistors, a threshold voltage of the h +1 th transistor is greater than a threshold voltage of the h-th transistor, and h is a positive integer not greater than N.
Optionally, the first transistor to the nth transistor are all P-type transistors, a threshold voltage of the h +1 th transistor is less than a threshold voltage of the h-th transistor, and h is a positive integer not greater than N.
Optionally, when the first to nth transistors include first to nth transistors and first to jP th transistors, and when the durations of the operating states of the first to nth transistors after control conversion are sequentially nested, the control signal terminal outputs a first voltage to an N +1 th voltage, the first voltage is used to control the operating states of the first to nth transistors before control conversion, the k +1 th voltage is only used to control the operating states of the first to kth transistors after control conversion, and k is a positive integer not greater than N.
Optionally, the fingerprint identification detection circuit includes: the reset module, the current generation module, the switch module, the photosensitive module and the storage module integrally comprise a plurality of transistors;
the reset module is used for transmitting an initialization voltage to a control node for resetting under the control of a reset signal, wherein the control node is a connecting node among the reset module, the current generation module, the photosensitive module and the storage module;
the photosensitive module is used for generating corresponding induced electric signals to the control node according to the induced optical signals;
the storage module is used for storing the signals of the control nodes;
the current generation module is used for generating corresponding induction leakage current according to the induction electric signals;
and the switch module is used for outputting the induced leakage current generated by the current generation module to a data reading circuit under the control of a scanning signal.
Optionally, the conduction types of the first to nth transistors are the same and N is 2, the switch module includes the first transistor, and the reset module includes the second transistor;
the grid electrodes of the first transistor and the second transistor are connected with the control signal end, the first end of the second transistor is connected with the initialization voltage, the second end of the second transistor is connected with the photosensitive module and the current generation module, the first end of the first transistor is connected with the current generation module, and the second end of the first transistor is connected with the data reading circuit.
Optionally, the first to nth transistors include a first N-type transistor and a first P-type transistor, the switching module includes the first N-type transistor, and the reset module includes the first P-type transistor and a connection control transistor;
the grid of first N type transistor with first P type transistor all connects the control signal end, the first end of first P type transistor is connected initialization voltage, the second end of first P type transistor is connected the first end of intercommunication control transistor with the current generation module, the second end of intercommunication control transistor is connected the sensitization module, the grid of intercommunication control transistor is connected the intercommunication control end, the first end of first N type transistor is connected the current generation module, the second end of first N type transistor is connected the data reading circuit.
Optionally, the light sensing module includes a photodiode, an anode of the photodiode is connected to a reference voltage, and a cathode of the photodiode is connected to the control node.
Optionally, the current generation module includes a voltage follower transistor, a gate of the voltage follower transistor is connected to the control node, a first end of the voltage follower transistor is connected to a power supply voltage, and a second end of the voltage follower transistor is connected to the switch module.
Correspondingly, the present invention also provides a fingerprint scanning circuit, which comprises:
the driving circuit of each stage is respectively connected with a scanning line;
and a plurality of fingerprint identification detection circuits connected to the scanning lines of each stage, wherein the fingerprint identification detection circuits are the fingerprint identification detection circuits, and the scanning lines are the control signal terminals connected to the gates of the first to nth transistors.
Correspondingly, the invention also provides a display device which comprises a display panel and the fingerprint scanning circuit.
Optionally, the display panel includes a display area, wherein the fingerprint identification detection circuit is located in the display area.
Compared with the prior art, the technical scheme provided by the invention at least has the following advantages:
the invention provides a fingerprint identification detection circuit, a fingerprint scanning circuit and a display device, wherein the fingerprint identification detection circuit comprises a plurality of transistors, the transistors comprise a first transistor to an Nth transistor, the working state of the first transistor is the same as the working state of the Nth transistor, and N is an integer not less than 2; when the first transistor to the Nth transistor control the working state to change at any time: when the conduction types of the first transistor to the Nth transistor are the same, and the first transistor to the Nth transistor are controlled to be changed from a first working state to a second working state, the duration of the second working state of the first transistor to the Nth transistor is nested in sequence; or, the first to N-th transistors include first to iN-th type transistors and first to jP-th type transistors, and the first N-type transistor to the iN-type transistor are controlled to be changed from the first working state to the second working state, the durations of the second working states of the first N-type transistor to the iN-type transistor are nested iN sequence, and when the first P-type transistor to the jP-type transistor are controlled to be changed into the first working state from the second working state, the duration time of the first working state from the first P-type transistor to the jP th-type transistor is nested in sequence, the duration time of the second working state of any N-type transistor and the duration time of the first working state of any P-type transistor are nested with each other, i and j are positive integers, and the sum of i and j is not more than N; the grid electrodes of the first transistor to the Nth transistor are all electrically connected to the same control signal end.
According to the technical scheme provided by the invention, the gates of the first transistor to the nth transistor in all the transistors of the fingerprint identification detection circuit are electrically connected to the same control signal end, so that the first transistor to the nth transistor can complete the control process only through one driving circuit in the fingerprint scanning circuit, the number of the driving circuits in the fingerprint scanning circuit and the number of corresponding scanning lines can be reduced, the composition of the fingerprint scanning circuit is simplified, the area of a frame occupied by the driving circuit and the area of a display area occupied by the scanning lines are reduced, and the display device is ensured to have high aperture ratio and conform to the narrow frame trend.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a timing diagram illustrating the operation state control and transition of a transistor in a fingerprint identification detection circuit according to an embodiment of the present invention;
FIG. 2 is a timing diagram illustrating the operation state control transition of a transistor in a fingerprint identification detection circuit according to an embodiment of the present invention;
FIG. 3 is a timing diagram illustrating the operation control transition of transistors in another fingerprint identification detection circuit according to an embodiment of the present invention;
FIG. 4 is a timing diagram illustrating the operation state control transition of a transistor in a fingerprint identification detection circuit according to another embodiment of the present invention;
FIG. 5 is a timing diagram illustrating the operation state control transition of a transistor in a fingerprint identification detection circuit according to another embodiment of the present invention;
FIG. 6 is a timing diagram illustrating the operation control transition of a transistor in a fingerprint identification detection circuit according to another embodiment of the present invention;
fig. 7 is a schematic structural diagram of a fingerprint identification detection circuit according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another fingerprint identification detection circuit according to an embodiment of the present invention;
FIG. 9 is a timing diagram of the fingerprint detection circuit of FIG. 8;
FIG. 10 is a schematic diagram of a fingerprint identification detection circuit according to another embodiment of the present invention;
FIG. 11 is a timing diagram of the fingerprint detection circuit of FIG. 10;
fig. 12 is a schematic structural diagram of a fingerprint scanning circuit according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As described in the background art, the optical fingerprint recognition device has the advantage of long-distance sensing due to the optical fingerprint recognition, and thus is widely used. However, the existing optical fingerprint identification structure occupies a large area, and cannot be well combined with an in-plane fingerprint identification technology to be used in a mobile terminal product. Specifically, the conventional optical fingerprint identification structure generally includes a plurality of transistors and photodiodes electrically connected to the transistors, and the plurality of transistors need different control circuits to control the transistors, so that the optical fingerprint identification structure occupies a large area.
Based on the above, the invention provides a fingerprint identification detection circuit, a fingerprint scanning circuit and a display device, which effectively solve the technical problems in the prior art, and by optimizing the structure of the fingerprint identification detection circuit, the composition of the fingerprint scanning circuit is simplified, the occupied area of the fingerprint scanning circuit is reduced, and the display device is ensured to have high aperture opening ratio and to meet the narrow frame trend.
In order to achieve the above object, the technical solutions provided by the present invention are described in detail below, specifically with reference to fig. 1 to 13.
Fig. 1 to fig. 3 are schematic diagrams of a transistor connection structure provided in an embodiment of the present invention, fig. 2 is a timing diagram for controlling and converting an operating state of a transistor in a fingerprint identification detection circuit provided in an embodiment of the present invention, and fig. 3 is a timing diagram for controlling and converting an operating state of a transistor in another fingerprint identification detection circuit provided in an embodiment of the present invention.
The fingerprint identification detection circuit provided by the embodiment of the invention as shown in fig. 1 comprises a plurality of transistors, and the plurality of transistors comprise a first transistor M1 to an nth transistor Mn with the same number of operation state control conversion times, wherein N is an integer not less than 2; when the first transistor M1 to the nth transistor Mn control the operation state to change at any time:
as shown in fig. 2, when the conduction types of the first transistor M1 to the N-th transistor Mn are the same, and the first transistor M1 to the N-th transistor Mn are controlled to shift from the first operating state S1 to the second operating state S2, wherein, in the sequential direction of the first transistor M1 to the N-th transistor Mn, the durations of the second operating states S2 of the first transistor M1 to the N-th transistor Mn are sequentially nested;
alternatively, as shown iN fig. 3, when the first to N-th transistors include first N-type transistors N1 to Ni and first P-type transistors P1 to P jP-type transistors Pj, and the first N-type transistors N1 to Ni are controlled to be changed from the first operating state S1 to the second operating state S2, the durations of the first N-type transistors N1 to the second operating state S2 of the i N-type transistors Ni are sequentially nested iN the sequential direction of the first N-type transistors N1 to i N-type transistors Ni, and the durations of the first P-type transistors P1 to P jP-type transistors Pj are controlled to be changed from the second operating state S2 to the first operating state S1, the durations of the first P-type transistors P1 to P jP-type transistors P1 are sequentially nested iN the sequential direction of the first P1 to P jP-type transistors P596, the duration of the second working state S2 of any N-type transistor and the duration of the first working state S1 of any P-type transistor are mutually nested, i and j are positive integers, and the sum of i and j is not more than N;
the gates of the first transistor M1 through the nth transistor Mn are all electrically connected to the same control signal terminal Cse.
It should be noted that the first operating state and the second operating state of the transistor provided in the embodiment of the present invention are an on state and an off state, and the first operating state and the second operating state are opposite operating states. Namely, when the first working state is a conducting state, the second working state is a cut-off state; and when the first working state is an off state, the second working state is an on state. In the embodiment of the present invention, the operation states of the first to nth transistors during specific control conversion are not limited, and the operation states need to be specifically designed according to the actual specific structure of the fingerprint identification detection circuit, and the first to nth transistors meet the above requirements each time the operation states are controlled and converted, so that the gates of the first to nth transistors are electrically connected to the same control signal terminal.
It can be understood that, in the fingerprint identification detection circuit provided by the embodiment of the present invention, when any one fingerprint identification detection is performed in the cyclic detection process of the fingerprint identification detection circuit, the number of times of the control conversion of the operating states of the first transistor to the nth transistor is the same. Further, referring to fig. 2, taking as an example that the conduction types of the first transistors M1 to N-th transistors Mn are all the same (for example, they are both N-type transistors or both P-type transistors), and the control transition of the operating states of the first transistors M1 to N-th transistors Mn is only one time during one time of fingerprint identification detection (the time period between the dotted lines in the figure is one time of fingerprint identification detection), the control transition types of the operating states of the first transistors M1 to N-th transistors Mn are the same, that is, the first transistors M1 to N-th transistors Mn are controlled to transition from the first operating state S1 to the second operating state S2, and the durations of the second operating states S2 of the first transistors M1 to N-th transistors Mn are sequentially nested in the sequential direction of the first transistors M1 to N-th transistors Mn.
Referring to fig. 2, the respective operating state durations of the transistors are sequentially nested, that is, the duration of the second operating state S2 of the first transistor M1 is longer than and overlaps the duration of the second operating state S2 of the second transistor M2, and so on, the duration of the second operating state S2 of the N-1 th transistor M (N-1) is longer than and overlaps the duration of the second operating state S2 of the nth transistor Mn; at this time, the gates of the first transistor M1 to the nth transistor Mn provided by the present invention can be electrically connected to the same control signal terminal, and the control signal output by the same control signal terminal achieves the purpose of controlling and transforming the operating state, thereby achieving the purpose of simplifying the fingerprint scanning circuit composition and reducing the occupied area thereof.
Or, in the fingerprint identification detection circuit provided in the embodiment of the present invention, when any one time of fingerprint identification detection in the cyclic detection process of the fingerprint identification detection circuit, the number of times of control conversion of the operating states of the first transistor to the nth transistor is the same. Further, referring to fig. 3, taking an example that the first to N-th transistors include first N-type transistors N1 to N-type transistors Ni and first P-type transistors P1 to P jP-type transistors Pj, and the control transition of the operating states of the first to N-th transistors is only one time at the time of fingerprint identification detection (the time period between the dotted lines iN the drawing is one time of fingerprint identification detection), the control transition types of the operating states of the first to N-type transistors N1 to Ni are the same, that is, the first to N-type transistors N1 to Ni are controlled from the first operating state S1 to the second operating state S2, and the durations of the second operating states S2 of the first to N-type transistors N1 to N-type transistors Ni are sequentially nested iN the sequential direction of the first to N-type transistors N1 to N-type transistors Ni, and the operating states of the first to P1 and the first to N-type transistors P jP are the control transition types of the operating states of the first to N-type transistors P jP and the control transition types of the operating states of the first and the first to N-type transistors P jP are the control transition transistors The operation state control conversion types of the first P-type transistor P1 to the jP th transistor Pj are opposite, namely the first P-type transistor P1 to the jP th transistor Pj are controlled to be converted into the first operation state S1 by the second operation state S2, and in the sequential direction of the first P-type transistor P1 to the jP th transistor Pj, the duration of the first operation state S1 of the first P-type transistor P1 to the jP th transistor Pj is nested in sequence, and the duration of the second operation state S2 of any one N-type transistor and the duration of the first operation state S1 of any one P-type transistor are nested with each other.
Referring to fig. 3, the N-type transistors are sequentially nested such that the duration of the second operating state S2 of the first N-type transistor N1 is greater than and overlaps the duration of the second operating state S2 of the second N-type transistor N2, and so on, the duration of the second operating state S2 of the i-1N-type transistor N (i-1) is greater than and overlaps the duration of the second operating state S2 of the i-th transistor Ni, the P-type transistors are sequentially nested such that the duration of the first operating state S1 of the first P-type transistor P1 is greater than and overlaps the duration of the first operating state S1 of the second P-type transistor P2, and so on, the duration of the first operating state S1 of the j-1P-type transistor P (j-1) is greater than and overlaps the duration of the first operating state S1 of the j-th transistor Pj, and of the duration of the second operating state S2 of any one N-type transistor and the duration of the first operating state S1 of any one P-type transistor, one duration is greater than and covers the other duration; at this time, the gates of the first transistor M1 to the nth transistor Mn (i.e., the gates of the first N-type transistor N1 to the nth transistor Ni and the gates of the first P-type transistor P1 to the jP type transistor Pj) provided by the present invention may be electrically connected to the same control signal terminal, so that the purpose of controlling and converting the operating state is achieved by the control signal output from the same control signal terminal, thereby achieving the purpose of simplifying the fingerprint scanning circuit composition and reducing the occupied area thereof.
In an embodiment of the present invention, the purpose of performing control conversion of the operating states of all the first to nth transistors through the same signal control terminal can be achieved by changing the threshold voltages of the first to nth transistors. The first transistor to the nth transistor provided in the embodiment of the present invention have different threshold voltages, and thus control signals output control voltages with different values, so as to achieve the purpose of performing a conversion control of a working state of a transistor having a threshold voltage that meets a corresponding voltage value and controls turning on or off of the transistor.
In an embodiment of the invention, when the conduction types of the first to nth transistors provided by the invention are the same, the control signal terminal outputs a first voltage to an N +1 th voltage, the first voltage is used for controlling the first to nth transistors to be in a first working state, the k +1 th voltage is only used for controlling the first to kth transistors to be in a second working state, and k is a positive integer not greater than N.
It can be understood that, in the embodiments of the present invention, the conduction types of the first to nth transistors are the same, and the threshold voltages of the first to nth transistors are different, for example, the gates of the first to nth transistors are electrically connected to the same control signal terminal, and the signal control terminal can output voltages of different values to control the transistors. The first transistor can be controlled to be in a first working state from the Nth transistor by the first voltage output by the signal control end, the first transistor can be controlled to be in a second working state from the first working state by the second voltage output by the signal control end, the second transistor can be controlled to be in the second working state from the first working state by the first voltage output by the signal control end, the second transistor can be controlled to be in the second working state from the first working state by the third voltage output by the signal control end, the third voltage is different from the first voltage and the second voltage, and the like.
In a specific embodiment of the present invention, the first to nth transistors are all N-type transistors, and the threshold voltage of the h +1 th transistor is greater than the threshold voltage of the h-th transistor, and h is a positive integer not greater than N. Referring to fig. 4, a timing chart for controlling and transforming the operating states of transistors in a fingerprint identification detection circuit according to another embodiment of the present invention is shown, where fig. 4 illustrates that the transistors are all N-type transistors and N is 2, and the first operating state is an off state and the second operating state is an on state; the gates of the first transistor M1 and the second transistor M2 are both electrically connected to the same signal control terminal Cse, and the threshold voltage of the second transistor M2 is greater than that of the first transistor M1; in the process of one-time fingerprint identification detection of the fingerprint identification detection circuit, when the signal control terminal Cse outputs the first voltage V1, the first voltage V1 controls the first transistor M1 and the second transistor M2 to be in a cut-off state; when the signal control terminal Cse outputs the second voltage V2 greater than the first voltage V1, the second voltage V2 controls the first transistor M1 to be in an on state and controls the second transistor M2 to be in an off state; and when the signal control terminal Cse outputs the third voltage V3 greater than the second voltage V2, the third voltage V3 controls both the first transistor M1 and the second transistor M2 to be in a conducting state. Further, when the first voltage V1, the second voltage V2, and the third voltage V3 are outputted in time series through the signal control terminal Cse, the first transistor M1 and the second transistor M2 can be controlled to be switched from the off state to the on state, and the on state duration of the first transistor M1 is longer than and overlaps the on state duration of the second transistor M2.
Similarly, the first to nth transistors provided in the embodiments of the present invention are all P-type transistors, and the threshold voltage of the h +1 th transistor is less than the threshold voltage of the h-th transistor, and h is a positive integer not greater than N. Referring to fig. 5, a timing chart for controlling and changing the operating states of transistors in a fingerprint identification detection circuit according to another embodiment of the present invention is shown, where fig. 5 illustrates that the transistors are P-type transistors and N is 2, and the first operating state is an off state and the second operating state is an on state; the gates of the first transistor M1 and the second transistor M2 are both electrically connected to the same signal control terminal Cse, and the threshold voltage of the second transistor M2 is less than that of the first transistor M1; in the process of one-time fingerprint identification detection of the fingerprint identification detection circuit, when the signal control terminal Cse outputs the first voltage V1, the first voltage V1 controls the first transistor M1 and the second transistor M2 to be in a cut-off state; when the signal control terminal Cse outputs the second voltage V2 smaller than the first voltage V1, the second voltage V2 controls the first transistor M1 to be in an on state and controls the second transistor M2 to be in an off state; and when the signal control terminal Cse outputs the third voltage V3 smaller than the second voltage V2, the third voltage V3 controls both the first transistor M1 and the second transistor M2 to be in a conducting state. Further, when the first voltage V1, the second voltage V2, and the third voltage V3 are outputted in time series through the signal control terminal Cse, the first transistor M1 and the second transistor M2 can be controlled to be switched from the off state to the on state, and the on state duration of the first transistor M1 is longer than and overlaps the on state duration of the second transistor M2.
iN an embodiment of the invention, when the first to nth transistors are switched iN any control operation state, the first to nth transistors include first to nth transistors and first to jP th transistors, and when the durations of the operation states after the switching of the first to nth transistors are sequentially nested, the control signal terminal outputs a first voltage to an N +1 th voltage, the first voltage is used to control the first to nth transistors to be iN the operation state before the switching, the k +1 th voltage is only used to control the first to kth transistors to be iN the operation state after the switching, and k is a positive integer not greater than N.
Specifically, referring to fig. 6, a timing chart illustrating the operation state control and transformation of transistors in the fingerprint identification detection circuit according to another embodiment of the present invention is provided, where in fig. 6, the fingerprint identification detection circuit includes a first N-type transistor N1 and a first P-type transistor P1, and when the first N-type transistor N1 and the first P-type transistor P1 control the operation state transformation once, the first N-type transistor N1 controls the operation state before transformation to be in an off state, and the first P-type transistor P1 controls the operation state before transformation to be in an on state, where gates of the first N-type transistor N1 and the first P-type transistor P1 are both electrically connected to the same signal control terminal Cse, and when the signal control terminal Cse outputs a first voltage V1, the first voltage V1 controls the first P-type transistor P1 to be in an on state and controls the first N-type transistor N1 to be in an off state; when the signal control terminal Cse outputs a second voltage V2 greater than the first voltage V1, the second voltage V2 controls both the first P-type transistor P1 and the first N-type transistor N1 to be in a conducting state; and when the signal control terminal Cse outputs the third voltage V3 greater than the second voltage V2, the third voltage V3 controls the first P-type transistor P1 to be in an off state and controls the first N-type transistor N1 to be in an on state, and the first N-type transistor N1 controls the duration of the on state after the transition to be greater than and covers the duration of the off state after the first P-type transistor P1 controls the transition.
The technical solution provided by the embodiment of the present invention is described in detail below with reference to a specific fingerprint identification detection circuit. Referring to fig. 7, a schematic structural diagram of a fingerprint identification detection circuit according to an embodiment of the present invention is shown, where the fingerprint identification detection circuit includes: the reset module 100, the current generation module 200, the switch module 300, the photosensitive module 400 and the storage module 500, and the reset module 100, the current generation module 200, the switch module 300, the photosensitive module 400 and the storage module 500 integrally include the plurality of transistors;
the reset module 100 is configured to transmit an initialization voltage VDD to a control node Q for resetting under the control of a reset signal, where the control node Q is a connection node between the reset module 100, the current generation module 200, the photosensitive module 400, and the storage module 500;
the light sensing module 400 is configured to generate a corresponding induced electrical signal to the control node Q according to the induced optical signal;
the storage module 500 is configured to store a signal of the control node Q;
the current generation module 200 is configured to generate a corresponding induced leakage current according to the induced electrical signal;
and the switch module 300 is configured to output the induced leakage current generated by the current generation module to a data reading line SL under the control of a scan signal.
In an embodiment of the present invention, the fingerprint identification detection circuit provided by the present invention may include a first transistor and a second transistor among the first to nth transistors. Referring to fig. 8, a schematic structural diagram of another fingerprint identification detection circuit according to an embodiment of the present invention is provided, wherein the conduction types of the first to nth transistors are the same and N is 2, the switch module includes the first transistor M1, and the reset module includes a second transistor M2;
the gates of the first transistor M1 and the second transistor M2 are both connected to the control signal terminal Cse, the first terminal of the second transistor M2 is connected to the initialization voltage VDD, the second terminal of the second transistor M2 is connected to the light sensing module and the current generation module, the first terminal of the first transistor M1 is connected to the current generation module, and the second terminal of the first transistor M1 is connected to the data reading line SL.
Referring to fig. 8, the light sensing module according to the embodiment of the present invention includes a photodiode D, an anode of the photodiode D is connected to a reference voltage Vref, and a cathode of the photodiode D is connected to the control node Q. And the current generation module provided by the embodiment of the present invention includes a voltage following transistor Ms, a gate of the voltage following transistor Ms is connected to the control node Q, a first end of the voltage following transistor Ms is connected to a power supply voltage, and a second end of the voltage following transistor Ms is connected to the switch module. Optionally, the power supply voltage provided in the embodiment of the present invention may be an initialization voltage, and the present invention is not particularly limited.
The memory module provided in the embodiment of the present invention includes a capacitor C, one plate of the capacitor C is electrically connected to the control node Q, and the other plate of the capacitor C may be connected to the reference voltage Vref (the present invention is not particularly limited, and may be connected to other voltage terminals).
Referring to fig. 8 and 9, fig. 9 is a timing diagram of the fingerprint identification detection circuit shown in fig. 8, wherein the fingerprint identification detection circuit includes a first stage T1, a second stage T2 and a third stage T3 during a fingerprint identification detection process, and before the first stage T1 and after the third stage T3, the signal control terminal Cse outputs a first voltage V1 to control both the first transistor M1 and the second transistor M2 to be in an off state;
during the first period T1, the signal control terminal Cse outputs the second voltage V2 greater than the first voltage V1 to control the first transistor M1 to be turned off and the second transistor M2 to be turned on; at this time, the optical signal sensed by the photodiode D generates a corresponding sensing electric signal to the control node Q, the voltage follower transistor Ms generates a corresponding sensing leakage current according to the sensing electric signal, and the second transistor M2 outputs the sensing leakage current to the data reading line SL;
in the second stage T2, the signal control terminal Cse outputs a third voltage V3 greater than the second voltage V2, and controls both the first transistor M1 and the second transistor M2 to be in a conducting state; at this time, the first transistor M1 is turned on to reset the structure electrically connected to the control node Q;
and, in the third stage T3, the signal control terminal Cse outputs the second voltage V2 to control the first transistor M1 to be in the off state and the second transistor M2 to be in the on state; at this time, the optical signal sensed by the photodiode D generates a corresponding sensing electric signal to the control node Q, the voltage follower transistor Ms generates a corresponding sensing leakage current according to the sensing electric signal, and the second transistor M2 outputs the sensing leakage current to the data reading line SL.
It can be understood that, in the fingerprint identification detection circuit provided by the embodiment of the present invention, the gates of the first transistor and the second transistor are electrically connected to the same signal control terminal, so that the composition of the fingerprint scanning circuit can be simplified and the occupied area of the fingerprint scanning circuit can be reduced on the basis of ensuring the normal operation of the fingerprint identification detection circuit.
In an embodiment of the present invention, the fingerprint identification detection circuit provided by the present invention may be of other types, and may include a first N-type transistor and a first P-type transistor among the first to nth transistors. Referring to fig. 10, a schematic structural diagram of a fingerprint identification detection circuit according to another embodiment of the present invention is provided, wherein the first to nth transistors include a first N-type transistor N1 and a first P-type transistor P1, the switch module includes the first N-type transistor N1, and the reset module includes the first P-type transistor P1 and a pass control transistor Mx;
the gates of the first N-type transistor N1 and the first P-type transistor P1 are both connected to the control signal terminal Cse, the first terminal of the first P-type transistor P1 is connected to the initialization voltage VDD, the second terminal of the first P-type transistor P1 is connected to the first terminal of the turn-on control transistor Mx and the current generation module, the second terminal of the turn-on control transistor Mx is connected to the photosensitive module, the gate of the turn-on control transistor Mx is connected to the turn-on control terminal Ts, the first terminal of the first N-type transistor N1 is connected to the current generation module, and the second terminal of the first N-type transistor N1 is connected to the data reading line SL.
Referring to fig. 10, the light sensing module according to the embodiment of the present invention includes a photodiode D, an anode of the photodiode D is connected to a reference voltage Vref, and a cathode of the photodiode D is connected to the control node Q. And the current generation module provided by the embodiment of the present invention includes a voltage following transistor Ms, a gate of the voltage following transistor Ms is connected to the control node Q, a first end of the voltage following transistor Ms is connected to a power supply voltage, and a second end of the voltage following transistor Ms is connected to the switch module. Optionally, the power supply voltage provided in the embodiment of the present invention may be an initialization voltage, and the present invention is not particularly limited.
The memory module provided in the embodiment of the present invention includes a capacitor C, one plate of the capacitor C is electrically connected to the control node Q, and the other plate of the capacitor C may be connected to the reference voltage Vref (the present invention is not particularly limited, and may be connected to other voltage terminals).
Referring to fig. 10 and 11, fig. 11 is a timing diagram of the fingerprint identification detection circuit shown in fig. 10, wherein the fingerprint identification detection circuit includes a first stage T1 and a second stage T2 during a fingerprint identification detection process, and before the first stage T1 and after the second stage T3, the signal control terminal Cse outputs a first voltage V1 to control the first N-type transistor N1 to be in an off state and the first P-type transistor P1 to be in an on state;
during the first period T1, the signal control terminal Cse outputs a second voltage V2 greater than the first voltage V1, controls the first P-type transistor P1 to remain in a conducting state and controls the first N-type transistor N1 to transition to a conducting state; at this time, the pass control transistor Mx is turned off, so that the first P-type transistor P1 transmits the initialization voltage VDD to the control node Q, and resets the structure electrically connected to the control node Q;
and, during the second stage T2, the signal control terminal Cse outputs a third voltage V3 greater than the second voltage V2, controls the first P-type transistor P1 to be turned off, and controls the first N-type transistor N1 to be kept on; at this time, the connection control transistor Mx is in a conducting state, the photo signal sensed by the photodiode D generates a corresponding sensing electric signal to the control node Q, the voltage follower transistor Ms generates a corresponding sensing leakage current according to the sensing electric signal, and the first N-type transistor N1 outputs the sensing leakage current to the data reading line SL.
It can be understood that, in the fingerprint identification detection circuit provided by the embodiment of the present invention, the gates of the first N-type transistor and the first P-type transistor are electrically connected to the same signal control terminal, so that the composition of the fingerprint scanning circuit can be simplified and the occupied area of the fingerprint scanning circuit can be reduced on the basis of ensuring that the fingerprint identification detection circuit can normally operate.
Correspondingly, the present invention further provides a fingerprint scanning circuit, which is shown in fig. 12 and is a schematic structural diagram of a fingerprint scanning circuit provided in an embodiment of the present invention, wherein the fingerprint scanning circuit provided in the embodiment of the present invention includes:
the driving circuit 1000 comprises a plurality of stages of driving circuits 1000, wherein each stage of driving circuit 1000 is respectively connected with a scanning line 2000;
and a plurality of fingerprint identification detection circuits 3000 connected to each of the scanning lines 2000, where the fingerprint identification detection circuit 3000 is a fingerprint identification detection circuit provided in any of the above embodiments, and the scanning line 1000 is a control signal terminal connected to gates of the first to nth transistors.
It can be understood that, by electrically connecting the gates of the first to nth transistors among all the transistors of the fingerprint identification detection circuit to the same control signal terminal (i.e., to the same scan line), the first to nth transistors can complete the control process only through one driving circuit in the fingerprint scanning circuit, thereby reducing the number of driving circuits in the fingerprint scanning circuit and the number of corresponding scan lines.
Correspondingly, the invention also provides a display device which comprises a display panel and the fingerprint scanning circuit. Optionally, the display device provided by the implementation of the present invention may be a mobile phone, a tablet computer, and the like, and the present invention is not particularly limited.
Optionally, the display panel provided in the embodiment of the present invention includes a display area, wherein the fingerprint identification detection circuit is located in the display area.
Fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present invention, wherein the display device includes a display panel 10;
the display panel 10 includes a display area AA and a non-display area located outside the display area AA, where the fingerprint identification detection circuit 3000 provided in the embodiment of the present invention is located in the display area AA; the multi-stage driving circuit 2000 provided by the embodiment of the invention is located in the non-display area SA.
In any embodiment of the present invention, in the fingerprint scanning circuit provided by the present invention, the multi-stage driving circuits may be all located on a single side of the non-display area in the display panel, or may be divided into two groups, which are respectively located on two sides of the non-display area, and the present invention is not limited to this.
The invention provides a fingerprint identification detection circuit, a fingerprint scanning circuit and a display device, wherein the conduction types of a first transistor to an Nth transistor are the same, and when the first transistor to the Nth transistor are controlled to be changed from a first working state to a second working state, the duration time of the second working state of the first transistor to the Nth transistor is nested in sequence; or, the first to N-th transistors include first to iN-th type transistors and first to jP-th type transistors, and the first N-type transistor to the iN-type transistor are controlled to be changed from the first working state to the second working state, the durations of the second working states of the first N-type transistor to the iN-type transistor are nested iN sequence, and when the first P-type transistor to the jP-type transistor are controlled to be changed into the first working state from the second working state, the duration time of the first working state from the first P-type transistor to the jP th-type transistor is nested in sequence, the duration time of the second working state of any N-type transistor and the duration time of the first working state of any P-type transistor are nested with each other, i and j are positive integers, and the sum of i and j is not more than N; the grid electrodes of the first transistor to the Nth transistor are all electrically connected to the same control signal end.
According to the technical scheme provided by the invention, the gates of the first transistor to the nth transistor in all the transistors of the fingerprint identification detection circuit are electrically connected to the same control signal end, so that the first transistor to the nth transistor can complete the control process only through one driving circuit in the fingerprint scanning circuit, the number of the driving circuits in the fingerprint scanning circuit and the number of corresponding scanning lines can be reduced, the composition of the fingerprint scanning circuit is simplified, the area of a frame occupied by the driving circuit and the area of a display area occupied by the scanning lines are reduced, and the display device is ensured to have high aperture ratio and conform to the narrow frame trend.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (14)
1. A fingerprint identification detection circuit is characterized by comprising a plurality of transistors, wherein the transistors comprise a first transistor, a second transistor, a third transistor and a fourth transistor, the switching times of the first transistor and the second transistor are the same, and N is an integer not less than 2; when the first transistor to the Nth transistor control the working state to change at any time:
when the conduction types of the first transistor to the Nth transistor are the same, and the first transistor to the Nth transistor are controlled to be changed from a first working state to a second working state, the duration of the second working state of the first transistor to the Nth transistor is nested in sequence; or, the first to N-th transistors include first to iN-th type transistors and first to jP-th type transistors, and the first N-type transistor to the iN-type transistor are controlled to be changed from the first working state to the second working state, the durations of the second working states of the first N-type transistor to the iN-type transistor are nested iN sequence, and when the first P-type transistor to the jP-type transistor are controlled to be changed into the first working state from the second working state, the duration time of the first working state from the first P-type transistor to the jP th-type transistor is nested in sequence, the duration time of the second working state of any N-type transistor and the duration time of the first working state of any P-type transistor are nested with each other, i and j are positive integers, and the sum of i and j is not more than N;
the grid electrodes of the first transistor to the Nth transistor are all electrically connected to the same control signal end.
2. The fingerprint identification detection circuit of claim 1, wherein the threshold voltages of the first through Nth transistors are different.
3. The fingerprint identification detection circuit of claim 2, wherein the first to nth transistors have the same conduction type, the control signal terminal outputs a first voltage to an N +1 th voltage, the first voltage is used to control the first to nth transistors to be in a first working state, the k +1 th voltage is only used to control the first to kth transistors to be in a second working state, and k is a positive integer not greater than N.
4. The fingerprint identification detection circuit of claim 3, wherein the first to Nth transistors are N-type transistors, and the threshold voltage of the h +1 th transistor is greater than the threshold voltage of the h-th transistor, h being a positive integer no greater than N.
5. The fingerprint identification detection circuit of claim 3, wherein the first through N transistors are P-type transistors, and the threshold voltage of the h +1 th transistor is less than the threshold voltage of the h-th transistor, h being a positive integer no greater than N.
6. The fingerprint identification detection circuit of claim 2, wherein when the first to nth transistors include first to nth transistors and first to jP th transistors, and when the durations of the operation states of the first to nth transistors after control conversion are nested iN sequence, the control signal terminal outputs first to N +1 th voltages, the first voltage is used to control the first to nth transistors to be iN the operation state before control conversion, the k +1 th voltage is only used to control the first to kth transistors to be iN the operation state after control conversion, and k is a positive integer not greater than N.
7. The fingerprint recognition detection circuit of any one of claims 1-6, wherein the fingerprint recognition detection circuit comprises: the reset module, the current generation module, the switch module, the photosensitive module and the storage module integrally comprise a plurality of transistors;
the reset module is used for transmitting an initialization voltage to a control node for resetting under the control of a reset signal, wherein the control node is a connection node among the reset module, the current generation module, the photosensitive module and the storage module;
the photosensitive module is used for generating corresponding induced electric signals to the control node according to the induced optical signals;
the storage module is used for storing the signals of the control nodes;
the current generation module is used for generating corresponding induction leakage current according to the induction electric signal;
and the switch module is used for outputting the induced leakage current generated by the current generation module to a data reading circuit under the control of a scanning signal.
8. The fingerprint identification detection circuit of claim 7, wherein the conduction types of the first to Nth transistors are the same and N is 2, the switch module comprises the first transistor, and the reset module comprises the second transistor;
the grid electrodes of the first transistor and the second transistor are connected with the control signal end, the first end of the second transistor is connected with the initialization voltage, the second end of the second transistor is connected with the photosensitive module and the current generation module, the first end of the first transistor is connected with the current generation module, and the second end of the first transistor is connected with the data reading circuit.
9. The fingerprint identification detection circuit of claim 7, wherein the first through nth transistors comprise a first N-type transistor and a first P-type transistor, the switch module comprises the first N-type transistor, and the reset module comprises the first P-type transistor and a pass control transistor;
the grid of first N type transistor with first P type transistor all connects the control signal end, the first end of first P type transistor is connected initialization voltage, the second end of first P type transistor is connected the first end of intercommunication control transistor with the current generation module, the second end of intercommunication control transistor is connected the sensitization module, the grid of intercommunication control transistor is connected the intercommunication control end, the first end of first N type transistor is connected the current generation module, the second end of first N type transistor is connected the data reading circuit.
10. The fingerprint identification detection circuit of claim 7, wherein the light sensing module comprises a photodiode, an anode of the photodiode is connected to a reference voltage, and a cathode of the photodiode is connected to the control node.
11. The fingerprint identification detection circuit of claim 7, wherein the current generation module comprises a voltage follower transistor, a gate of the voltage follower transistor is connected to the control node, a first terminal of the voltage follower transistor is connected to a power supply voltage, and a second terminal of the voltage follower transistor is connected to the switch module.
12. A fingerprint scanning circuit, comprising:
the driving circuit of each stage is respectively connected with a scanning line;
and a plurality of fingerprint identification detection circuits connected to the scan line of each stage, the fingerprint identification detection circuit being the fingerprint identification detection circuit of any one of claims 1 to 11, wherein the scan line is the control signal terminal connected to the gates of the first to nth transistors.
13. A display device, characterized in that the display device comprises a display panel and the fingerprint scanning circuit of claim 12.
14. The display device according to claim 13, wherein the display panel comprises a display area, and wherein the fingerprint detection circuit is located in the display area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911398052.8A CN111144346B (en) | 2019-12-30 | 2019-12-30 | Fingerprint identification detection circuit, fingerprint scanning circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911398052.8A CN111144346B (en) | 2019-12-30 | 2019-12-30 | Fingerprint identification detection circuit, fingerprint scanning circuit and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111144346A CN111144346A (en) | 2020-05-12 |
| CN111144346B true CN111144346B (en) | 2022-08-16 |
Family
ID=70522041
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911398052.8A Active CN111144346B (en) | 2019-12-30 | 2019-12-30 | Fingerprint identification detection circuit, fingerprint scanning circuit and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111144346B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111598050B (en) * | 2020-06-11 | 2023-11-24 | 京东方科技集团股份有限公司 | Fingerprint identification circuit, driving method thereof, touch panel and display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105138207A (en) * | 2015-09-23 | 2015-12-09 | 深圳信炜科技有限公司 | Sensing unit of capacitive sensor |
| CN105404881A (en) * | 2015-12-25 | 2016-03-16 | 成都费恩格尔微电子技术有限公司 | Fingerprint sensor assembly and preparation method thereof |
| CN107180611A (en) * | 2017-06-23 | 2017-09-19 | 京东方科技集团股份有限公司 | Fingerprint recognition and pixel-driving circuit and the display device with the circuit |
| CN108537179A (en) * | 2018-04-12 | 2018-09-14 | 京东方科技集团股份有限公司 | Fingerprint identification unit, fingerprint identification method and fingerprint identification device |
| CN110244482A (en) * | 2019-05-21 | 2019-09-17 | 华为技术有限公司 | A kind of display component, display screen and electronic equipment |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012056322A1 (en) * | 2010-10-27 | 2012-05-03 | Henryk Zaleski | Fast-switching dual-polarity ion mobility spectrometry |
| US11074495B2 (en) * | 2013-02-28 | 2021-07-27 | Z Advanced Computing, Inc. (Zac) | System and method for extremely efficient image and pattern recognition and artificial intelligence platform |
-
2019
- 2019-12-30 CN CN201911398052.8A patent/CN111144346B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105138207A (en) * | 2015-09-23 | 2015-12-09 | 深圳信炜科技有限公司 | Sensing unit of capacitive sensor |
| CN105404881A (en) * | 2015-12-25 | 2016-03-16 | 成都费恩格尔微电子技术有限公司 | Fingerprint sensor assembly and preparation method thereof |
| CN107180611A (en) * | 2017-06-23 | 2017-09-19 | 京东方科技集团股份有限公司 | Fingerprint recognition and pixel-driving circuit and the display device with the circuit |
| CN108537179A (en) * | 2018-04-12 | 2018-09-14 | 京东方科技集团股份有限公司 | Fingerprint identification unit, fingerprint identification method and fingerprint identification device |
| CN110244482A (en) * | 2019-05-21 | 2019-09-17 | 华为技术有限公司 | A kind of display component, display screen and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111144346A (en) | 2020-05-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10825413B2 (en) | Shift register circuit, gate driving circuit and method for driving the same, and display apparatus | |
| CN110858468B (en) | Shift register unit, shift register circuit and display device | |
| US9530521B2 (en) | Shift register unit, gate driving circuit, and display device | |
| US9437152B2 (en) | Scan driving circuit | |
| CN111179834B (en) | Light sensing driving circuit, driving method thereof and light sensing display device | |
| US11263941B2 (en) | Data driving circuit, driving method thereof, array substrate and display panel | |
| US20190325978A1 (en) | Shift register circuit, driving method thereof, and display device | |
| CN111144346B (en) | Fingerprint identification detection circuit, fingerprint scanning circuit and display device | |
| CN112017613A (en) | Charge sharing circuit and method, display driving module and display device | |
| CN113138477A (en) | Display panel and electronic device | |
| US11100306B1 (en) | Display panel and display device | |
| US11079272B2 (en) | Detection circuit and driving method therefor, detection substrate and detection device comprising a second storage sub-circuit group with a second voltage terminal group and a second control signal terminal group | |
| US11397494B2 (en) | Pixel detecting circuit, method for driving the same, and touch display panel | |
| US20140014815A1 (en) | Ramp signal generator for cmos image sensor | |
| CN114758621B (en) | Single-path slope type analog pixel driving circuit and driving method thereof | |
| US11942864B2 (en) | Voltage conversion circuit and display device | |
| CN212343647U (en) | MOS tube switch circuit and system thereof, power supply, door lock and alarm switch circuit system | |
| CN101789213A (en) | Shift register circuit and grid electrode driving circuit | |
| CN111210786B (en) | Shifting register unit, grid driving circuit, display substrate and display device | |
| CN112906444B (en) | Active pixel sensor array, display panel and electronic device | |
| US11270093B2 (en) | Display panel and display device | |
| CN210041647U (en) | Double-charge-pump parallel booster circuit | |
| US10950324B2 (en) | Shift register unit, shift register, gate driving circuit and display panel | |
| CN108781071B (en) | Square wave generating method and square wave generating circuit | |
| CN111028770A (en) | Display panel and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |