CN111142937B - 向量归约处理器 - Google Patents

向量归约处理器 Download PDF

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Publication number
CN111142937B
CN111142937B CN201911179581.9A CN201911179581A CN111142937B CN 111142937 B CN111142937 B CN 111142937B CN 201911179581 A CN201911179581 A CN 201911179581A CN 111142937 B CN111142937 B CN 111142937B
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vector
reduction
circuit
input vector
unit
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CN111142937A (zh
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格雷戈里·米歇尔·索尔森
安德鲁·埃弗里特·菲尔普斯
奥利维尔·泰马姆
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/084—Backpropagation, e.g. using gradient descent

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Algebra (AREA)
  • Computational Linguistics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Health & Medical Sciences (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Complex Calculations (AREA)
  • Image Processing (AREA)
  • Peptides Or Proteins (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
CN201911179581.9A 2017-04-03 2018-02-06 向量归约处理器 Active CN111142937B (zh)

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Application Number Priority Date Filing Date Title
CN201911179581.9A CN111142937B (zh) 2017-04-03 2018-02-06 向量归约处理器

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US15/477,791 2017-04-03
US15/477,791 US10108581B1 (en) 2017-04-03 2017-04-03 Vector reduction processor
CN201911179581.9A CN111142937B (zh) 2017-04-03 2018-02-06 向量归约处理器
CN201810118791.6A CN108694055B (zh) 2017-04-03 2018-02-06 向量归约处理器

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CN111142937B true CN111142937B (zh) 2023-11-24

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EP (2) EP4086760B1 (https=)
JP (3) JP7055809B2 (https=)
KR (3) KR102256109B1 (https=)
CN (2) CN111142937B (https=)
DK (2) DK3552094T3 (https=)
FI (1) FI4086760T3 (https=)
TW (5) TWI828502B (https=)
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Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10936942B2 (en) 2017-11-21 2021-03-02 Google Llc Apparatus and mechanism for processing neural network tasks using a single chip package with multiple identical dies
US11277455B2 (en) 2018-06-07 2022-03-15 Mellanox Technologies, Ltd. Streaming system
US20200106828A1 (en) * 2018-10-02 2020-04-02 Mellanox Technologies, Ltd. Parallel Computation Network Device
US11625393B2 (en) 2019-02-19 2023-04-11 Mellanox Technologies, Ltd. High performance computing system
EP3699770B1 (en) 2019-02-25 2025-05-21 Mellanox Technologies, Ltd. Collective communication system and methods
US11294670B2 (en) 2019-03-27 2022-04-05 Intel Corporation Method and apparatus for performing reduction operations on a plurality of associated data element values
CN110069737B (zh) * 2019-04-19 2020-08-14 北京三快在线科技有限公司 内容生成方法、装置、计算机设备及存储介质
US11216281B2 (en) * 2019-05-14 2022-01-04 International Business Machines Corporation Facilitating data processing using SIMD reduction operations across SIMD lanes
US10997116B2 (en) * 2019-08-06 2021-05-04 Microsoft Technology Licensing, Llc Tensor-based hardware accelerator including a scalar-processing unit
CN110580288B (zh) * 2019-08-23 2022-09-09 腾讯科技（深圳）有限公司 基于人工智能的文本分类方法和装置
CN111105042B (zh) * 2019-12-13 2023-07-25 广东浪潮大数据研究有限公司 一种并行消息处理方法、系统及相关装置
US11750699B2 (en) 2020-01-15 2023-09-05 Mellanox Technologies, Ltd. Small message aggregation
US11252027B2 (en) 2020-01-23 2022-02-15 Mellanox Technologies, Ltd. Network element supporting flexible data reduction operations
US11876885B2 (en) 2020-07-02 2024-01-16 Mellanox Technologies, Ltd. Clock queue with arming and/or self-arming features
US11556378B2 (en) 2020-12-14 2023-01-17 Mellanox Technologies, Ltd. Offloading execution of a multi-task parameter-dependent operation to a network device
GB202202744D0 (en) * 2022-02-28 2022-04-13 Graphcore Ltd Floating point norm instruction
GB2616601B (en) * 2022-03-11 2024-05-08 Advanced Risc Mach Ltd Sub-vector-supporting instruction for scalable vector instruction set architecture
US12309070B2 (en) 2022-04-07 2025-05-20 Nvidia Corporation In-network message aggregation for efficient small message transport
US20240004647A1 (en) * 2022-07-01 2024-01-04 Andes Technology Corporation Vector processor with vector and element reduction method
US20240004662A1 (en) * 2022-07-02 2024-01-04 Intel Corporation Instructions and support for horizontal reductions
US11922237B1 (en) 2022-09-12 2024-03-05 Mellanox Technologies, Ltd. Single-step collective operations
US12489657B2 (en) 2023-08-17 2025-12-02 Mellanox Technologies, Ltd. In-network compute operation spreading

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101206588A (zh) * 2006-12-15 2008-06-25 国际商业机器公司 用于在多个进程之间分配计算操作的方法和装置
WO2014051720A1 (en) * 2012-09-28 2014-04-03 Intel Corporation Accelerated interlane vector reduction instructions

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4839845A (en) 1986-03-31 1989-06-13 Unisys Corporation Method and apparatus for performing a vector reduction
US5423051A (en) 1992-09-24 1995-06-06 International Business Machines Corporation Execution unit with an integrated vector operation capability
JP3334330B2 (ja) 1994-05-17 2002-10-15 日産自動車株式会社 燃料噴射弁
JPH0877142A (ja) 1994-08-31 1996-03-22 Fujitsu Ltd ベクトルプロセッサ
KR100267089B1 (ko) * 1996-08-19 2000-11-01 윤종용 스칼라/벡터연산이조합된단일명령복수데이터처리
TW361051B (en) * 1997-01-09 1999-06-11 Matsushita Electric Industrial Co Ltd Motion vector detection apparatus
JP3857614B2 (ja) 2002-06-03 2006-12-13 松下電器産業株式会社 プロセッサ
EP1623307B1 (en) * 2003-05-09 2015-07-01 QUALCOMM Incorporated Processor reduction unit for accumulation of multiple operands with or without saturation
US7797363B2 (en) 2004-04-07 2010-09-14 Sandbridge Technologies, Inc. Processor having parallel vector multiply and reduce operations with sequential semantics
US20060101244A1 (en) * 2004-11-10 2006-05-11 Nvidia Corporation Multipurpose functional unit with combined integer and floating-point multiply-add pipeline
WO2007049150A2 (en) 2005-09-28 2007-05-03 Arc International (Uk) Limited Architecture for microprocessor-based systems including simd processing unit and associated systems and methods
EP1936492A1 (en) 2006-12-22 2008-06-25 Telefonaktiebolaget LM Ericsson (publ) SIMD processor with reduction unit
US7953684B2 (en) * 2007-01-31 2011-05-31 International Business Machines Corporation Method and system for optimal parallel computing performance
US20090150648A1 (en) * 2007-12-06 2009-06-11 Eric Oliver Mejdrich Vector Permute and Vector Register File Write Mask Instruction Variant State Extension for RISC Length Vector Instructions
US8209525B2 (en) * 2008-08-15 2012-06-26 Apple Inc. Method and apparatus for executing program code
US8417921B2 (en) * 2008-08-15 2013-04-09 Apple Inc. Running-min and running-max instructions for processing vectors using a base value from a key element of an input vector
US20120023308A1 (en) 2009-02-02 2012-01-26 Renesas Electronics Corporation Parallel comparison/selection operation apparatus, processor, and parallel comparison/selection operation method
FR2949637B1 (fr) 2009-08-28 2011-09-23 Commissariat Energie Atomique Dispositif de calcul reconfigurable sur voisinage flexible de pixels
US8447954B2 (en) * 2009-09-04 2013-05-21 International Business Machines Corporation Parallel pipelined vector reduction in a data processing system
US8458243B1 (en) 2010-03-03 2013-06-04 Altera Corporation Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering
US9141386B2 (en) * 2010-09-24 2015-09-22 Intel Corporation Vector logical reduction operation implemented using swizzling on a semiconductor chip
US20120290819A1 (en) 2011-05-09 2012-11-15 Altera Corporation Dsp block with embedded floating point structures
WO2013147869A1 (en) 2012-03-30 2013-10-03 Intel Corporation Apparatus and method for selecting elements of a vector coumputation
US9342479B2 (en) * 2012-08-23 2016-05-17 Qualcomm Incorporated Systems and methods of data extraction in a vector processor
US9921832B2 (en) * 2012-12-28 2018-03-20 Intel Corporation Instruction to reduce elements in a vector register with strided access pattern
US20150052330A1 (en) 2013-08-14 2015-02-19 Qualcomm Incorporated Vector arithmetic reduction
GB2519108A (en) * 2013-10-09 2015-04-15 Advanced Risc Mach Ltd A data processing apparatus and method for controlling performance of speculative vector operations
US20150143076A1 (en) 2013-11-15 2015-05-21 Qualcomm Incorporated VECTOR PROCESSING ENGINES (VPEs) EMPLOYING DESPREADING CIRCUITRY IN DATA FLOW PATHS BETWEEN EXECUTION UNITS AND VECTOR DATA MEMORY TO PROVIDE IN-FLIGHT DESPREADING OF SPREAD-SPECTRUM SEQUENCES, AND RELATED VECTOR PROCESSING INSTRUCTIONS, SYSTEMS, AND METHODS
US9355061B2 (en) * 2014-01-28 2016-05-31 Arm Limited Data processing apparatus and method for performing scan operations
CN103995688B (zh) * 2014-05-30 2016-10-12 广东顺德中山大学卡内基梅隆大学国际联合研究院 一种基于标签的无序矢量归约电路
US9851970B2 (en) * 2014-12-23 2017-12-26 Intel Corporation Method and apparatus for performing reduction operations on a set of vector elements
US9805303B2 (en) * 2015-05-21 2017-10-31 Google Inc. Rotating data for neural network computations
US10192162B2 (en) * 2015-05-21 2019-01-29 Google Llc Vector computation unit in a neural network processor
US9537530B1 (en) * 2015-06-26 2017-01-03 Intel Corporation Transceiver device and method of processing signals
US10146535B2 (en) * 2016-10-20 2018-12-04 Intel Corporatoin Systems, apparatuses, and methods for chained fused multiply add
US9959247B1 (en) * 2017-02-17 2018-05-01 Google Llc Permuting in a matrix-vector processor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101206588A (zh) * 2006-12-15 2008-06-25 国际商业机器公司 用于在多个进程之间分配计算操作的方法和装置
WO2014051720A1 (en) * 2012-09-28 2014-04-03 Intel Corporation Accelerated interlane vector reduction instructions
CN104603766A (zh) * 2012-09-28 2015-05-06 英特尔公司 经加速的通道间的向量归约指令

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HK1259157A1 (zh) 2019-11-29
US20240168914A1 (en) 2024-05-23
FI4086760T3 (fi) 2024-06-17
KR102347374B1 (ko) 2022-01-04
JP7485820B2 (ja) 2024-05-16
JP2020513120A (ja) 2020-04-30
JP7055809B2 (ja) 2022-04-18
EP4086760A1 (en) 2022-11-09
EP3552094A1 (en) 2019-10-16
TWI738042B (zh) 2021-09-01
US20200334198A1 (en) 2020-10-22
KR20210060665A (ko) 2021-05-26
JP2023085414A (ja) 2023-06-20
US20180285316A1 (en) 2018-10-04
TW201837703A (zh) 2018-10-16
KR102256109B1 (ko) 2021-05-24
CN111142937A (zh) 2020-05-12
JP2022095817A (ja) 2022-06-28
DK3552094T3 (da) 2022-09-19
CN108694055A (zh) 2018-10-23
TW202144999A (zh) 2021-12-01
US10706007B2 (en) 2020-07-07
WO2018186918A1 (en) 2018-10-11
DK4086760T3 (da) 2024-06-17
US10108581B1 (en) 2018-10-23
TW202318227A (zh) 2023-05-01
US20190012294A1 (en) 2019-01-10
EP4086760B1 (en) 2024-03-20
TW202429313A (zh) 2024-07-16
US11940946B2 (en) 2024-03-26
CN108694055B (zh) 2019-12-24
US20210318983A1 (en) 2021-10-14
KR102471597B1 (ko) 2022-11-25
KR20190092561A (ko) 2019-08-07
TWI828502B (zh) 2024-01-01
US12499081B2 (en) 2025-12-16
US11061854B2 (en) 2021-07-13
TWI791262B (zh) 2023-02-01
TW201947393A (zh) 2019-12-16
KR20220003666A (ko) 2022-01-10
JP7256914B2 (ja) 2023-04-12
EP3552094B1 (en) 2022-06-29
TWI673648B (zh) 2019-10-01

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