CN111124942A - Method for effectively averaging erasing times of flash memory block - Google Patents

Method for effectively averaging erasing times of flash memory block Download PDF

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Publication number
CN111124942A
CN111124942A CN201911056099.6A CN201911056099A CN111124942A CN 111124942 A CN111124942 A CN 111124942A CN 201911056099 A CN201911056099 A CN 201911056099A CN 111124942 A CN111124942 A CN 111124942A
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China
Prior art keywords
flash memory
memory block
block
flash
error checking
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CN201911056099.6A
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Chinese (zh)
Inventor
张盛豪
魏智汎
王展南
谢享奇
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Jiangsu Huacun Electronic Technology Co Ltd
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Jiangsu Huacun Electronic Technology Co Ltd
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Priority to CN201911056099.6A priority Critical patent/CN111124942A/en
Priority to PCT/CN2019/119670 priority patent/WO2021082108A1/en
Publication of CN111124942A publication Critical patent/CN111124942A/en
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7211Wear leveling

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention discloses a method for effectively averaging the erasing times of a flash memory block, which comprises the following steps: A. completing the complete writing of the flash memory block; B. waiting for entering a stable period; C. reading out the last flash memory page of the flash memory block; D. checking the status of error checking and correction; E. if the error rate of error checking and correcting is higher, adding m to the erasing times of the flash memory block; F. the size of m is adjusted by the error rate rise of error checking and correction. After the complete writing of the flash block is completed and a period of time has elapsed, a stabilization period is entered. At this point, the last flash page of the flash block is read. The status of error checking and correction is checked. If the error rate of error checking and correction is high, m is added to the number of times of erasing the flash block. The size of m can also be adjusted by error checking and correcting the error rate increase. The average flash block erasing times can be effectively increased.

Description

Method for effectively averaging erasing times of flash memory block
Technical Field
The invention relates to the technical field of flash memories, in particular to a method for effectively averaging the erasing times of a flash memory block
Background
Flash memory is a long-lived, non-volatile (maintaining stored data information in the event of a power failure) memory, with data erasures not in individual bytes but in fixed blocks (note: NOR Flash is a byte store), typically 256KB to 20MB in block size. Flash memory is a variation of electrically erasable read-only memory (EEPROM) which, unlike EEPROM, can be erased and rewritten on a byte level rather than being erased on an entire chip, whereas most chips of flash memory require block erasure. Flash memory is commonly used to store setup information, such as BIOS (basic program) of a computer, PDA (personal digital assistant), digital camera, etc., because it can still store data when it is powered off.
The flash memory block is written in by all the flash memory blocks and then erased, namely, the erasing times of the flash memory block are once. However, the flash memory original factory guarantees that the erasing times can reach more than n times. Therefore, when the number of times of erasing the flash memory block reaches n, different main control manufacturers can judge whether each flash memory block reaches the maximum number of times of erasing by using the erase count table, and further, the flash memory block is classified as a damaged flash memory block. Then the data is lost into a flash bad block record table and marked as a flash bad block.
Disclosure of Invention
The present invention is directed to a method for effectively averaging the erase times of a flash block, so as to solve the above-mentioned problems in the prior art.
In order to achieve the purpose, the invention provides the following technical scheme: a method for efficiently averaging flash block erase times, comprising the steps of:
A. completing the complete writing of the flash memory block;
B. waiting for entering a stable period;
C. reading out the last flash memory page of the flash memory block;
D. checking the status of error checking and correction;
E. if the error rate of error checking and correcting is higher, adding m to the erasing times of the flash memory block;
F. the size of m is adjusted by the error rate rise of error checking and correction.
Preferably, in the step E,
Figure RE-RE-DEST_PATH_IMAGE002
preferably, when the error rate of error checking and correcting reaches one half of the correctable value, 4 bits are used to calculate the m value; if the error rate of error checking and correction rises to two-thirds of the correctable value, then 5 bits can be used to calculate the m value.
Preferably, in step a, a temporary storage is provided in the flash memory block, the flash memory block has 1024 blocks, each block has 256 pages, and each page has 32 sectors combined together.
Compared with the prior art, the invention has the beneficial effects that: the invention provides a method capable of effectively increasing the erasing times of an average flash memory block. Since the lifetime strength of each flash block is not all the same. The life intensity of each flash memory block is judged by the error rate of error checking and correction, and the erasing times of the flash memory blocks are properly adjusted by using the error checking and correction, so that the effective average erasing times of the flash memory blocks are achieved by using the method.
Drawings
FIG. 1 is a flow chart of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the present invention provides a technical solution: a method for efficiently averaging flash block erase times, comprising the steps of:
A. completing the complete writing of the flash memory block;
B. waiting for entering a stable period;
C. reading out the last flash memory page of the flash memory block;
D. checking the status of error checking and correction;
E. if the error rate of error checking and correcting is higher, adding m to the erasing times of the flash memory block;
F. the size of m is adjusted by the error rate rise of error checking and correction.
In the present invention, in the step E,
Figure RE-RE-DEST_PATH_IMAGE002A
(ii) a When the error rate of error checking and correcting reaches one half of the correctable value, adopting 4 bits to calculate the m value; if the error rate of error checking and correction rises to two-thirds of the correctable value, then 5 bits can be used to calculate the m value.
In the invention, in the step A, a temporary storage is arranged in a flash memory block, the flash memory block has 1024 blocks, each block has 256 pages, and each page has 32 sectors.
The invention provides a method capable of effectively increasing the erasing times of an average flash memory block. Since the lifetime strength of each flash block is not all the same. The life intensity of each flash memory block is judged by the error rate of error checking and correction, and the erasing times of the flash memory blocks are properly adjusted by using the error checking and correction, so that the effective average erasing times of the flash memory blocks are achieved by using the method.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (4)

1. A method for efficiently averaging flash block erase times, comprising: the method comprises the following steps:
A. completing the complete writing of the flash memory block;
B. waiting for entering a stable period;
C. reading out the last flash memory page of the flash memory block;
D. checking the status of error checking and correction;
E. if the error rate of error checking and correcting is higher, adding m to the erasing times of the flash memory block;
F. the size of m is adjusted by the error rate rise of error checking and correction.
2. The method of claim 1, further comprising the step of: in the step E, the step of the method is carried out,
Figure RE-FDA0002430152810000011
3. the method of claim 2, further comprising the step of: when the error rate of error checking and correcting reaches one half of the correctable value, adopting 4 bits to calculate the m value; if the error rate of error checking and correction rises to two-thirds of the correctable value, then 5 bits can be used to calculate the m value.
4. The method of claim 1, further comprising the step of: in the step A, a temporary storage is arranged in a flash memory block, the flash memory block has 1024 blocks, each block has 256 pages, and each page has 32 sectors.
CN201911056099.6A 2019-10-31 2019-10-31 Method for effectively averaging erasing times of flash memory block Withdrawn CN111124942A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201911056099.6A CN111124942A (en) 2019-10-31 2019-10-31 Method for effectively averaging erasing times of flash memory block
PCT/CN2019/119670 WO2021082108A1 (en) 2019-10-31 2019-11-20 Method for effectively averaging erasing frequency of flash memory block

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911056099.6A CN111124942A (en) 2019-10-31 2019-10-31 Method for effectively averaging erasing times of flash memory block

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WO (1) WO2021082108A1 (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8051241B2 (en) * 2009-05-07 2011-11-01 Seagate Technology Llc Wear leveling technique for storage devices
CN105405462B (en) * 2015-12-01 2019-10-29 清华大学 NAND Flash storage system high eroded area data pre-emphasis method
US10318163B2 (en) * 2016-03-30 2019-06-11 EMC IP Holding Company LLC Balancing SSD wear in data storage systems
CN106775474B (en) * 2016-12-16 2020-01-10 苏州浪潮智能科技有限公司 Nand Flash wear leveling method and device and memory
CN109542354B (en) * 2018-11-28 2021-08-13 广东工业大学 Wear leveling method, device and equipment based on upper limit erasure

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