CN111106823B - Millimeter wave on-off keying modulator with high isolation and stable input matching - Google Patents
Millimeter wave on-off keying modulator with high isolation and stable input matching Download PDFInfo
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Abstract
The invention discloses a millimeter wave on-off keying modulator with high isolation and stable input matching, which comprises a common source circuit, a transformer and an improved laminated common-gate switching circuit, wherein the improved laminated common-gate switching circuit is added with a series inductor, a lower-layer switching transistor and an upper-layer switching transistor on the basis of the traditional laminated common-gate switching circuit; in addition, the common-source circuit and the improved laminated common-gate switching circuit are coupled through the transformer, so that small size, low voltage and high gain are realized, the influence of input impedance change of the improved laminated common-gate switching circuit in an on/off state on input matching of the modulator is further reduced, and more stable input matching is realized.
Description
Technical Field
The invention belongs to the technical field of microwave and millimeter waves, relates to a millimeter wave on-off keying modulator, and particularly relates to a millimeter wave on-off keying modulator with high isolation and stable input matching.
Background
In recent years, with the development of fifth generation mobile communication (5G) and internet of things (IoT) technologies, millimeter wave on-off keying (OOK) wireless communication systems with high speed, low cost and low power consumption have gained much attention. The OOK modulator is a key device in an OOK transceiving system, and its main performance indexes include modulation rate, gain, on/off isolation, input matching stability, and the like.
The simplest OOK modulators use an OOK signal to directly control the on and off of the oscillator, and although they can achieve high on/off isolation, the modulation rate is limited by the on and off times of the oscillator. Another OOK modulator is based on single-pole single-throw switches, which can achieve high modulation rate, but usually suffer from problems of low gain (insertion loss) and insufficient on/off isolation, especially in the millimeter wave band. Although a double balanced structure may be used to improve the isolation of the switch, this further increases the insertion loss of the switch and also increases the area of the switch. Another OOK modulator uses an OOK signal to control the on/off of an amplifier, so as to solve the problem of low switching gain, but the problem of insufficient on/off isolation still exists. It is proposed in the literature to connect in parallel a controllable impedance unit to "ground" in an OOK modulator based on an amplifier architecture, the unit operating in a high impedance state when the modulator is on and in a low impedance state when the modulator is off, thus achieving high on/off isolation without affecting the gain and power consumption of the modulator. However, these OOK modulators also have a problem of excessive variation in input impedance in the on/off state, i.e., a problem of unstable input matching. During operation of an OOK modulator, high-rate, large input impedance variations may cause unstable operation of the oscillator or signal source at the front stage of the modulator.
Therefore, it is necessary to invent a novel millimeter wave OOK modulator, which has stable input matching and at the same time has high modulation rate, high gain and high on/off isolation.
Disclosure of Invention
The invention provides a novel millimeter wave OOK modulator which is stable in input matching in an on/off state and has high on/off isolation.
The invention adopts the following technical scheme:
a millimeter wave OOK modulator with high isolation and stable input matching comprises a common source circuit and a transformer T 1 The improved stacked common-gate switching circuit; a transformer T is arranged between the common source circuit and the improved laminated common gate switching circuit 1 Coupling is carried out;
the improved stacked common-gate switching circuit is formed by adding a series inductor L into a traditional stacked common-gate switching circuit S2 Lower layer switching transistor M 4 Upper switching transistor M 5 (ii) a Wherein, the lower and upper switch transistors M 4 And M 5 The drain electrode of the first-stage inverter I is respectively connected with the source electrodes of the lower-layer and upper-layer common-gate transistors of the traditional stacked common-gate switching circuit, and the grid electrode of the first-stage inverter I is connected with the first-stage inverter I of the traditional stacked common-gate switching circuit 1 Output terminal of (1), second stage inverter I 2 The input end of the first transistor is connected with the ground, and the source electrode of the first transistor is grounded; series inductance L S2 And is connected between the drain electrode of the lower common-gate transistor and the source electrode of the upper common-gate transistor of the traditional stacked common-gate switching circuit.
The invention improves the upper layer common-gate transistor M in the stacked common-gate switch circuit by controlling 3 To achieve OOK modulation. When the control signal is high level, the lower common-gate transistor M 2 And an upper common gate transistor M 3 In the saturation region, the lower switching transistor M 4 And an upper switching transistor M 5 In the cut-off region, the improved stacked common-gate switching circuit is in a conducting state. For a conventional stacked common-gate switching circuit, its input impedance (Z) in the on state X_ON ) Can be represented as Z X_ON ＝1/g m2 In which g is m2 Is a lower common-gate transistor M 2 Transconductance of (1). For the improved stacked common-gate switching circuit, the series inductance L S2 On one hand, the influence of the parasitic capacitance of partial transistors on the circuit gain can be counteracted, and on the other hand, Z is caused X_ON A certain frequency dependence is exhibited, which is not good for wideband matching, and therefore, a compromise between the frequency dependence of the gain and the input impedance is required when selecting the series inductance value. When the control signal is at low level, the upper common-gate transistor M 3 In the cut-off region, the lower common-gate transistor M 2 Lower layer switching transistor M 4 And an upper switching transistor M 5 And in a deep linear region, the improved stacked common-gate switching circuit is in an off state. The transistor in the deep linear region can be equivalent to a linear resistor with controllable resistance value R on Can be expressed as:
wherein L and W are respectively the gate length and the gate width of the transistor, and V GS Is the voltage between the gate and the source of the transistor, mu n C ox Is a process constant, V TH Is a threshold voltage determined by the process. For switching transistors M in the deep linear region 4 And M 5 In other words, since their sources are grounded (source voltage is 0), V GS I.e. their gate voltages, are supplied by a first inverter I 1 The power supply voltage of (1) is determined to be 1V in the present invention. In addition, in millimeter wave applications, the minimum gate length that can be fabricated by the process is usually selected for the transistor to obtain the best rf characteristics, so that only W remains in equation (1) as a variable. Can be adjusted by adjusting the lower switch transistor M 4 And an upper switching transistor M 5 To optimize their resistance values, to make the input impedance (Z) of the improved stacked common-gate switching circuit in the off state X_OFF ) As close to Z as possible X_ON I.e. let the absolute value (| Z) of the difference between the two X_OFF -Z X_ON |) to reduce input impedance variations in the on/off state of the improved stacked common-gate switching circuit. In addition, because the two linear resistors are connected to the ground in parallel in the signal path in the off state, the leaked radio frequency signal can be guided to the ground, and the isolation degree of the circuit is improved. In particular, the series inductance L S2 Also in such a way that X_OFF -Z X_ON In the process of |, a switching transistor with a larger gate width (a smaller linear resistor) can be selected, which is beneficial to further improvement of on/off isolation.
Furthermore, a transformer is arranged between the common source circuit and the improved laminated common gate switching circuitT 1 Coupling is carried out if transformer T is connected 1 The T-shaped inductance model is used for replacing the OOK modulator circuit, the whole OOK modulator circuit can be equivalent to a three-layer cascode structure, and therefore the OOK modulator circuit has high gain in the conducting state. The transformer is used for inter-stage coupling, so that the size of a chip can be effectively reduced, and the power supply of the common-source circuit and the improved stacked common-gate switching circuit can be separated, so that the pressure that the three-layer common-gate circuit needs higher power supply voltage is relieved.
Furthermore, the common-source stage circuit is always in a conducting state, and reverse isolation of the common-source stage circuit is beneficial to further reducing the influence of input impedance change of the improved stacked common-gate stage switching circuit in an on/off state on input matching of the whole circuit, so that more stable input matching is realized.
The invention has the following advantages:
1) According to the invention, the series inductor and the upper and lower layers of switching transistors are introduced into the traditional stacked common-gate switching circuit, and the on/off isolation of the circuit can be improved under the condition of not influencing the circuit gain by optimizing the size of the series inductor and the gate width of the switching transistors, and the input impedance change of the circuit in an on/off state can be remarkably reduced;
2) The cascade circuit and the improved stacked common-gate switch circuit are coupled through a transformer, the whole circuit can be equivalent to a three-layer cascade structure, and the circuit has high gain in a conducting state; moreover, the transformer is used for inter-stage coupling, so that the size of a chip can be effectively reduced, power supplies of a front circuit and a rear circuit can be separated, the pressure that the three-layer cascode circuit needs higher power supply voltage is relieved, and the method is suitable for low-voltage application scenes;
3) The common-source circuit is always in a conducting state, and reverse isolation of the common-source circuit is beneficial to further reducing the influence of input impedance change of the improved stacked common-gate switching circuit in an on/off state on the input matching of the whole circuit, so that more stable input matching is realized.
Drawings
FIG. 1 is a circuit schematic of the present invention;
FIGS. 2 (a) and 2 (b) are graphs of input impedance (Z) of conventional and improved stacked common-gate switching circuits X ) The simulation results of the real part and the imaginary part of (1);
FIG. 3 is a simulation result of the maximum achievable gain and on/off isolation of conventional and improved stacked common-gate switching circuits;
FIG. 4 is a test result of the gain of the present invention in the on/off state;
FIG. 5 shows the input/output return loss test results of the present invention in the ON/OFF state;
FIG. 6 is a test result of the time domain response waveform of the present invention under pulsed excitation.
Detailed Description
The present invention will be further described with reference to the accompanying drawings.
As shown in fig. 1, the millimeter wave OOK modulator with high isolation and stable input matching provided by the present invention includes a common source circuit 1 and a transformer T 1 The improved stacked common-gate switching circuit 2 is characterized in that the common-source circuit 1 comprises a common-source transistor M 1 Negative feedback inductor L S1 An input matching and biasing network 3, said transformer T 1 The improved stacked common-gate switching circuit 2 comprises a lower common-gate transistor M 2 Upper common gate transistor M 3 Series inductor L S2 Lower layer switching transistor M 4 An upper switching transistor M 5 A first inverter I 1 A second inverter I 2 And a bypass capacitor C b An output matching and biasing network 6.
The specific connection relationship of the circuit is as follows: common source stage transistor M 1 The grid of the negative feedback inductor is connected with the input matching and biasing network 3, and the source is connected with the negative feedback inductor L S1 Is connected to the drain of the transformer T 1 Is connected to one end of the primary coil 4; transformer T 1 The other end of the primary winding 4 is connected with the power supply voltage, and the negative feedback inductance L S1 The other end of the first and second electrodes is grounded; transformer T 1 One end of the secondary winding 5 of (2) is grounded, and the other end is connected with the lower common-gate transistor M 2 Source electrode, lower layer switching transistor M 4 Is connected with the drain electrode of the transistor; series inductance L S2 One terminal of (D) is connected with the lower common gate transistor M 2 And the other end is connected with the upper common-gate transistor M 3 Source electrode of (1), upper layer switch transistor M 5 Is connected with the drain electrode of the transistor; upper switching transistor M 5 Gate of and lower switching transistor M 4 A gate of (1), a first inverter I 1 Output terminal of (1), second inverter I 2 Is connected to the input terminal of the upper switching transistor M 5 Source and lower switching transistor M 4 The source of (2) is grounded; upper common gate transistor M 3 Is connected to the output matching and biasing network 6, and has a gate connected to the second inverter I 2 Output terminal of (1), bypass capacitor C b Is connected to bypass the capacitor C b And the other end of the same is grounded.
FIGS. 2 (a) and (b) are input impedances (Z) of conventional and improved stacked common-gate switching circuits X ) The real part and the imaginary part of (a). The specific simulation results are as follows: (1) For the conventional stacked common-gate switching circuit, Z in the on state X Has strong frequency non-correlation, and Z is within the working frequency band (20-30 GHz) X The real part of the signal is between 15.1 and 15.4 omega, and the imaginary part is between 0.04 and 0.13 omega; in the circuit off state, Z X Exhibits strong capacitance, and in the working frequency band, Z X The real part of the light-emitting diode is between 16.6 and 17.6 omega, and the imaginary part of the light-emitting diode is between-37.3 and-26.6 omega; in the on/off state of the circuit, Z X Has a real part varying between 1.2 and 2.5 omega and an imaginary part varying between 26.6 and 37.4 omega, although Z X Has a small variation in the real part but a large variation in the imaginary part. (2) For the improved stacked common-gate switching circuit, the series inductance L is used S2 In the on state of Z X Exhibit a certain inductance, and thus a series inductance L S2 Should not be too large, in this example the series inductance L S2 Is 200pH, in this case though Z X Stronger inductance appears above 30GHz, but Z is in the working frequency band X The frequency dependence of the frequency is not obvious, the real part of the frequency is between 15 and 15.8 omega, and the imaginary part of the frequency is between 2.8 and 5.3 omega; in circuit shutdownIn this state, the lower layer switching transistor M 4 And an upper switching transistor M 5 In the deep linear region, the resistance value of the transistor can be controlled by adjusting the gate width of the transistor when the gate voltage and the minimum gate length of the transistor are determined, and the resistance value of the transistor can be optimized by adjusting the gate width of the transistor when the transistor is in the deep linear region 4 Having a gate width of 16 μ M and an upper switching transistor M 5 When the gate width of (2) is 60 μm, Z X The real part of the signal is between 14.4 and 15.6 omega, and the imaginary part is between-0.8 and 1.6 omega; in the on/off state of the circuit, Z X The real part of (a) varies by less than 0.6 omega and the imaginary part varies by less than 6 omega. Compared with the conventional stacked common-gate switch circuit, the input impedance variation of the improved stacked common-gate switch circuit 2 in the on/off state is significantly reduced.
It should be noted that if the series inductance L is removed S2 Switching transistor M on the lower layer 4 The gate width of the upper layer switching transistor M is adjusted to 8 μ M 5 When the gate width of (2) is adjusted to 16 μm, the input impedance variation of the circuit in the on/off state can also be reduced. However, since the lower layer switching transistor M 4 And an upper switching transistor M 5 The gate widths become smaller and their corresponding resistance values become correspondingly larger, which reduces the isolation of the circuit in the off-state. Also, the series inductance L is removed S2 The gain of the circuit in the conducting state is reduced, and the on/off isolation of the circuit is further reduced.
Fig. 3 is a simulation result of the maximum achievable gain and on/off isolation of the conventional and modified stacked common-gate switching circuits. Compared with the traditional stacked common-gate switch circuit, the series inductance L is used S2 The maximum achievable gain of the improved stacked common-gate switching circuit 2 is improved; moreover, due to the series inductance L S2 Lower layer switching transistor M 4 And an upper switching transistor M 5 The combined use of the two-stage switching circuit improves the on/off isolation of the improved stacked common-gate switching circuit by 24.6dB.
Fig. 4 is a test result of the gain of the present invention in the on/off state. As can be seen, the working frequency band of the circuit is 20-30 GHz, the gain of the circuit in the on state is 18.4dB, the isolation degree of the circuit in the off state is-27.3 dB, and the on/off isolation degree of the circuit reaches 45.7dB.
Fig. 5 is a test result of input-output return loss of the present invention in the on/off state. As can be seen, the input return loss (| S) of the circuit in the on/off state 11 And |) has small change, thereby realizing good and stable input matching and being beneficial to ensuring the stability of a signal source in an OOK system.
FIG. 6 is a test result of the time domain response waveform of the present invention under pulsed excitation. The total duration of the rising edge and the falling edge of the output signal in the graph is less than 300ps, which indicates that the OOK modulation rate can reach more than 3.3 Gbps. It should be noted that, in the off state of the circuit, the waveform of the output signal contains a certain noise, which is the noise introduced by the testing device itself, rather than the carrier leakage caused by the insufficient on/off isolation of the circuit, because the pulse control signal in the figure also has similar noise.
The invention is realized by adopting a silicon-based complementary metal oxide semiconductor integrated circuit process.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention, and such modifications and adaptations are intended to be within the scope of the invention.
Claims (5)
1. Have millimeter wave on-off keying modulator that high isolation and stable input match concurrently, its characterized in that: comprises a common source circuit and a transformer T 1 The improved stacked common-gate switching circuit; a transformer T is arranged between the common source circuit and the improved laminated common gate switching circuit 1 Coupling is carried out;
the improved laminated common-gate switch circuit is formed by adding a series inductor L into a traditional laminated common-gate switch circuit S2 Lower layer switching transistor M 4 An upper switching transistor M 5 (ii) a Wherein, the lower and upper layer switch transistors M 4 And M 5 Respectively with the source electrodes of the lower and upper common-gate transistors of the conventional stacked common-gate switching circuitFirst-stage inverter I for connecting grid with conventional laminated common-grid switching circuit 1 Output terminal of the first stage inverter I 2 The input end of the first transistor is connected with the ground, and the source electrode of the first transistor is grounded; series inductance L S2 And is connected between the drain electrode of the lower common-gate transistor and the source electrode of the upper common-gate transistor of the traditional stacked common-gate switching circuit.
2. The millimeter wave on-off keying modulator with both high isolation and stable input matching of claim 1, wherein:
when the control signal is high level, the lower common-gate transistor M 2 And an upper common gate transistor M 3 In the saturation region, the lower switching transistor M 4 And an upper switching transistor M 5 In the cut-off region, the improved stacked common-gate switching circuit is in a conducting state; by regulating series inductance L S2 Inductance value of (1) making series inductance L S2 The influence of the parasitic capacitance of partial transistor on the circuit gain is counteracted, and the input impedance Z of the improved stacked common-gate switch circuit in the conducting state is kept X_ON Frequency non-dependence within the operating frequency band.
3. The millimeter wave on-off keying modulator with both high isolation and stable input matching of claim 1, wherein:
when the control signal is at low level, the upper layer common grid transistor M 3 In the cut-off region, the lower common-gate transistor M 2 Lower layer switching transistor M 4 And an upper switching transistor M 5 In a deep linear region, the improved stacked common-gate switching circuit is in an off state; the transistor in the deep linear region can be equivalent to a linear resistor with controllable resistance value R on Can be expressed as:
wherein L and W are respectively the gate length and the gate width of the transistor, and V GS Is the voltage between the gate and the source of the transistor, mu n C ox Is a process constant, V TH Is the threshold voltage;
by adjusting the lower switching transistor M 4 And an upper switching transistor M 5 The gate width of the gate electrode is optimized to ensure that the input impedance (Z) of the improved stacked common-gate switching circuit is in an off state X_OFF ) Is close to Z X_ON To reduce the input impedance variation of the improved stacked common-gate switching circuit in the on/off state.
4. The millimeter wave on-off keying modulator with both high isolation and stable input matching of any one of claims 1-3, wherein: the common source stage circuit is always in a conducting state.
5. The millimeter wave on-off keying modulator of claim 4 having both high isolation and stable input matching, wherein: the common-source stage circuit comprises a common-source stage transistor M 1 Negative feedback inductor L S1 Input matching and biasing network, said transformer T 1 The improved stacked common-gate switching circuit comprises a primary coil and a secondary coil, and a lower common-gate transistor M 2 Upper common gate transistor M 3 Series inductor L S2 Lower layer switching transistor M 4 Upper switching transistor M 5 A first inverter I 1 A second inverter I 2 And a bypass capacitor C b An output matching and biasing network;
common source stage transistor M 1 The grid of the negative feedback inductor is connected with the input matching and biasing network, and the source is connected with the negative feedback inductor L S1 Is connected to the drain of the transformer T 1 One end of the primary coil is connected; transformer T 1 The other end of the primary coil is connected with the power supply voltage, and a negative feedback inductor L S1 The other end of the first and second electrodes is grounded; transformer T 1 One end of the secondary coil is grounded, and the other end of the secondary coil is connected with the lower common-gate transistor M 2 Source electrode, lower layer switching transistor M 4 Is connected with the drain electrode of the transistor; series inductance L S2 One end of (A) andlower common-gate transistor M 2 And the other end is connected with the upper common-gate transistor M 3 Source electrode of (3), upper layer switching transistor M 5 Is connected with the drain electrode of the transistor; upper switching transistor M 5 Gate of and lower switching transistor M 4 First inverter I 1 Output terminal of (1), second inverter I 2 Is connected to the upper switching transistor M 5 Source and lower switching transistor M 4 The source of (2) is grounded; upper common gate transistor M 3 Is connected with the output matching and biasing network, and the gate is connected with the second inverter I 2 Output terminal of (1), bypass capacitor C b Is connected to bypass the capacitor C b And the other end of the same is grounded.
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