CN111081739B - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN111081739B
CN111081739B CN201911240660.6A CN201911240660A CN111081739B CN 111081739 B CN111081739 B CN 111081739B CN 201911240660 A CN201911240660 A CN 201911240660A CN 111081739 B CN111081739 B CN 111081739B
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area
auxiliary
vss
vdd
signal
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CN111081739A (en
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郭文均
张乐
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • H10K59/1315Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention discloses a display panel and a display device, wherein the display panel comprises a display area and a non-display area, the non-display area comprises a terminal area and a cut-off area surrounding the display area and the terminal area, a signal wire is arranged in the terminal area and used for connecting a TFT layer in the display area and a functional circuit positioned in the terminal area, an auxiliary wire is arranged in the cut-off area and partially extends to the terminal area, and the auxiliary wire is connected with the signal wire in parallel. The auxiliary conducting wire connected with the signal conducting wire in parallel is arranged in the cutting area, so that a current channel is increased, impedance is reduced, heating, fusing and burning of the signal conducting wire are prevented, the auxiliary conducting wire is arranged in the cutting area and can be removed after the process is finished, normal display of a display panel is not influenced, and the yield is improved.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device having the same.
Background
After the Array, EL and packaging processes of the OLED display panel are completed, next cutting, function testing and the like are carried out, and in the testing process of the panel, Life Time Aging (high-current accelerated Aging) is carried out, so that the OLED device is accelerated to pass through a Life fast attenuation period and enter a stationary period.
In addition, the terminal area of the OLED panel generally needs to be bent, in order to reduce the stress of the bent sub-area and prevent the film layer of the bent sub-area from breaking, the brittle insulating layer and the metal layer of the bent sub-area are subjected to grooving, punching and other processes during array manufacturing, and therefore the impedance of the signal conductor of the bent sub-area is increased, including VDD and VSS lines. When Life Time Aging is carried out, large current of an OLED panel is supplied through VDD and VSS wires, the two leads generate heat seriously, and the two leads have the maximum impedance in a bending subarea, so that the bending subarea generates heat most seriously, and therefore, the VDD and VSS are fused or a film layer near burn is caused.
This problem becomes more prominent as the current for Life Time Aging is further increased with the increase in panel size and aperture ratio.
Disclosure of Invention
The invention provides a display panel and a display device, and aims to solve the technical problem that in the prior art, in the process of function test, a circuit is heated seriously due to overlarge impedance of a signal conductor in a bending sub-area, so that the circuit is fused or burns a nearby film layer, and the display is influenced.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
the present invention provides a display panel including: a display area and a non-display area, the non-display area including: the terminal area is arranged on one side of the display area, and the terminal area comprises a bending sub-area used for bending;
the display panel includes:
a substrate;
the TFT layer is arranged on one side of the substrate and corresponds to the display area;
the functional circuit is arranged on one side of the substrate and corresponds to the terminal area;
the signal lead is arranged on one side of the substrate and is respectively and electrically connected with the TFT layer and the functional circuit through the bending sub-area;
and the auxiliary lead is arranged on one side of the substrate and is electrically connected with the TFT layer and the functional circuit respectively through the corresponding cutting area on at least one side of the bending sub-area.
According to a preferred embodiment of the present invention, one end of the auxiliary conductive line is connected to the TFT layer, and the other end is connected to the functional circuit.
According to a preferred embodiment of the present invention, one end of the auxiliary conductive line is connected to the TFT layer, and the other end of the auxiliary conductive line is connected to the signal conductive line located outside the bending sub-region and away from the display region.
According to a preferred embodiment of the present invention, one end of the auxiliary conductive line is connected to the signal conductive line outside the bending sub-region and on a side close to the display region, and the other end of the auxiliary conductive line is connected to the functional circuit.
According to a preferred embodiment of the present invention, two ends of the auxiliary conductive wire are respectively connected to the signal conductive wires located at two sides of the bending sub-region.
According to a preferred embodiment of the present invention, the portion of the signal conductor located in the bending sub-area is provided with a hole structure or a slot structure.
According to a preferred embodiment of the present invention, the signal wires include a first signal wire and a second signal wire, and the auxiliary wire includes a first auxiliary wire corresponding to the first signal wire and a second auxiliary wire corresponding to the second signal wire.
According to a preferred embodiment of the present invention, the first signal line includes a VDD signal trace, and the second signal line includes a VSS signal trace.
According to a preferred embodiment of the present invention, the VDD signal trace includes a first VDD trace and a second VDD trace, and the VSS signal trace includes a first VSS trace and a second VSS trace;
the first auxiliary lines comprise first VDD auxiliary lines corresponding to the first VDD lines and second VDD auxiliary lines corresponding to the second VDD lines, and the second auxiliary lines comprise first VSS auxiliary lines corresponding to the first VSS lines and second VSS auxiliary lines corresponding to the second VSS lines.
According to the above object of the present invention, there is provided a display device manufactured by cutting the display panel.
The invention has the beneficial effects that: the auxiliary conducting wire connected with the signal conducting wire in parallel is arranged in the cutting area, so that a current channel is increased, impedance is reduced, and the technical problems of heating, fusing and burning of a film layer of the signal conducting wire are solved.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic view of a display panel according to an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of another display panel according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; they may be directly connected or indirectly connected through intervening media, or may be connected through the use of two elements or the interaction of two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.
The invention aims at the technical problems that in the function test process of the existing display panel and the display device, the circuit is heated seriously due to overlarge impedance of the signal conductor in the bending sub-area, so that the circuit is fused or burns a nearby film layer, and the display is influenced, and the embodiment can solve the defect.
An embodiment of the present invention provides a display panel, including: a display area and a non-display area, the non-display area including: the terminal area is arranged on one side of the display area, and the terminal area comprises a bending sub-area used for bending;
the display panel includes:
a substrate;
the TFT layer is arranged on one side of the substrate and corresponds to the display area;
the functional circuit is arranged on one side of the substrate and corresponds to the terminal area;
the signal lead is arranged on one side of the substrate and is respectively and electrically connected with the TFT layer and the functional circuit through the bending sub-area;
and the auxiliary lead is arranged on one side of the substrate and is electrically connected with the TFT layer and the functional circuit respectively through the corresponding cutting area on at least one side of the bending sub-area.
Specifically, please refer to fig. 1, which is a schematic view of the display panel structure, wherein the display panel 10 includes a display area 110 and a non-display area surrounding the display area 110, wherein the non-display area includes a terminal area 106 located at one side of the display area 110 and a cut-out area surrounding the display area 110.
It should be noted that the cut-out regions described in the embodiment of the present invention are secondary cut-out regions in the panel manufacturing process, and since the technical features of the present invention only relate to the cut-out regions 108 located at two sides of the terminal region 106, the cut-out regions shown in the structural diagram of the display panel provided in the embodiment of the present invention only have the cut-out regions 108 located at two sides of the terminal region 106, the rest regions are not shown, and the cut-out regions in the subsequent description are all the cut-out regions 108 located at two sides of the terminal region 106.
In addition, the display panel 10 includes a substrate, and a TFT layer, signal wires 101 and 102, auxiliary wires 103 and 104, and a functional circuit disposed on the substrate.
The TFT layer is disposed in the display area 110, the functional circuit is disposed in the terminal area 106, the signal wires 101 and 102 pass through the bending sub-area 107 and are respectively connected to the TFT layer and the functional circuit, and the auxiliary wires 103 and 104 pass through the cutting area 108 and are respectively electrically connected to the TFT layer and the functional circuit, and the specific connection manner is shown in the following embodiments.
It should be noted that, in the embodiment of the present invention, a schematic plan view of a display panel is provided, where a TFT layer and a detailed portion are not shown, and only positions related to the invention point are shown, and connection between a wire and the TFT layer in the display panel in the embodiment of the present invention may be a conventional arrangement, which is not described herein again.
And the auxiliary lines 103, 104 can be removed by a double cutting process after the process is finished, so that the subsequent process and display are not affected.
In the implementation and application process, the terminal area of the display panel generally needs to be bent, in order to reduce the stress of the bent sub-area, the film layer of the bent sub-area is prevented from being broken, the brittle insulating layer and the metal layer of the bent sub-area can be subjected to grooving, punching and other processes during manufacturing, in addition, in the panel manufacturing process, large-current accelerated Aging (Life Time Aging, hereinafter abbreviated as L-Aging) can be carried out, the purpose is to enable the acceleration of an OLED device to be in the quick attenuation period of the over-Life, and the OLED device enters the stationary period, therefore, the signal lead can be heated due to the fact that the impedance of the signal lead of the bent sub-area can be increased, and therefore the film layer nearby can be fused or burned. In the display panel provided by the embodiment, before the secondary cutting process of the display panel, the auxiliary conducting wire is arranged in the secondary cutting area of the display panel and is connected with the signal conducting wire in parallel, so that the purposes of increasing a current channel and reducing impedance are achieved, and the problems of heating, fusing, film layer burning and the like of the signal conducting wire can be prevented.
Further, referring to fig. 1, the functional circuit includes a test circuit 105 disposed in the terminal area 106, and the test circuit 105 can be used for performing a large current accelerated aging test, so the test circuit 105 is taken as an example in the following description.
I.e. the signal conductors 101, 102 connect the TFT layer with the test circuit 105.
Similarly, the auxiliary wires 103 and 104 are connected in parallel with the signal wires 101 and 102, and the auxiliary wires 103 and 104 are electrically connected with the TFT layer and the test circuit 105.
There are four connection methods of the auxiliary wires 103 and 104 provided in the embodiment of the present invention.
In the first case, one end of the auxiliary wires 103 and 104 is connected to the TFT layer, and the other end is connected to the test circuit 105.
In the second case, one end of the auxiliary conductive lines 103 and 104 is connected to the TFT layer, and the other end is connected to the signal conductive lines 101 and 102 outside the bending sub-area 107 and far away from the display area 110.
In the third case, one end of the auxiliary wires 103 and 104 is connected to the signal wires 101 and 102 located outside the bending sub-region and near the display region 110, and the other end is connected to the test circuit 105.
In the fourth case, two ends of the auxiliary wires 103 and 104 are respectively connected to the signal wires 101 and 102 on two sides of the bending sub-area 107.
The above four cases are not all shown in fig. 1 and will be described in detail in the following embodiments.
In addition, in the embodiment of the present invention, the terminal area 106 further includes a bending sub-area 107 near one side of the display area 110, and the portion of the signal wires 101 and 102 located in the bending sub-area 107 is provided with a hole structure or a slot structure 109.
It should be noted that the hole structure or the groove structure 109 will reduce the current path of the signal wires 101 and 102, which causes the signal wires 101 and 102 to generate heat seriously when the substrate 10 is subjected to a high-current accelerated aging test, resulting in fusing or burning of the film layer.
In the embodiment of the present invention, the signal wires 101 and 102 include a first signal wire 101 and a second signal wire 102, and the auxiliary wires 103 and 104 include a first auxiliary wire 103 corresponding to the first signal wire 101 and a second auxiliary wire 104 corresponding to the second signal wire 102.
In addition, in the implementation and application process, when the display panel is subjected to a large-current accelerated aging test, large currents are supplied through the VDD and VSS wires, so that the two wires generate heat most seriously.
In the embodiment of the present invention, the first signal line 101 includes a VDD signal trace, and the second signal line 102 includes a VSS signal trace.
The VDD signal trace includes a first VDD trace 1011 and a second VDD trace 1012, and the VSS signal trace includes a first VSS trace 1021 and a second VSS trace 1022.
The first auxiliary lines 103 include first VDD auxiliary lines 1031 corresponding to the first VDD routing 1011 and second VDD auxiliary lines 1032 corresponding to the second VDD routing 1012, and the second auxiliary lines 104 include first VSS auxiliary lines 1041 corresponding to the first VSS routing 1021 and second VSS auxiliary lines 1042 corresponding to the second VSS routing 1022.
Wherein, the specific connection condition of all the lines is shown in the following specific embodiments.
The following describes a display panel according to the present invention with specific examples.
Example one
Referring to fig. 1, the display panel 10 includes a display area 110 and a non-display area surrounding the display area, where the non-display area includes a terminal area 106 disposed on one side of the display area 110 and a cut-out area 108 disposed on two sides of the terminal area 106.
The terminal area 106 is provided with signal wires 101 and 102 therein, and the signal wires 101 and 102 connect the TFT layer in the display area 110 with the functional circuit in the terminal area 106, wherein the signal wires 101 and 102 mainly include a first VDD trace 1011, a second VDD trace 1012, a first VSS trace 1021, and a second VSS trace 1022.
The display panel 10 further includes auxiliary wires 103 and 104, and the auxiliary wires 103 and 104 are disposed in the cut-away area 108, extend into the terminal area 106, and are connected in parallel with the signal wires 101 and 102, wherein the auxiliary wires mainly include a first VDD auxiliary line 1031 corresponding to the first VDD trace 1011, a second VDD auxiliary line 1032 corresponding to the second VDD trace 1012, a first VSS auxiliary line 1041 corresponding to the first VSS trace 1021, and a second VSS auxiliary line 1042 corresponding to the second VSS trace 1022.
In addition, a bending sub-region 107 is disposed in the terminal region 106, and a hole structure or a slot structure 109 is disposed at a portion of the first VDD trace 1011, the second VDD trace 1012, the first VSS trace 1021, and the second VSS trace 1022 located in the bending sub-region 107, so that current paths of the first VDD trace 1011, the second VDD trace 1012, the first VSS trace 1021, and the second VSS trace 1022 in the bending sub-region 107 are reduced, thereby increasing impedance and causing the circuit to generate heat seriously.
In this embodiment, the functional circuit includes a test circuit 105 for performing a large-current accelerated aging test, the first VDD trace 1011, the second VDD trace 1012, the first VSS trace 1021, and the second VSS trace 1022 connect the TFT layer and the test circuit 105, and the auxiliary wires 103 and 104 are connected in parallel to the signal wires 101 and 102.
One end of each of the first VDD auxiliary line 1031, the second VDD auxiliary line 1032, the first VSS auxiliary line 1041 and the second VSS auxiliary line 1042 is connected to the TFT layer, and the other end thereof is connected to the test circuit 105, so as to increase the current path of the signal wires 101 and 102.
In summary, in the present embodiment, the first VDD auxiliary line, the second VDD auxiliary line, the first VSS auxiliary line, and the second VSS auxiliary line are disposed in the cut-off region, so that current channels of the first VDD wiring, the second VDD wiring, the first VSS wiring, and the second VSS wiring are increased, impedance is reduced, the problem of fusing or burning of the film layer due to serious heat generation of the signal wires is prevented, and the yield of the display panel is improved.
Example two
Referring to fig. 2, the display panel 20 includes a display area 210 and a non-display area surrounding the display area 210, wherein the non-display area includes a terminal area 206 disposed on one side of the display area 210 and cut-off areas 208 disposed on two sides of the terminal area 206.
The terminal area 206 is provided with signal wires 201 and 202 therein, and the signal wires 201 and 202 connect the TFT layer in the display area 210 with the functional circuit in the terminal area 206, wherein the signal wires 201 and 202 mainly include a first VDD trace 2011, a second VDD trace 2012, a first VSS trace 2021 and a second VSS trace 2022.
The display panel 20 further includes auxiliary wires 203 and 204, and the auxiliary wires 203 and 204 are disposed in the cut-away area 208 and extend into the terminal area 206 and are connected in parallel with the signal wires 201 and 202, wherein the auxiliary wires mainly include a first VDD auxiliary line 2031 corresponding to the first VDD trace 2011, a second VDD auxiliary line 2032 corresponding to the second VDD trace 2012, a first VSS auxiliary line 2041 corresponding to the first VSS trace 2021, and a second VSS auxiliary line 2042 corresponding to the second VSS trace 2022.
In addition, a bending sub-region 207 is disposed in the terminal region 206, and a hole structure or a slot structure 209 is disposed at a portion of the first VDD trace 2011, the second VDD trace 2012, the first VSS trace 2021 and the second VSS trace 2022 located in the bending sub-region 207, so that current paths of the first VDD trace 2011, the second VDD trace 2012, the first VSS trace 2021 and the second VSS trace 2022 in the bending sub-region 207 are reduced, thereby increasing impedance and causing serious line heating.
In this embodiment, the functional circuit includes a test circuit 205 for performing a large-current accelerated aging test, the first VDD trace 2011, the second VDD trace 2012, the first VSS trace 2021 and the second VSS trace 2022 connect the TFT layer and the test circuit 205, and the auxiliary wires 203 and 204 are connected in parallel to the signal wires 201 and 202.
One end of each of the first VDD auxiliary line 2031, the second VDD auxiliary line 2032, the first VSS auxiliary line 2041 and the second VSS auxiliary line 2042 is connected to the TFT layer, and the other end of each of the first VDD auxiliary line 2031, the second VDD auxiliary line 2032, the first VSS auxiliary line 2041 and the second VSS auxiliary line 2042 is connected to a corresponding line of the signal wires 201 and 202, respectively, and a connection point is located in a region of the terminal area 206 that is not located in the bend sub-area 207, that is, the connection point is located outside the bend sub-area 207 and on a side away from the display area 210, so as to increase current paths of the signal wires 201 and 202.
Specifically, the first VDD auxiliary line 2031 is connected to the first VDD trace 2011, the second VDD auxiliary line 2032 is connected to the second VDD trace 2012, the first VSS auxiliary line 2041 is connected to the first VSS trace 2021, the second VSS auxiliary line 2042 is connected to the second VSS trace 2022, and the four connection points are located at a side of the bending sub-region 207 away from the display region 210.
In summary, in the present embodiment, the first VDD auxiliary line, the second VDD auxiliary line, the first VSS auxiliary line, and the second VSS auxiliary line are disposed in the cut-off region, so that current channels of the first VDD wiring, the second VDD wiring, the first VSS wiring, and the second VSS wiring are increased, impedance is reduced, the problem of fusing or burning of the film layer due to serious heat generation of the signal wires is prevented, and the yield of the display panel is improved.
EXAMPLE III
Referring to fig. 3, the display panel 30 includes a display region 310 and a non-display region surrounding the display region 310, wherein the non-display region includes a terminal region 306 disposed on one side of the display region 310 and a cut-out region 308 disposed on two sides of the terminal region 306.
The terminal area 306 is provided with signal wires 301 and 302 therein, and the signal wires 301 and 302 connect the TFT layer in the display area 310 with the functional circuit in the terminal area 306, wherein the signal wires 301 and 302 mainly include a first VDD trace 3011, a second VDD trace 3012, a first VSS trace 3021, and a second VSS trace 3022.
The display panel 30 further includes auxiliary wires 303 and 304, and the auxiliary wires 303 and 304 are disposed in the cut-away region 308 and extend into the terminal region 306 to be connected in parallel with the signal wires 301 and 302, wherein the auxiliary wires mainly include a first VDD auxiliary wire 3031 corresponding to the first VDD trace 3011, a second VDD auxiliary wire 3032 corresponding to the second VDD trace 3012, a first VSS auxiliary wire 3041 corresponding to the first VSS trace 3021, and a second VSS auxiliary wire 3042 corresponding to the second VSS trace 3022.
In addition, a bending sub-region 307 is disposed in the terminal region 306, and a hole structure or a slot structure 309 is disposed on a portion of the first VDD trace 3011, the second VDD trace 3012, the first VSS trace 3021, and the second VSS trace 3022 located in the bending sub-region 307, so that current paths of the first VDD trace 3011, the second VDD trace 3012, the first VSS trace 3021, and the second VSS trace 3022 in the bending sub-region 307 are reduced, thereby increasing impedance and causing the circuit to generate heat seriously.
In this embodiment, the functional circuit includes a test circuit 305 for performing a large-current accelerated aging test, the first VDD trace 3011, the second VDD trace 3012, the first VSS trace 3021, and the second VSS trace 3022 connect the TFT layer and the test circuit 305, and the auxiliary wires 303 and 304 are connected in parallel to the signal wires 301 and 302.
One end of each of the first VDD auxiliary line 3031, the second VDD auxiliary line 3032, the first VSS auxiliary line 3041 and the second VSS auxiliary line 3042 is connected to the test circuit 305, the other end of each of the first VDD auxiliary line 3031, the second VDD auxiliary line 3032, the first VSS auxiliary line 3041 and the second VSS auxiliary line 3042 is connected to a corresponding line of the signal wires 301 and 302, and a connection point is located in a region of the terminal area 306 other than the bend sub-area 307, that is, the connection point is located outside the bend sub-area 307 and close to the display area 310, so as to increase the current paths of the signal wires 301 and 302.
Specifically, the first VDD auxiliary line 3031 is connected to the first VDD routing line 3011, the second VDD auxiliary line 3032 is connected to the second VDD routing line 3012, the first VSS auxiliary line 3041 is connected to the first VSS routing line 3021, the second VSS auxiliary line 3042 is connected to the second VSS routing line 3022, and the four connection points are located on one side of the bending sub-region 307 close to the display region 310.
In summary, in the present embodiment, the first VDD auxiliary line, the second VDD auxiliary line, the first VSS auxiliary line, and the second VSS auxiliary line are disposed in the cut-off region, so that current channels of the first VDD wiring, the second VDD wiring, the first VSS wiring, and the second VSS wiring are increased, impedance is reduced, the problem of fusing or burning of the film layer due to serious heat generation of the signal wires is prevented, and the yield of the display panel is improved.
Example four
Referring to fig. 4, the display panel 40 includes a display area 410 and a non-display area surrounding the display area 410, wherein the non-display area includes a terminal area 406 disposed on one side of the display area 410 and cut-out areas 408 disposed on two sides of the terminal area 406.
The terminal area 306 is provided with signal wires 401 and 402 therein, the signal wires 401 and 402 connect the TFT layer in the display area 410 with the functional circuit in the terminal area 406, and the terminal area mainly includes a first VDD trace 4011, a second VDD trace 4012, a first VSS trace 4021 and a second VSS trace 4022.
The display panel 40 further includes auxiliary wires 403 and 404, and the auxiliary wires 403 and 404 are disposed in the cut-out region 408 and extend into the terminal region 406 and are connected in parallel with the signal wires 401 and 402, wherein the auxiliary wires mainly include a first VDD auxiliary wire 4031 corresponding to the first VDD trace 4011, a second VDD auxiliary wire 4032 corresponding to the second VDD trace 4012, a first VSS auxiliary wire 4041 corresponding to the first VSS trace 4021, and a second VSS auxiliary wire 4042 corresponding to the second VSS trace 4022.
In addition, a bending sub-region 407 is disposed in the terminal region 406, and a hole structure or a slot structure 409 is disposed at a portion of the first VDD trace 4011, the second VDD trace 4012, the first VSS trace 4021 and the second VSS trace 4022 located in the bending sub-region 407, so that current paths of the first VDD trace 4011, the second VDD trace 4012, the first VSS trace 4021 and the second VSS trace 4022 in the bending sub-region 407 are reduced, thereby increasing impedance and causing the circuit to generate heat seriously.
In this embodiment, the functional circuit includes a test circuit 405 for performing a large-current accelerated aging test, the first VDD trace 4011, the second VDD trace 4012, the first VSS trace 4021, and the second VSS trace 4022 connect the TFT layer and the test circuit 405, and the auxiliary wires 403 and 404 are connected in parallel to the signal wires 401 and 402.
Both ends of the first VDD auxiliary line 4031, the second VDD auxiliary line 4032, the first VSS auxiliary line 4041 and the second VSS auxiliary line 4042 are connected to corresponding lines in the signal wires 401 and 402, and connection points are located in regions of the terminal region 406 that are not the bent sub-region 407, that is, the connection points are located on both sides of the bent sub-region 407 and are located in regions outside the bent sub-region 407, so as to increase current paths of the signal wires 401 and 402.
Specifically, two ends of the first VDD auxiliary line 4031 are connected to the first VDD routing 4011, wherein one end of the connection point is located at a side outside the bending sub-area 407 close to the display area 410, and the other end of the connection point is located at a side outside the bending sub-area 407 far from the display area 410.
Two ends of the second VDD auxiliary line 4032 are connected to the second VDD routing 4012, wherein one end of the connection point is located at a side of the bending sub-area 407 close to the display area 410, and the other end of the connection point is located at a side of the bending sub-area 407 far from the display area 410.
Two ends of the first VSS auxiliary line 4041 are connected to the first VSS wiring 4021, wherein one end of the first VSS auxiliary line is connected to a side of the bending sub-region 407 close to the display region 410, and the other end of the first VSS auxiliary line is connected to a side of the bending sub-region 407 far from the display region 410.
Two ends of the second VSS auxiliary line 4042 are connected to the second VSS wiring 4022, wherein one end of the second VSS auxiliary line is connected to a side of the bending sub-region 407 close to the display region 410, and the other end of the second VSS auxiliary line is connected to a side of the bending sub-region 407 far from the display region 410.
In summary, in the present embodiment, the first VDD auxiliary line, the second VDD auxiliary line, the first VSS auxiliary line, and the second VSS auxiliary line are disposed in the cut-off region, so that current channels of the first VDD wiring, the second VDD wiring, the first VSS wiring, and the second VSS wiring are increased, impedance is reduced, the problem of fusing or burning of the film layer due to serious heat generation of the signal wires is prevented, and the yield of the display panel is improved.
In addition, the embodiment of the invention also provides a display device which is made of the display panel, the display panel is subjected to secondary cutting and other conventional process flows to obtain the display device, the auxiliary conducting wire is additionally arranged before the two cutting processes, the rest areas are arranged to be the same as the conventional process, and the auxiliary conducting wire can be removed after the two cutting processes, so that the use of the display device is not influenced.
The display device comprises the display panel, comprises the OLED flexible display device, and can be applied to small, medium and large display devices such as TVs, mobile phones and watches.
The auxiliary conducting wire connected with the signal conducting wire in parallel is arranged in the cutting area, so that a current channel is increased, impedance is reduced, and the technical problems of heating, fusing and burning of a film layer of the signal conducting wire are solved.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The display panel and the display device provided by the embodiment of the present invention are described in detail above, and the principle and the embodiment of the present invention are explained in the present document by applying specific examples, and the description of the above embodiments is only used to help understanding the technical scheme and the core idea of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A display panel, comprising: a display area and a non-display area, the non-display area including: the terminal area is arranged on one side of the display area, and the cutting area surrounds the display area and the terminal area, the terminal area comprises a bending sub-area for bending, and the cutting area is an area cut in a secondary cutting process of the display panel;
the display panel includes:
a substrate;
the TFT layer is arranged on one side of the substrate and corresponds to the display area;
the functional circuit is arranged on one side of the substrate and corresponds to the terminal area;
the signal lead is arranged on one side of the substrate and is respectively and electrically connected with the TFT layer and the functional circuit through the bending subarea;
and the auxiliary lead is arranged on one side of the substrate and is electrically connected with the TFT layer and the functional circuit respectively through the corresponding cutting area on at least one side of the bending sub-area.
2. The display panel according to claim 1, wherein one end of the auxiliary wiring is connected to the TFT layer, and the other end is connected to the functional circuit.
3. The display panel according to claim 1, wherein one end of the auxiliary wire is connected to the TFT layer, and the other end is connected to the signal wire located outside the bend sub-region on a side away from the display region.
4. The display panel according to claim 1, wherein one end of the auxiliary conductive line is connected to the signal conductive line outside the bending sub-region on a side close to the display region, and the other end is connected to the functional circuit.
5. The display panel according to claim 1, wherein two ends of the auxiliary wires are respectively connected to the signal wires at two sides of the bending sub-region.
6. The display panel according to claim 1, wherein the portion of the signal conductor located in the bending sub-region is provided with a hole structure or a slot structure.
7. The display panel according to claim 1, wherein the signal conductive lines include first signal lines and second signal lines, and the auxiliary conductive lines include first auxiliary lines corresponding to the first signal lines and second auxiliary lines corresponding to the second signal lines.
8. The display panel of claim 7, wherein the first signal lines comprise VDD signal traces and the second signal lines comprise VSS signal traces.
9. The display panel of claim 8, wherein the VDD signal trace comprises a first VDD trace and a second VDD trace, and the VSS signal trace comprises a first VSS trace and a second VSS trace;
the first auxiliary lines comprise first VDD auxiliary lines corresponding to the first VDD wiring and second VDD auxiliary lines corresponding to the second VDD wiring, and the second auxiliary lines comprise first VSS auxiliary lines corresponding to the first VSS wiring and second VSS auxiliary lines corresponding to the second VSS wiring.
10. A display device, wherein the display device is obtained by cutting the display panel according to any one of claims 1 to 9.
CN201911240660.6A 2019-12-06 2019-12-06 Display panel and display device Active CN111081739B (en)

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CN107004698A (en) * 2014-12-15 2017-08-01 乐金显示有限公司 Flexible display apparatus with the supporting course including rounded edges
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WO2019146115A1 (en) * 2018-01-29 2019-08-01 シャープ株式会社 Display device and method for manufacturing display device

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Publication number Priority date Publication date Assignee Title
CN107004617A (en) * 2014-12-10 2017-08-01 乐金显示有限公司 Flexible display apparatus with bridge joint wiring track
CN107004698A (en) * 2014-12-15 2017-08-01 乐金显示有限公司 Flexible display apparatus with the supporting course including rounded edges
CN207303104U (en) * 2017-10-31 2018-05-01 昆山国显光电有限公司 Display panel
WO2019146115A1 (en) * 2018-01-29 2019-08-01 シャープ株式会社 Display device and method for manufacturing display device

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