CN111077930A - Energy storage circuit power failure monitoring trigger circuit - Google Patents
Energy storage circuit power failure monitoring trigger circuit Download PDFInfo
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- CN111077930A CN111077930A CN201911305359.9A CN201911305359A CN111077930A CN 111077930 A CN111077930 A CN 111077930A CN 201911305359 A CN201911305359 A CN 201911305359A CN 111077930 A CN111077930 A CN 111077930A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
The invention provides a power-down monitoring trigger circuit of an energy storage circuit, which comprises a positive access end, a negative access end, resistors R1-R6, a capacitor, an optical coupler and a second capacitor C2 and a third resistor R3 which are connected in parallel between a reference voltage end REF of an adjustable voltage reference chip (an adjustable shunt reference chip, such as a 431-series reference chip) and a ground end GND, wherein the ground end GND is connected with a common analog ground. The circuit components are few, economical and high in reliability, and the cost is reduced; the monitoring rate reaches 100 percent, the false alarm rate is 0, and the application range is wide; easy mass production, low cost and good economic benefit.
Description
Technical Field
The invention relates to the technical field of circuit monitoring, in particular to a power failure monitoring trigger circuit of an energy storage circuit.
Background
a) The energy storage capacitor has extremely high economic value, and the problem that the electric quantity cannot be detected when the capacity is reduced in the using process is solved; absence of energy storage power supply BIT detection;
b) the key data of the product cannot be stored or the storage time is not enough due to the fact that the circuit cannot be monitored during power failure, so that the safety and the reliability of the product are reduced;
disclosure of Invention
The technical problems to be solved by the invention are as follows: the capacitor selection basis suggestion is strengthened in the design of the energy storage circuit, and the design of reliability and safety is improved; the power failure monitoring of the energy storage circuit is realized, the problem of circuit false alarm is solved, the monitoring threshold precision is improved, and the reliability of BIT design is enhanced.
The technical scheme is as follows: the invention provides a power failure monitoring trigger circuit of an energy storage circuit, which comprises a positive access end, a negative access end, resistors R1-R6, a capacitor, an optical coupler and a second capacitor C2 and a third resistor R3 which are connected in parallel between a reference voltage end REF of an adjustable voltage reference chip (an adjustable shunt reference chip, such as a 431-series reference chip) and a ground end GND, wherein the ground end GND is connected with a common analog ground;
the adjustable output end of the adjustable voltage reference chip is communicated with the cathode of the optical coupler;
the positive input end is connected with a resistor R2 in series and then is connected to a reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with a resistor R4 in series and then is connected to an adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with a resistor R5 in series and then is connected to the anode of the optical coupler;
the collector of the optical coupler is connected with a resistor R6 in series and then is connected to the anode of a digital power supply, and the emitter of the optical coupler is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are used for being connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level overturning, so that a diode of the optocoupler is cut off, and the phototriode is cut off.
Further, the resistor R4 is a bias resistor and supplies power to the adjustable voltage reference chip.
Further, the reference voltage of the adjustable voltage reference chip is 2.495V.
Further, the resistances of the resistor R2 and the resistor R3 satisfy the relationship: [ (R2+ R3) × 2.495V/R2] ═ Q, where Q is the set operating voltage of the circuit being monitored.
Furthermore, the collector of the phototriode of the optocoupler is used as the control input end of the digital circuit.
Further, when the set operating voltage of the monitored circuit is 22V, the resistor R2 is 15.4K Ω, and the resistor R3 is 2K Ω.
Further, the adjustable voltage reference chip is a 431 series voltage reference chip.
Further, the adjustable voltage reference chip is GHRW431, AZ431, HEX431 or TL 431.
Further, the adjustable voltage reference chip is in a three-pin package or an eight-pin package.
In addition, the optical coupler part in the application can be replaced by circuits with the same functions, for example: a relay or an isolated digital switch.
The technical scheme based on the relay is as follows: the power failure monitoring trigger circuit of the energy storage circuit comprises a positive access end, a negative access end, resistors R1-R6, a capacitor, a relay and a second capacitor C2 and a third resistor R3 which are connected in parallel between a reference voltage end REF of an adjustable voltage reference chip and a ground end GND, wherein the ground end GND is connected with a common analog ground;
the adjustable output end of the adjustable voltage reference chip is connected to a first power supply end of the relay;
the positive input end is connected with the resistor R2 in series and then is connected to the reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with the resistor R4 in series and then is connected to the adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with the resistor R5 in series and then is connected to the second power supply end of the relay;
the first switch end of the relay is connected with a resistor R6 in series and then is connected to the anode of the digital power supply, and the second switch end of the relay is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level overturning, so that the power supply end of the relay is overturned to cause the switching end of the relay to be switched.
The technical scheme provided by the application based on the isolated digital switch is as follows: the power failure monitoring trigger circuit of the energy storage circuit comprises a positive access end, a negative access end, resistors R1-R6, a capacitor, a relay and a second capacitor C2 and a third resistor R3 which are connected in parallel between a reference voltage end REF of an adjustable voltage reference chip and a ground end GND, wherein the ground end GND is connected with a common analog ground;
the adjustable output end of the adjustable voltage reference chip is connected to the first primary power supply end of the isolation type digital switch;
the positive input end is connected with a resistor R2 in series and then is connected to a reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with a resistor R4 in series and then is connected to an adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with a resistor R5 in series and then is connected to a primary side second power supply end of the isolated digital switch;
the first secondary output end of the isolated digital switch is connected with the positive electrode of the digital power supply after being connected with a resistor R6 in series, and the second secondary output end of the isolated digital switch is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level inversion, so that the power supply end of the isolated digital switch is inverted, and the output end of the isolated digital switch is inverted.
The invention has the beneficial effects that: the circuit components are few, economical and high in reliability, and the cost is reduced; the monitoring rate reaches 100 percent, the false alarm rate is 0, and the application range is wide; easy mass production, low cost and good economic benefit.
Drawings
FIG. 1 is a schematic view of the present invention (example 1);
FIG. 2 is a schematic view of example 2;
FIG. 3 is a schematic view of example 3;
FIG. 4 is a schematic diagram of a parallel-coupled tank circuit of the present invention;
Detailed Description
The following embodiments are given in conjunction with the accompanying drawings
the adjustable output end of the adjustable voltage reference chip is communicated with the cathode of the optical coupler;
the positive input end is connected with a resistor R2 in series and then is connected to a reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with a resistor R4 in series and then is connected to an adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with a resistor R5 in series and then is connected to the anode of the optical coupler;
the collector of the optical coupler is connected with a resistor R6 in series and then is connected to the anode of a digital power supply, and the emitter of the optical coupler is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are used for being connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level overturning, so that a diode of the optocoupler is cut off, and the phototriode is cut off.
The reference voltage of the adjustable voltage reference chip is 2.495V.
The resistance values of the resistor R2 and the resistor R3 satisfy the relation: [ (R2+ R3) × 2.495V/R2] ═ Q, where Q is the set operating voltage of the circuit being monitored.
the adjustable output end of the adjustable voltage reference chip is connected to a first power supply end of the relay;
the positive input end is connected with the resistor R2 in series and then is connected to the reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with the resistor R4 in series and then is connected to the adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with the resistor R5 in series and then is connected to the second power supply end of the relay;
the first switch end of the relay is connected with a resistor R6 in series and then is connected to the anode of the digital power supply, and the second switch end of the relay is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level overturning, so that the power supply end of the relay is overturned to cause the switching end of the relay to be switched.
the adjustable output end of the adjustable voltage reference chip is connected to the first primary power supply end of the isolation type digital switch;
the positive input end is connected with a resistor R2 in series and then is connected to a reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with a resistor R4 in series and then is connected to an adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with a resistor R5 in series and then is connected to a primary side second power supply end of the isolated digital switch;
the first secondary output end of the isolated digital switch is connected with the positive electrode of the digital power supply after being connected with a resistor R6 in series, and the second secondary output end of the isolated digital switch is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level inversion, so that the power supply end of the isolated digital switch is inverted, and the output end of the isolated digital switch is inverted.
Claims (10)
1. The utility model provides a power failure monitoring trigger circuit of tank circuit which characterized in that: the voltage regulator comprises a positive access end, a negative access end, resistors R1-R6, a capacitor, an optical coupler and a second capacitor C2 and a third resistor R3 which are connected in parallel between a reference voltage end REF of an adjustable voltage reference chip (an adjustable shunt reference chip, such as a 431-series reference chip) and a ground end GND, wherein the ground end GND is connected with a common analog ground;
the adjustable output end of the adjustable voltage reference chip is communicated with the cathode of the optical coupler;
the positive input end is connected with a resistor R2 in series and then is connected to a reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with a resistor R4 in series and then is connected to an adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with a resistor R5 in series and then is connected to the anode of the optical coupler;
the collector of the optical coupler is connected with a resistor R6 in series and then is connected to the anode of a digital power supply, and the emitter of the optical coupler is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are used for being connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level overturning, so that a diode of the optocoupler is cut off, and the phototriode is cut off.
2. The energy storage circuit power failure monitoring trigger circuit according to claim 1, characterized in that: the resistor R4 is a bias resistor and supplies power to the adjustable voltage reference chip.
3. The energy storage circuit power failure monitoring trigger circuit according to claim 1, characterized in that: the reference voltage of the adjustable voltage reference chip is 2.495V.
4. The energy storage circuit power failure monitoring trigger circuit according to claim 1, characterized in that: the resistance values of the resistor R2 and the resistor R3 satisfy the relation: [ (R2+ R3) × 2.495V/R2] ═ Q, where Q is the set operating voltage of the circuit being monitored.
5. The energy storage circuit power failure monitoring trigger circuit according to claim 1, characterized in that: and the collector of the phototriode of the optocoupler is used as the control input end of the digital circuit.
6. The energy storage circuit power failure monitoring trigger circuit according to claim 1, characterized in that: when the set working voltage of the monitored circuit is 22V, the resistor R2 is 15.4K omega, and the resistor R3 is 2K omega.
7. The energy storage circuit power failure monitoring trigger circuit according to claim 1, characterized in that: the adjustable voltage reference chip is 431 series voltage reference chips.
8. The energy storage circuit power failure monitoring trigger circuit according to claim 1, characterized in that: the adjustable voltage reference chip is in three-pin package or eight-pin package.
9. The utility model provides a power failure monitoring trigger circuit of tank circuit which characterized in that: the voltage reference circuit comprises a positive access end, a negative access end, resistors R1-R6, a capacitor, a relay and a second capacitor C2 and a third resistor R3 which are connected in parallel between a reference voltage end REF of an adjustable voltage reference chip and a ground end GND, wherein the ground end GND is connected with a common analog ground;
the adjustable output end of the adjustable voltage reference chip is connected to a first power supply end of the relay;
the positive input end is connected with the resistor R2 in series and then is connected to the reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with the resistor R4 in series and then is connected to the adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with the resistor R5 in series and then is connected to the second power supply end of the relay;
the first switch end of the relay is connected with a resistor R6 in series and then is connected to the anode of the digital power supply, and the second switch end of the relay is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level overturning, so that the power supply end of the relay is overturned to cause the switching end of the relay to be switched.
10. The utility model provides a power failure monitoring trigger circuit of tank circuit which characterized in that: the voltage reference circuit comprises a positive access end, a negative access end, resistors R1-R6, a capacitor, a relay and a second capacitor C2 and a third resistor R3 which are connected in parallel between a reference voltage end REF of an adjustable voltage reference chip and a ground end GND, wherein the ground end GND is connected with a common analog ground;
the adjustable output end of the adjustable voltage reference chip is connected to the first primary power supply end of the isolation type digital switch;
the positive input end is connected with a resistor R2 in series and then is connected to a reference voltage end REF of the adjustable voltage reference chip, the positive input end is connected with a resistor R4 in series and then is connected to an adjustable output end of the adjustable voltage reference chip, and the positive input end is connected with a resistor R5 in series and then is connected to a primary side second power supply end of the isolated digital switch;
the first secondary output end of the isolated digital switch is connected with the positive electrode of the digital power supply after being connected with a resistor R6 in series, and the second secondary output end of the isolated digital switch is connected with a public digital ground;
the resistor R2 and the resistor R3 form a voltage division, so that the voltage connected to the reference voltage end REF is compared with the reference voltage of the adjustable voltage reference chip;
the positive access end and the negative access end are connected to a monitored circuit in parallel, and when the voltage of the monitored circuit is lower than a set working voltage, the adjustable voltage reference chip is subjected to level inversion, so that the power supply end of the isolated digital switch is inverted, and the output end of the isolated digital switch is inverted.
Priority Applications (1)
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CN201911305359.9A CN111077930A (en) | 2019-12-17 | 2019-12-17 | Energy storage circuit power failure monitoring trigger circuit |
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CN201911305359.9A CN111077930A (en) | 2019-12-17 | 2019-12-17 | Energy storage circuit power failure monitoring trigger circuit |
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CN108282002A (en) * | 2018-01-29 | 2018-07-13 | 东莞市台诺电子有限公司 | A kind of intelligent three stage charging system circuit |
CN208224355U (en) * | 2018-06-15 | 2018-12-11 | 福建俊豪科技有限公司 | A kind of alternating current undervoltage detection warning circuit |
CN109599925A (en) * | 2019-01-24 | 2019-04-09 | 沈建良 | Novel storage battery intelligent charger |
CN109962509A (en) * | 2017-12-23 | 2019-07-02 | 桑逸轩 | A kind of electric vehicle Automatic- power off charger circuit |
CN209375487U (en) * | 2018-12-18 | 2019-09-10 | 深圳市东嘉远电子有限公司 | Adapter switch power circuit |
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2019
- 2019-12-17 CN CN201911305359.9A patent/CN111077930A/en active Pending
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
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US20070182388A1 (en) * | 2002-12-05 | 2007-08-09 | Comarco Wireless Technologies, Inc. | Tip having active circuitry |
CN204615474U (en) * | 2015-05-28 | 2015-09-02 | 西安科技大学 | A kind of cell activation management circuit being applied to batteries to store energy DC power supply |
CN206321756U (en) * | 2016-12-14 | 2017-07-11 | 广州视源电子科技股份有限公司 | A kind of power-fail detection circuit and switching power circuit |
CN109962509A (en) * | 2017-12-23 | 2019-07-02 | 桑逸轩 | A kind of electric vehicle Automatic- power off charger circuit |
CN108282002A (en) * | 2018-01-29 | 2018-07-13 | 东莞市台诺电子有限公司 | A kind of intelligent three stage charging system circuit |
CN208224355U (en) * | 2018-06-15 | 2018-12-11 | 福建俊豪科技有限公司 | A kind of alternating current undervoltage detection warning circuit |
CN209375487U (en) * | 2018-12-18 | 2019-09-10 | 深圳市东嘉远电子有限公司 | Adapter switch power circuit |
CN109599925A (en) * | 2019-01-24 | 2019-04-09 | 沈建良 | Novel storage battery intelligent charger |
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Application publication date: 20200428 |