CN111077687A - Display panel, preparation method thereof and display device - Google Patents
Display panel, preparation method thereof and display device Download PDFInfo
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- CN111077687A CN111077687A CN201911282136.5A CN201911282136A CN111077687A CN 111077687 A CN111077687 A CN 111077687A CN 201911282136 A CN201911282136 A CN 201911282136A CN 111077687 A CN111077687 A CN 111077687A
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- 238000002360 preparation method Methods 0.000 title abstract description 4
- 239000010409 thin film Substances 0.000 claims abstract description 32
- 239000010410 layer Substances 0.000 claims description 277
- 238000002161 passivation Methods 0.000 claims description 31
- 238000004519 manufacturing process Methods 0.000 claims description 17
- 239000011229 interlayer Substances 0.000 claims description 16
- 239000010408 film Substances 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 9
- 230000000149 penetrating effect Effects 0.000 claims description 5
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 238000004891 communication Methods 0.000 claims description 3
- 238000005240 physical vapour deposition Methods 0.000 claims description 3
- 238000002834 transmittance Methods 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 description 8
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000002968 anti-fracture Effects 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
Abstract
The application discloses a display panel, a preparation method thereof and a display device, wherein the display panel comprises a thin film transistor structure layer; the touch layer is arranged on the thin film transistor structure layer; the flat layer is arranged on the thin film transistor structure layer and covers the touch layer; the first slot hole extends from one surface of the flat layer, which is far away from the touch layer, to the surface of the touch layer, and part of the touch layer is exposed in the first slot hole; the first slotted hole is of a step structure; and the common electrode layer is arranged on the surfaces of the flat layer, the first slotted hole and the touch layer. The continuity of the common electrode layer is improved on the premise that the contact area of the common electrode layer and the touch control layer is not changed, and then the reliability of the touch control function is improved.
Description
Technical Field
The application relates to the technical field of display panels, in particular to a display panel, a preparation method of the display panel and a display device.
Background
In order to realize the integration of liquid crystal display and touch control functions, in the field of medium and small-sized display, a common electrode is generally patterned to serve as both a common electrode of liquid crystal display and an induction electrode of a touch control function, and the display function and the touch control function are driven simultaneously through time-sharing operation.
The technology is divided into an On Cell TP technology and an In Cell TP technology according to the embedding degree of the induction electrode In the liquid crystal panel. The In Cell TP technology completely embeds the touch function into the liquid crystal pixels, so that the touch screen has the outstanding advantages of thin thickness of the whole machine, excellent display effect, excellent penetration rate and the like, and is a preferred scheme In high-end markets. Specifically, the In Cell TP technology is divided into a mutual capacitance type touch technology and a self-capacitance type touch technology according to different working principles.
The self-capacitance In Cell TP technology divides the sensing electrode into sensing pads arranged In a chessboard by a graphical method, and each sensing pad is independently connected out by arranging one or more metal leads to form a touch channel. Generally, the touch lead layer and the common electrode layer are insulated at intervals by a flat layer, and a connection hole is formed at a specific position to enable the touch lead to input a control signal to a specific sensing pad.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel 100 provided in the prior art, where the display panel 100 includes a substrate 111, an active layer 112, a gate insulating layer 113, an interlayer insulating layer 114, a source drain layer 115, a touch layer 120, a planarization layer 130, a connection hole 131, a common electrode layer 140, a passivation layer 150, and a pixel electrode layer 160, and since the planarization layer 130 has a large thickness, the bottom of the connection hole 131 is steep, the common electrode layer 140 has poor continuity when forming a film at the bottom of the hole, and a film break is likely to occur, which results in poor touch function.
Therefore, there is a need to develop a new display panel to overcome the drawbacks of the prior art.
Disclosure of Invention
An object of the present invention is to provide a display panel, which can solve the problem of poor touch function caused by the fracture of a common electrode layer in the display panel in the prior art.
In order to achieve the above object, the present invention provides a display panel, including a thin film transistor structure layer; the touch layer is arranged on the thin film transistor structure layer; the flat layer is arranged on the thin film transistor structure layer and covers the touch layer; the first slot hole extends from one surface of the flat layer, which is far away from the touch layer, to the surface of the touch layer, and part of the touch layer is exposed in the first slot hole; the first slotted hole is of a step structure; and the common electrode layer is arranged on the surfaces of the flat layer, the first slotted hole and the touch layer. The first slotted hole with the step structure is arranged, so that the continuity of the common electrode layer is improved on the premise that the contact area of the common electrode layer and the touch control layer is unchanged, and the reliability of the touch control function is further improved.
Further, in other embodiments, the display panel further includes a passivation layer disposed on the common electrode layer; and a first via hole corresponding to the first slot hole and penetrating the passivation layer, the first via hole communicating with the first slot hole; a second slot extending from the passivation layer to a surface of the thin film transistor structure layer; and the conducting layer covers the hole surface of the first through hole, the surface of the common electrode layer in the first groove hole to form a compensation layer, and covers the surface of the second groove hole and extends to the surface of the passivation layer to form a pixel electrode layer. The materials adopted by the conducting layers are the same as those adopted by the common electrode layer, and in the embodiment, the indium tin oxide films are adopted, so that the compatibility of the two indium tin oxide films is good, a heterogeneous interface does not exist, the fracture resistance of the common electrode layer is enhanced, and the reliability of the touch function is improved.
Further, in other embodiments, the thin film transistor structure layer includes a substrate; an active layer disposed on the substrate; a gate insulating layer disposed on the active layer; an interlayer insulating layer disposed on the gate insulating layer; the source drain layer is arranged on the interlayer insulating layer and is connected with the active layer; the touch layer and the source drain layer are arranged at intervals on the same layer; and part of the source and drain electrodes is exposed in the second slotted hole, and the pixel electrode layer is arranged on the surface of the source and drain electrodes.
Further, in other embodiments, the first slot includes a first aperture and a second aperture surrounding the first aperture, the first aperture being in communication with the second aperture.
Further, in other embodiments, the light transmittance of the film layer within the projection of the first aperture is greater than 90%.
In order to achieve the above object, the present invention further provides a manufacturing method for manufacturing the display panel according to the present invention, the manufacturing method including the steps of: providing a thin film transistor structure layer; preparing a touch layer on the thin film transistor structure layer; preparing a flat layer on the thin film transistor structure layer and coating the touch layer; preparing a first slot hole, wherein the first slot hole extends from one surface of the flat layer, which is far away from the touch layer, to the surface of the touch layer, and part of the touch layer is exposed in the first slot hole; the first slotted hole is of a step structure; and preparing a common electrode layer on the surfaces of the flat layer, the first slot hole and the touch layer. The flat layer is made of organic matters with photosensitive characteristics, the first slot hole is formed after the flat layer is exposed and developed, and then oxygen plasma is used for treating the surface of the first slot hole, so that the step edges of the first slot hole are rounded, and the continuity of the common electrode layer is improved.
Further, in other embodiments, the method further comprises the following steps after the preparing the common electrode layer: preparing a second opening, wherein the second opening extends from the common electrode layer to the surface of the thin film transistor structure layer; preparing a passivation layer on the common electrode layer and the hole surface of the second opening, and extending the passivation layer to the surface of the thin film transistor structure layer to form a second slot; preparing a first through hole corresponding to the first slot hole and penetrating through the passivation layer, the first through hole being communicated with the first slot hole; and preparing a conductive layer to cover the hole surface of the first through hole, form a compensation layer on the surface of the common electrode layer in the first slot hole and form a pixel electrode layer on the surface of the second slot hole and extending to the surface of the passivation layer.
Further, in other embodiments, wherein the common electrode layer is prepared by a physical vapor deposition method.
Further, in other embodiments, wherein the passivation layer is prepared by a chemical vapor deposition method.
In order to achieve the above object, the present invention further provides a display device including the display panel according to the present invention.
Compared with the prior art, the invention has the beneficial effects that: the invention provides a display panel, a manufacturing method thereof and a display device.A first slot hole is manufactured in a flat layer, the first slot hole is of a step structure, a part of a touch layer is exposed in the first slot hole, a common electrode layer is arranged on the surfaces of the first slot hole and the touch layer, the continuity of the common electrode layer is improved on the premise of ensuring that the contact area of the common electrode layer and the touch layer is unchanged, and the reliability of a touch function is further improved; on the other hand, the anti-fracture capability of the common electrode layer is further enhanced and the reliability of the touch function is improved by forming the compensation layer on the surface of the common electrode layer in the first slot hole.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display panel provided in the prior art.
Fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for manufacturing a display panel according to an embodiment of the invention;
fig. 4 is a flowchart of step S61 of a method for manufacturing a display panel according to an embodiment of the present invention.
Description of the drawings in the background art:
a substrate-111; an active layer-112;
a gate insulating layer-113; an interlayer insulating layer-114;
a source drain layer-115;
a display panel-100;
touch layer-120; a planarization layer-130;
a connecting hole-131; a common electrode layer-140;
passivation layer-150; a pixel electrode layer-160;
description of the figures in the detailed description:
a display panel-100; a thin film transistor structure layer-110;
touch layer-120; a planarization layer-130;
a first slot-131; a common electrode layer-140;
passivation layer-150; a first through-hole-151;
a second slot-160; a second opening-132;
a conductive layer-170; a compensation layer-171;
pixel electrode layers-172; a first well-1311;
a second porous body-1312;
a substrate-111; an active layer-112;
a gate insulating layer-113; an interlayer insulating layer-114;
source drain layer-115.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
Specifically, referring to fig. 2, fig. 2 is a schematic structural diagram of the display panel 100 provided in the present embodiment, and the display panel 100 includes a thin film transistor structure layer 110, a touch layer 120, a planarization layer 130, a common electrode layer 140, a passivation layer 150, and a conductive layer 170.
The thin film transistor structure layer 110 includes a substrate 111, an active layer 112, a gate insulating layer 113, an interlayer insulating layer 114, and a source drain layer 115. The active layer 112 is disposed on the substrate 111, the gate insulating layer 113 is disposed on the active layer 112, the interlayer insulating layer 114 is disposed on the gate insulating layer 113, the source drain layer 115 is disposed on the interlayer insulating layer 114, and the source drain layer 115 is connected to the active layer 112.
The touch layer 120 is disposed on the interlayer insulating layer 114 and is disposed in the same layer as the source/drain layer 115. The planarization layer 130 is disposed on the interlayer insulating layer 114 and covers the touch layer 120, and the planarization layer 130 has a first slot 131.
The first slot 131 extends from a surface of the planarization layer 130 away from the touch layer 120 to a surface of the touch layer 120, and a portion of the touch layer 120 is exposed in the first slot 131.
The common electrode layer 140 is disposed on the surfaces of the planarization layer 130, the first slot 131 and the touch layer 120, the first slot 131 is a step structure, and the first slot 131 of the step structure improves the continuity of the common electrode layer 140 on the premise of ensuring that the contact area between the common electrode layer 140 and the touch layer 120 is not changed, thereby improving the reliability of the touch function.
A passivation layer 150 is disposed on the common electrode layer 140, and a first through hole 151 is disposed in the passivation layer 150. Wherein the first through hole 151 corresponds to the first slot 131 and penetrates through the passivation layer 150, and the first through hole 151 communicates with the first slot 131. And a second groove hole 160 extending from the passivation layer 150 to the surface of the thin film transistor structure layer 110.
The conductive layer 170 covers the surface of the first through hole 151, the surface of the common electrode layer 140 in the first slot 131 to form a compensation layer 171, and the surface of the second slot 160 and extends to the surface of the passivation layer 150 to form a pixel electrode layer 172. The material of the conductive layer 170 is the same as that of the common electrode layer 140, and in this embodiment, indium tin oxide films are used, so that the compatibility of the two indium tin oxide films is good, a heterogeneous interface does not exist, the fracture resistance of the common electrode layer 140 is enhanced, and the reliability of the touch function is improved.
The first slot 131 includes a first hole 1311 and a second hole 1312 surrounding the first hole 1311, the first hole 1311 is communicated with the second hole 1312, and the light transmittance of the film layer in the projection of the first hole 1311 is greater than 90%.
The present embodiment further provides a manufacturing method for manufacturing the display panel 100 according to the present embodiment, including steps S1-S5. Referring to fig. 3, fig. 3 is a flowchart of a method for manufacturing a display panel according to the present embodiment.
Step S1: providing a thin film transistor structure layer 110; the thin film transistor structure layer 110 includes a substrate 111, an active layer 112, a gate insulating layer 113, an interlayer insulating layer 114, and a source/drain layer 115. The active layer 112 is disposed on the substrate 111, the gate insulating layer 113 is disposed on the active layer 112, the interlayer insulating layer 114 is disposed on the gate insulating layer 113, the source drain layer 115 is disposed on the interlayer insulating layer 114, and the source drain layer 115 is connected to the active layer 112.
Step S2: preparing a touch layer 120 on the thin film transistor structure layer 110; the touch layer 120 is disposed on the interlayer insulating layer 114 and is disposed in the same layer as the source/drain layer 115.
Step S3: the planarization layer 130 is disposed on the tft structure layer 110 and covers the touch layer 120.
Step S4: preparing a first slot 131, wherein the first slot 131 extends from a surface of the planarization layer 130 away from the touch layer 120 to a surface of the touch layer 120, and a portion of the touch layer 120 is exposed in the first slot 131; the first slot 131 is a step structure.
Step S5: the common electrode layer 140 is formed on the surfaces of the planarization layer 130, the first slot 131 and the touch layer 120, and the common electrode layer 140 is formed by physical vapor deposition.
The material of the planarization layer 130 is an organic material with photosensitive property, the planarization layer 130 is exposed and developed to form a first slot 131, and then the surface of the first slot 131 is treated by oxygen plasma, so that the step edge of the first slot 131 is rounded, and the continuity of the common electrode layer 140 is improved.
The method also includes steps S61-S64 after preparing the common electrode layer 140.
Step S61: preparing a second opening 132, wherein the second opening 132 extends from the common electrode layer 140 to the surface of the thin film transistor structure layer 110; referring to fig. 4, fig. 4 is a schematic structural diagram of the display panel manufacturing method provided in this embodiment in step S61.
Step S62: the passivation layer 150 is formed on the common electrode layer 140 and on the hole surface of the second opening 132 by chemical vapor deposition, and a second slot 160 is formed extending from the passivation layer 150 to the surface of the thin film transistor structure layer 110.
Step S63: a first through hole 151 is formed, the first through hole 151 corresponding to the first slot 131 and penetrating the passivation layer 150, the first through hole 151 communicating with the first slot 131.
Step S64: the conductive layer 170 is formed to cover the hole surface of the first via hole 151, the surface of the common electrode in the first slot hole 131 to form the compensation layer 171, and the pixel electrode layer 172 is formed to cover the surface of the second slot hole 160 and extend to the surface of the passivation layer 150.
The material of the conductive layer 170 is the same as that of the common electrode layer 140, and in this embodiment, indium tin oxide films are used, so that the compatibility of the two indium tin oxide films is good, a heterogeneous interface does not exist, the fracture resistance of the common electrode layer 140 is enhanced, and the reliability of the touch function is improved.
The embodiment also provides a display device comprising the display panel related to the embodiment.
The invention has the beneficial effects that: the invention provides a display panel, a manufacturing method thereof and a display device.A first slot hole is manufactured in a flat layer, the first slot hole is of a step structure, a part of a touch layer is exposed in the first slot hole, a common electrode layer is arranged on the surfaces of the first slot hole and the touch layer, the continuity of the common electrode layer is improved on the premise of ensuring that the contact area of the common electrode layer and the touch layer is unchanged, and the reliability of a touch function is further improved; on the other hand, the anti-fracture capability of the common electrode layer is further enhanced and the reliability of the touch function is improved by forming the compensation layer on the surface of the common electrode layer in the first slot hole.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The display panel and the manufacturing method thereof provided by the embodiments of the present application are described in detail above, and the principle and the implementation manner of the present application are explained by applying specific examples herein, and the description of the embodiments above is only used to help understanding the technical scheme and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A display panel, comprising:
a thin film transistor structure layer;
the touch layer is arranged on the thin film transistor structure layer;
the flat layer is arranged on the thin film transistor structure layer and covers the touch layer;
the first slot hole extends from one surface of the flat layer, which is far away from the touch layer, to the surface of the touch layer, and part of the touch layer is exposed in the first slot hole; the first slotted hole is of a step structure;
and the common electrode layer is arranged on the surfaces of the flat layer, the first slotted hole and the touch layer.
2. The display panel of claim 1, further comprising
The passivation layer is arranged on the common electrode layer; and
a first via hole corresponding to the first slot hole and penetrating through the passivation layer, the first via hole communicating with the first slot hole;
a second slot extending from the passivation layer to a surface of the thin film transistor structure layer;
and the conducting layer covers the hole surface of the first through hole, the surface of the common electrode layer in the first groove hole to form a compensation layer, and covers the surface of the second groove hole and extends to the surface of the passivation layer to form a pixel electrode layer.
3. The display panel of claim 2, wherein the thin film transistor structure layer comprises
A substrate;
an active layer disposed on the substrate;
a gate insulating layer disposed on the active layer;
an interlayer insulating layer disposed on the gate insulating layer;
the source drain layer is arranged on the interlayer insulating layer and is connected with the active layer; the touch layer and the source drain layer are arranged at intervals on the same layer; and part of the source and drain electrodes is exposed in the second slotted hole, and the pixel electrode layer is arranged on the surface of the source and drain electrodes.
4. The display panel of claim 1, wherein the first slot includes a first aperture and a second aperture surrounding the first aperture, the first aperture being in communication with the second aperture.
5. The display panel of claim 4, wherein a light transmittance of the film layer within the first aperture projection is greater than 90%.
6. A manufacturing method for manufacturing the display panel according to claim 1, comprising the steps of:
providing a thin film transistor structure layer;
preparing a touch layer on the thin film transistor structure layer;
preparing a flat layer on the thin film transistor structure layer and coating the touch layer;
preparing a first slot hole, wherein the first slot hole extends from one surface of the flat layer, which is far away from the touch layer, to the surface of the touch layer, and part of the touch layer is exposed in the first slot hole; the first slotted hole is of a step structure;
and preparing a common electrode layer on the surfaces of the flat layer, the first slot hole and the touch layer.
7. The method of manufacturing according to claim 6, further comprising, after the manufacturing of the common electrode layer, the steps of:
preparing a second opening, wherein the second opening extends from the common electrode layer to the surface of the thin film transistor structure layer;
preparing a passivation layer on the common electrode layer and the hole surface of the second opening, and extending the passivation layer to the surface of the thin film transistor structure layer to form a second slot;
preparing a first through hole corresponding to the first slot hole and penetrating through the passivation layer, the first through hole being communicated with the first slot hole;
and preparing a conductive layer to cover the hole surface of the first through hole, form a compensation layer on the surface of the common electrode layer in the first slot hole and form a pixel electrode layer on the surface of the second slot hole and extending to the surface of the passivation layer.
8. The production method according to claim 6, wherein the common electrode layer is produced by a physical vapor deposition method.
9. The method of claim 7, wherein the passivation layer is prepared by a chemical vapor deposition method.
10. A display device comprising the display panel according to any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911282136.5A CN111077687A (en) | 2019-12-13 | 2019-12-13 | Display panel, preparation method thereof and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911282136.5A CN111077687A (en) | 2019-12-13 | 2019-12-13 | Display panel, preparation method thereof and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111077687A true CN111077687A (en) | 2020-04-28 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111897453A (en) * | 2020-07-23 | 2020-11-06 | 武汉华星光电技术有限公司 | Display panel, preparation method thereof and display device |
| CN112987369A (en) * | 2021-02-08 | 2021-06-18 | 武汉华星光电技术有限公司 | Display panel, preparation method of display panel and display device |
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2019
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111897453A (en) * | 2020-07-23 | 2020-11-06 | 武汉华星光电技术有限公司 | Display panel, preparation method thereof and display device |
| CN112987369A (en) * | 2021-02-08 | 2021-06-18 | 武汉华星光电技术有限公司 | Display panel, preparation method of display panel and display device |
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Application publication date: 20200428 |