CN111061520A

CN111061520A - Method for loading and running embedded software with high reliability

Info

Publication number: CN111061520A
Application number: CN201911170195.3A
Authority: CN
Inventors: 李光; 王硕; 龚志勇; 张俊凯; 胡佳
Original assignee: CETC 54 Research Institute
Current assignee: CETC 54 Research Institute
Priority date: 2019-11-26
Filing date: 2019-11-26
Publication date: 2020-04-24
Anticipated expiration: 2039-11-26
Also published as: CN111061520B

Abstract

The invention discloses a method for loading and running embedded software with high reliability, and belongs to the technical field of embedded software development. The method comprises the steps of preprocessing original embedded software, redundantly writing NAND FLASH software data and high-reliability information, reading and correcting the software data, and the like. The method has extremely strong error correction capability, and can correctly and reliably load and run the embedded software under the occurrence probability of NAND FLASH bad blocks in the current technical level. Meanwhile, the method has the characteristics of simple algorithm and flexible realization, the majority decision decoding algorithm and the HASH algorithm used by the method are simple and effective to realize, and the error correction algorithm can be realized by using NAND FLASH controller-integrated algorithm or completely using software.

Description

Method for loading and running embedded software with high reliability

Technical Field

The invention relates to the technical field of embedded software development, in particular to a method for loading and running embedded software with high reliability.

Background

The embedded device is widely applied to various civil, industrial, aviation and military devices. The software for the embedded device is typically stored within the NOR FLASH NAND FLASH. After the equipment is powered on, the embedded software is loaded into the internal RAM and DDR for operation. NOR FLASH is higher than NAND FLASH in reliability, but has NAND FLASH great advantages in capacity, read-write speed, volume, price, etc. Therefore, NAND FLASH is currently widely used.

NAND FLASH, there is a bad block problem, and some bits may flip over, causing errors in the stored data. For audio and video data and the like, the normal use of the data is not influenced by the inversion of a few bits. However, for the embedded software code for execution, the code execution may be wrong, the device may not operate normally, or the device may execute wrong operations, which may cause accidents. The traditional NAND FLASH software loading usually adopts a mode of storing a plurality of software backups and loading in sequence, the error correction capability is not strong, and loading failure is easily caused when a plurality of bad blocks are caused in a complex application environment.

Disclosure of Invention

In view of this, the present invention provides a method for loading and running embedded software with high reliability, which preprocesses the original embedded software, and adopts redundant storage, before the software is loaded, detects the software data, and corrects the possible errors, thereby improving the reliability of the embedded software stored in NAND FLASH, and improving the success rate of loading the software.

In order to achieve the purpose, the invention adopts the technical scheme that:

a method for loading and running embedded software with high reliability comprises the steps of preprocessing original embedded software, redundantly writing NAND FLASH software data and high-reliability information, reading and correcting high-reliability information, and reading and correcting software data;

the original embedded software preprocessing specifically comprises the following steps:

(101) carrying out zero filling and segmentation on byte data of original embedded software;

(102) generating an error correcting code of each segment of data, and adding the error correcting code to the tail of the corresponding data segment;

(103) connecting the sections of data added with the error correcting codes into integrated software data;

the software data and high reliability information redundancy writing NAND FLASH specifically includes the following steps:

(201) generating high-reliability information, wherein the high-reliability information comprises loading parameter information of embedded software;

(202) selecting NAND FLASH N blocks, selecting M pages from each block, and storing the high-reliability information into the N × M pages respectively, wherein N is more than or equal to 1, M is more than or equal to 1, and N × M is more than or equal to 3; meanwhile, the software data is repeatedly written into NAND FLASH other blocks for P times, wherein P is more than or equal to 3;

the high-reliability information reading and error correction specifically comprises the following steps:

(301) extracting N x M parts of high reliability information from NAND FLASH;

(302) if M is more than or equal to 3, carrying out majority decision decoding on the high-reliability information positioned in the same block bit by bit to obtain N decoded high-reliability information, and then executing the step (303); otherwise, executing step (304);

(303) if N is more than or equal to 3, carrying out majority decision decoding on the N decoded high-reliability information bit by bit again to obtain final decoded high-reliability information; otherwise, randomly selecting a piece of decoded high-reliability information as final decoded high-reliability information;

(304) carrying out majority decision decoding on the N × M pieces of high-reliability information bit by bit to obtain final decoded high-reliability information;

the software data reading and error correction specifically comprises the following steps:

(401) reading P parts of software data, correcting the software data one by one, and if the correction is successful, executing the step (403) by taking the part of software data as correct data; if all the software data fail to correct errors, executing step (402);

(402) carrying out majority decision decoding on the P parts of software data bit by bit to obtain decoded software data, and executing the step (403) by taking the software data as correct data;

(403) and deleting the error correcting codes in the correct data and zero padding at the tail to obtain original software data, and loading the software according to the loading parameter information in the high-reliability information.

In addition, the invention also provides a method for loading and running the embedded software with high reliability, which comprises the steps of preprocessing the original embedded software, redundantly writing NAND FLASH the software data and the high-reliability information, reading and correcting the high-reliability information and reading and correcting the software data;

(201) performing hash operation on the software data to obtain hash data of the software data;

(202) generating high-reliability information, wherein the high-reliability information comprises the hash data and loading parameter information of the embedded software;

(203) selecting NAND FLASH N blocks, selecting M pages from each block, and storing the high-reliability information into the N × M pages respectively, wherein N is more than or equal to 1, M is more than or equal to 1, and N × M is more than or equal to 3; meanwhile, the software data is repeatedly written into NAND FLASH other blocks for P times, wherein P is more than or equal to 3;

(301) extracting N x M parts of high reliability information from NAND FLASH;

(401) reading P parts of software data, verifying the hash data of the software data one by one, and if the hash data are consistent, taking the part of software data as correct data, and executing the step (404); if all the software data fail to be verified, executing step (402);

(402) correcting the software data in shares, verifying the hash data after correcting the error, and if the hash data is consistent, executing the step (404) by taking the software data as correct data; if all the software data fail to be verified after error correction, executing step (403);

(403) carrying out majority judgment decoding on the P parts of software data bit by bit to obtain decoded software data, verifying hash data of the decoded software data, if the hash data passes the verification, taking the decoded software data as correct data, and executing the step (404), otherwise, prompting that the software loading fails;

(404) and deleting the error correcting codes in the correct data and zero padding at the tail to obtain original software data, and loading the software according to the loading parameter information in the high-reliability information.

The invention adopts the technical scheme and has the beneficial effects that:

1. the invention preprocesses the original embedded software and adds the error correction information, so that the software data can be corrected before loading, and the loading success rate is improved.

2. The invention stores the data of the software and the loading information of the software separately, and adopts a redundant storage mode, thereby improving the safety and recoverability of the data and improving the reliability of the embedded software stored in NAND FLASH.

3. According to the invention, a series of detection and recovery processing are carried out on the software data before the software is loaded, so that software data errors caused by bad blocks can be avoided as much as possible, and the reliability of software data storage and the loading success rate are further improved.

In a word, the method has extremely strong error correction capability, and can correctly and reliably load and run embedded software under the NAND FLASH bad block occurrence probability in the current technical level. Meanwhile, the method has the characteristics of simple algorithm and flexible realization, the majority decision decoding algorithm and the HASH algorithm used by the method are simple and effective to realize, and an error correction algorithm (such as a common BCH algorithm) can be realized by using an algorithm integrated in an NAND FLASH controller or completely realized by using software.

Drawings

FIG. 1 is a block diagram of SW _ WITH _ PADDING in an embodiment of the present invention;

FIG. 2 is a schematic diagram illustrating the generation of SW _ WITH _ ECC according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of HIREL _ INFO generation in an embodiment of the present invention;

FIG. 4 is a schematic diagram of HIREL _ INFO storage in an embodiment of the present invention;

FIG. 5 is a diagram illustrating SW _ WITH _ ECC storage according to an embodiment of the present invention;

FIG. 6 is a schematic diagram illustrating the generation of HIREL _ INFO _ ROW in the embodiment of the present invention;

fig. 7 is an overall flow chart of a method of an embodiment of the invention.

Detailed Description

The invention is further described with reference to the following figures and detailed description.

(301) extracting N x M parts of high reliability information from NAND FLASH;

In addition, a hash algorithm can be introduced to further improve the reliability of the software. Specifically, the method comprises the steps of preprocessing original embedded software, redundantly writing NAND FLASH software data and high-reliability information, reading and correcting high-reliability information, and reading and correcting software data;

(301) extracting N x M parts of high reliability information from NAND FLASH;

A more specific example is as follows:

as shown in fig. 7, a method for loading and running embedded software with high reliability mainly includes the following steps:

(1) a preprocessing method of embedded software;

(2) storage of embedded software in NAND FLASH;

(3) a high-reliability data information loading method for embedded software;

(4) the embedded software code carries the method.

Wherein, the step (1) comprises the following steps:

(1.1) byte data of the embedded software is referred to as SW. SW is zero-padded at the end to make its length an integer multiple of a specific length sect _ len. The byte data obtained by zero PADDING the SW end is called SW _ WITH _ PADDING.

(1.2) the SW _ WITH _ PADDING is segmented according to the length of SECT _ len, and each segment is called SW _ SECT _ i. The data segmentation is schematically shown in fig. 1.

(1.3) each SW _ SECT _ i uses BCH codes to carry out error correction coding, and the generated error correction data is called SW _ SECT _ BCH _ i.

(1.4) SW _ SECT _ i and SW _ SECT _ BCH _ i are connected together and called SW _ SECT _ WITH _ ECC _ i.

(1.5) all SW _ SECT _ WITH _ ECC _ i are connected together, called SW _ WITH _ ECC. The schematic diagram is shown in fig. 2.

(1.6) carrying out HASH (HASH) operation on the SW _ WITH _ ECC, and obtaining HASH data which is called SW _ HASH.

(1.7) combining the software length information, the storage address in NAND FLASH, the address of the software to be loaded into RAM/DDR, the entry point of the software execution and other parameter information to form an embedded software information data block called SW _ INFO.

(1.8) the SW _ INFO and SW _ HASH data are concatenated together, called high reliability information HIREL _ INFO. The schematic diagram is shown in fig. 3.

The step (2) specifically comprises the following steps:

(2.1) selecting NAND FLASH N BLOCKs (BLOCK) in a specific pattern, selecting M PAGEs (PAGE) from each BLOCK, writing one HIREL _ INFO data in each PAGE, and co-writing M beta N HIREL _ INFO. The schematic diagram is shown in fig. 4.

(2.2) selecting NAND FLASH blocks and writing SW _ WITH _ ECC in sequence according to a specific mode. Within these blocks, SW _ WITH _ ECC is sequentially written repeatedly P times. The schematic diagram is shown in fig. 5.

Aspect (3) specifically includes the steps of:

(3.1) while the embedded system is running, selecting NAND FLASH N blocks in a particular pattern, reading a block of HIREL _ INFO data from each of a particular number M of pages of each block, and co-reading the M beta N blocks of HIREL _ INFO data.

(3.2) for M HIREL _ INFO data in each NAND FLASH blocks, the bits corresponding to the bits are taken out, and 1 bit is obtained according to the mode of majority decision decoding (majority decoding). All bits are together forming a data block hierl _ INFO _ ROW _ i. The operation schematic diagram is shown in fig. 5.

And (3.3) operating the M HIREL _ INFO data in all the N NAND FLASH blocks according to the step 2 to obtain N HIREL _ INFO _ ROW _ i data blocks.

And (3.4) taking out the bits corresponding to the bits of the N HIREL _ INFO _ ROW _ i data blocks, and obtaining 1 bit according to a majority decision decoding mode. All bits together form a HIREL _ INFO _ DEC.

(3.5) HIREL _ INFO _ DEC is HIREL _ INFO data that is not corrected for bit flip errors that may occur.

The step (4) specifically comprises the following steps:

(4.1) reading P SW _ WITH _ ECC's from NAND FLASH blocks according to the parameter information of HIREL _ INFO _ DEC and according to the specific mode.

(4.2) performing a HASH operation on each SW _ WITH _ ECC in sequence, and comparing the result WITH SW _ HASH in HIREL _ INFO _ DEC. If the data is the same, the SW _ WITH _ ECC is error-free, and the data is selected as the input of the code loading operation step, which is called SW _ WITH _ ECC _ CORRECT. Otherwise, the HASH comparison operation is performed on the next SW _ width _ ECC.

(4.3) if the HASH comparison of all SW _ WITH _ ECCs is different, performing BCH decoding operation on each SW _ WITH _ ECC in sequence to correct possible errors. After the BCH decoding operation is executed, the HASH operation is carried out on the obtained data again, and the obtained data is compared WITH SW _ HASH in HIREL _ INFO _ DEC, if the obtained data is the same as the SW _ HASH, the decoded data is set as SW _ WITH _ ECC _ CORRECT. Otherwise, the BCH decoding error correction operation and HASH comparison operation are performed on the next SW _ WITH _ ECC.

(4.4) if the HASH value of all SW _ WITH _ ECCs is still different from the SW _ HASH value in the HIREL _ INFO _ DEC after BCH decoding error correction operation, taking out the bits of the corresponding bit bits of all SW _ WITH _ ECCs, and decoding according to majority decision to obtain 1 bit. All decoded bits are together called SW _ WITH _ ECC _ MD _ DEC. The HASH operation is performed on SW _ width _ ECC _ MD _ DEC and compared WITH SW _ HASH within hierl _ INFO _ DEC. If the data is the same, SW _ WITH _ ECC _ MD _ DEC is set to SW _ WITH _ ECC _ CORRECT. Otherwise, the NAND FLASH bad block condition is judged to be too serious, the software cannot be recovered, and the software loading fails.

(4.5) taking out all SW _ SECT _ WITH _ ECC _ i from SW _ WITH _ ECC _ CORRECT, removing SW _ SECT _ BCH _ i, combining all the obtained SW _ WITH _ SECT _ i together, and removing zero bytes filled at the tail according to parameter information of HIREL _ INFO _ DEC to obtain SW. SW is loaded to the designated position of RAM/DDR according to the parameter information of HIREL _ INFO _ DEC, and the execution is started from the designated code entry.

It should be noted that the above description of the embodiments is only used to help understand the method of the present invention and its core idea. For those skilled in the art, variations can be made in the specific embodiments and applications without departing from the spirit of the invention. Accordingly, the subject matter of this specification should not be construed as limiting the invention.

Claims

1. A method for loading and running embedded software with high reliability is characterized by comprising the steps of preprocessing original embedded software, redundantly writing NAND FLASH software data and high-reliability information, reading and correcting high-reliability information, and reading and correcting software data;

(301) extracting N x M parts of high reliability information from NAND FLASH;

2. A method for loading and running embedded software with high reliability is characterized by comprising the steps of preprocessing original embedded software, redundantly writing NAND FLASH software data and high-reliability information, reading and correcting high-reliability information, and reading and correcting software data;

(301) extracting N x M parts of high reliability information from NAND FLASH;