CN111049610B - Time synchronization management tester for testing relay protection device - Google Patents
Time synchronization management tester for testing relay protection device Download PDFInfo
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- CN111049610B CN111049610B CN201911277027.4A CN201911277027A CN111049610B CN 111049610 B CN111049610 B CN 111049610B CN 201911277027 A CN201911277027 A CN 201911277027A CN 111049610 B CN111049610 B CN 111049610B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
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Abstract
The invention provides a time synchronization management tester for testing a relay protection device, which comprises a rectangular case, wherein a debugging interface is arranged at the left upper part of a front panel in front of the case, a bus board parallel to the front panel of the case is arranged in the case, a supporting plate vertical to and vertically arranged with the bus board is arranged behind the bus board, a CPU processing management module, an optical B code output module and an electric B code output module are arranged on the supporting plate, a power module board is arranged behind the bus board and parallel to the supporting plate, and a client is arranged outside the case; the client is electrically connected with the debugging interface through a communication line; the debugging interface is electrically connected to the CPU processing management module through the bus board, and the CPU processing management module is respectively and electrically connected with the optical B code output module and the electric B code output module. Compared with the prior art, the high-efficiency and convenient testing tool is provided, and the product quality of the tested relay protection device is practically controlled.
Description
Technical Field
The invention relates to a relay protection device of a power system, in particular to time synchronization management test equipment.
Background
With the rapid development and the general application of digitization and intellectualization of power systems, a relay protection device is required to meet the requirement of time synchronization management. The time synchronization management is a function that the relay protection device responds to different types of clock signals, and the relay protection device can correct the time accurately aiming at the correct clock signals; and aiming at the abnormal clock signals, the relay protection device makes judgment according to different abnormal conditions. The time synchronization management can enable the relay protection device and the clock source to form closed-loop response and monitoring, and the problem that the event record of the relay protection device is disordered due to time synchronization errors and even the operation fault of a power system is caused is avoided. Therefore, the importance of a comprehensive test of the function of time synchronization management of the relay protection device is self-evident. At present, the construction of an electric power system and the updating and upgrading of a relay protection device are accelerated, the factory test of the relay protection device faces the dilemma of more devices, time tightness and heavy tasks, a test tool in the prior art adopts a single clock source form, only comprises a time correcting function, cannot simulate to send various abnormal clock signals or simulate a part of abnormal signals, and the clock signal monitoring function is incomplete; the test tool has large volume and is inconvenient to carry in various experimental sites and engineering sites; the number of interfaces is less, and at most 3 groups of timing interfaces exist. Therefore, the method has the defects of weak pertinence, few time correction interfaces and inconvenience in use and carrying, so that the testing efficiency of the relay protection device is low, the cost is high, and a relay protection manufacturer cannot complete the testing of a large number of time synchronization management functions of the relay protection device efficiently and in high quality.
Disclosure of Invention
The invention aims to provide a time synchronization management tester for testing a relay protection device, and aims to improve the testing efficiency of the time synchronization management function of the relay protection device.
In order to solve the problems, the invention adopts the following technical scheme: a time synchronization management tester for testing a relay protection device comprises a rectangular case, wherein a debugging interface is arranged at the left upper part of a front panel in front of the case, a bus plate parallel to the front panel of the case is arranged in the case, a supporting plate vertical to and arranged behind the bus plate is arranged, a CPU processing management module, an optical B code output module and an electric B code output module are arranged on the supporting plate, a power module plate is arranged behind the bus plate and parallel to the supporting plate, and a client is arranged outside the case; the client is electrically connected with the debugging interface through a communication line; the debugging interface is electrically connected to the CPU processing management module through the bus board, and the CPU processing management module is respectively and electrically connected with the optical B code output module and the electric B code output module; the power supply module supplies power to the debugging interface, the CPU processing management module, the optical B code output module and the electric B code output module through the bus board;
the client is provided with a human-computer interface and used for setting and modifying various timing parameters by operators, simulating normal or abnormal clock signals, converting the clock signals into data frames, namely B code test instruction messages, and then sending the B code test instruction messages to the debugging interface through a communication line;
the debugging interface transmits the instruction to the CPU processing management module in real time according to a TCP/IP protocol;
the CPU processing management module receives a B code test instruction sent by the client, obtains a time value after operation processing, and respectively sends the time value to the optical B code output module or the electric B code output module; the test instruction is jump second setting, leap second setting, time quality setting and channel delay.
Furthermore, the B code test instruction received by the CPU processing management module is a second skip setting instruction, the CPU processing management module reads the feature code and the message body in the data frame message, and according to the second skip setting mode in the message body, if the B code test instruction is a forward skip 1s, the CPU processing management module fast forwards the current self time for 1s and sends the modified time to the optical B code output module or the electric B code output module; and if the time is backward jump 1s, the CPU processing management module backs the current time by 1s and sends the modified time to the optical B code output module and the electric B code output module.
Furthermore, the B code test instruction received by the CPU processing management module is a leap second setting instruction, the CPU processing management module reads the feature code and the message body in the data frame message, and according to the leap second setting mode in the message body, if the leap second setting instruction is positive leap second, the CPU processing management module can move the second counting time from 58 seconds of a certain normal minute to 59 seconds, and then move to the next minute 00 seconds and 01 seconds; the modification is that 58 seconds of a certain minute is walked to 59 seconds, then 60 seconds are walked, and then the next minute is walked to 00 seconds and 01 seconds; the modified time is sent to an optical B code output module or an electric B code output module; if the number of seconds is negative leap seconds, the CPU processing management module can enable the second counting time to be changed from 58 seconds in one normal minute to 59 seconds, and then to 00 seconds and 01 seconds in the next minute; the modification is that 58 seconds in one minute directly go to the next 00 seconds and 01 seconds in one minute; and sending the obtained modified time to the optical B code output module and the electric B code output module.
Further, the B code test instruction received by the CPU processing management module is a time quality setting instruction, and the CPU processing management module reads the feature code and the message body in the data frame message to obtain a time quality setting value, where the value range is 0 to 15, and sends the time quality value to the optical B code output module and the electrical B code output module.
Furthermore, the B code test instruction received by the CPU processing management module is a channel delay setting instruction, the CPU processing management module reads the feature code and the packet body in the data frame packet to obtain a channel delay value, the channel delay value range is 0 to 65535, and the channel delay value is directly issued to the optical B code output module 4 and the electrical B code output module.
Further, the optical B code output module and the electrical B code output module receive a B code test instruction sent by the CPU processing management module 3, and output a time packet according to an IRIG-B code element definition.
Further, the optical B code output module receives time setting of a B code test instruction issued by the CPU processing management module, uses a field programmable logic array FPGA, defines an output time message according to an IRIG-B code element, and sends the output time message to an optical B code timing interface of the tested relay protection device in an optical signal transmission mode.
Further, the electric B code output module receives time setting of a B code test instruction issued by the CPU processing management module, uses a field programmable logic array FPGA, defines an output time message according to an IRIG-B code element, and sends the output time message to an electric B code timing interface of the tested relay protection device in a high-low level transmission mode.
Further, when the optical B code output module and the electric B code output module simultaneously receive a B code test instruction issued by the CPU processing management module, if the timing interface of the tested relay protection device is the optical B code timing interface, the optical B code output module is used for timing the tested relay protection device; and if the timing interface of the tested relay protection device is an electric B code timing interface, the electric B code output module is used for timing the tested relay protection device.
Compared with the prior art, the invention realizes the pertinence test verification of the optical B code and the electric B code of the relay protection device, has small volume, flexible use, convenient carrying and simple and convenient operation, has the capability of providing a test time synchronization management function for various timing modes of the relay protection device of the power system, provides an efficient and convenient test tool for the conditions of emergent test time and more tested relay protection devices, and practically controls the product quality of the tested relay protection device.
Drawings
Fig. 1 is a schematic structural diagram of an embodiment of the present invention.
Fig. 2 is a control flow diagram of an embodiment of the invention.
Fig. 3 is a front view of fig. 1.
Fig. 4 is a rear view of fig. 1.
Fig. 5 is a rear terminal arrangement diagram of an embodiment of the present invention.
Fig. 6 is a schematic diagram of an arrangement of CPU processing management modules according to an embodiment of the present invention.
Fig. 7 is a schematic view of a bus board arrangement according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
As shown in fig. 1, 3 and 6, the time synchronization management tester (tester) for testing a relay protection device of the present invention is provided with a rectangular case 1, a debugging interface 2 is provided at the left upper part of the front panel in front of the case 1, a bus board 7 parallel to the front panel of the case 1 is provided in the case 1, a supporting plate vertical to and disposed behind the bus board 7 is provided, the supporting plate is provided with a CPU processing management module 3, an optical B code output module 4 and an electrical B code output module 5, a power module 6 is provided behind the bus board 7 and parallel to the supporting plate, and a client 8 is provided outside the case 1.
The code B is an IRIG-B format time code and an international universal time format code. The electric B code is used for electric B code time synchronization, which means that standard time signals are transmitted by using the level, and the method is suitable for time synchronization of a relay protection device provided with an electric B code time synchronization interface. The optical B code is used for optical B code time synchronization, namely, standard clock signals are transmitted by using optical signals, and the optical B code time synchronization method is suitable for time synchronization of a relay protection device provided with an optical B code time synchronization interface.
The client 8 is electrically connected to the debug interface 2 via a communication line 9.
The debugging interface 2 is electrically connected to the CPU processing management module 3 through the bus board 7, and the CPU processing management module 3 is electrically connected with the optical B code output module 4 and the electric B code output module 5 respectively.
The power module 6 supplies power to the debugging interface 2, the CPU processing management module 3, the optical B code output module 4 and the electric B code output module 5 through the bus board 7.
As shown in fig. 2, the client 8 is a computer and is provided with a human-computer interface, which is used for an operator to perform time synchronization monitoring management according to the standard of time synchronization management "< time synchronization monitoring management state transfer text transfer from [ 2014 ] 53 > < power system time synchronization monitoring management technical scheme section 3: the technical scheme of the factory station time synchronization monitoring' requires, sets and modifies various timing parameters, and simulates normal or abnormal clock signals. The clock signal is converted into a data frame format, the data frame is composed of a message head and a message body (the message head is composed of 7 bytes and comprises a start code, a message length, a source address, a target address and a feature code, the message body comprises two bytes), different instructions are distinguished according to the feature code in the message head, and specifically set operation parameters and parameter values are contained in the message body. The data frame is the test instruction message of the B code. The B code test instruction message is transmitted to the CPU module according to the TCP/IP protocol. In addition, after the time calibration of the relay protection device to be tested is successful, an operator can issue a network time protocol NTP time measurement instruction and a general object-oriented substation event GOOSE time measurement instruction to the relay protection device to be tested through a human-computer interface, and the closed-loop monitoring of the time deviation is completed.
The human-computer interface of the client 8 receives the control of an operator, and sets parameters of the B code in a form of button selection or number input, for example, skip second setting, and select forward skip for 1s or backward skip for 1s through a button; as another example of time quality setting, the quality bit is set to 0-15 by inputting a number, with the quality deviation being larger as the number increases. Through operation setting, a B code test instruction is obtained and is sent to the debugging interface 2 through the communication line 9.
The B code test instruction comprises a jump-second setting (jump-forward 1 second, jump-backward 1 second, feature code 0x0040), a leap-second setting (positive leap second, negative leap second, feature code 0x0041), a time quality setting (time quality is good, time quality is not good, feature code 0x0042), and a channel delay (feature code 0x 0043).
The human-computer interface of the client 8 is controlled by an operator, and the network address and the network time protocol reference identifier are set in a mode of inputting numbers or letters: setting the network address of the computer where the client is located, setting the network address of the tested relay protection device, and setting the reference identifier of the network time protocol NTP. By setting, the client 8 issues a network time protocol NTP time measurement instruction to the relay protection device to be tested, the relay protection device to be tested replies a time measurement message after responding to the instruction, and the client 8 obtains the deviation between the time of the relay protection device to be tested and the time of the time synchronization management tester according to the received message and verifies whether the network time protocol NTP of the relay protection device to be tested is correct.
The human-computer interface of the client 8 receives the control of an operator, and relevant input and output control blocks for the time measurement of the substation event GOOSE facing the general object of the relay protection device to be tested are selected through buttons. Through setting, the client 8 issues a general object-oriented substation event GOOSE time measurement instruction to the relay protection device to be tested, and starts a time measurement request. And the tested relay protection device replies a time measurement message after responding to the instruction, and the client 8 obtains the deviation of the time of the tested relay protection device and the time of the time synchronization management tester according to the received message and verifies whether the time measurement of the tested relay protection device for the general object-oriented substation event GOOSE is correct or not.
The debugging interface 2 transmits the instruction to the CPU processing management module 3 in real time according to the TCP/IP protocol.
The CPU processing management module 3 receives a B code test instruction (the time measurement instruction is a skip second setting, a leap second setting, a time quality setting, and a channel delay) sent from the client 8, performs an operation to obtain a time value (the B code test instruction), and sends the time value (the B code test instruction) to the optical B code output module 4 or the electrical B code output module 5, respectively. The method comprises the following steps:
the CPU processing management module 3 receives a skip second setting instruction (the feature code is 0x0040), the CPU processing management module 3 reads the feature code (0x0040) and a message body (the message body consists of 2 bytes, the message body is a skip second setting mode, wherein 0x0000 represents forward skip 1s, 0x0001 represents backward skip 1s, and the skip second setting mode in the message body comprises forward skip 1s and backward skip 1s of code B time. If the time is jumping forward for 1s, the CPU processing management module 3 fast forwards the current time for 1s, and sends the modified time to the optical B code output module 4 or the electric B code output module 5 through the CPU bus LOCALBUS. If the time is backward jump 1s, the CPU processing management module 3 backs up the current time by 1s, and sends the modified time to the optical B code output module 4 and the electric B code output module 5 through the CPU bus LOCALBUS.
The CPU processing and management module 3 receives a leap second setting instruction (the feature code is 0x0041), the CPU processing and management module 3 reads the feature code (0x0041) and a message body (the message body consists of 2 bytes, the message body is a leap second setting mode, wherein 0x0000 represents positive leap second, and 0x0001 represents negative leap second), and the leap second setting mode in the message body comprises that the code B time is positive leap second and negative leap second. If the leap second is positive, the CPU processing and management module 3 will move the second counting time from 58 seconds of a certain normal minute to 59 seconds, and then to 00 seconds and 01 seconds of the next minute; the modification is that 58 seconds of a certain minute is walked to 59 seconds, then 60 seconds are walked, and then the next minute is walked to 00 seconds and 01 seconds; and sending the modified time to the optical B code output module 4 or the electric B code output module 5 through a CPU bus LOCALBUS. If the number of seconds is negative leap seconds, the CPU processing and management module 3 will move the second counting time from 58 seconds of a certain normal minute to 59 seconds, and then to 00 seconds and 01 seconds of the next minute; the modification is that 58 seconds in one minute directly go to the next 00 seconds and 01 seconds in one minute; and issuing the obtained modified time to the optical B code output module 4 and the electric B code output module 5 through a CPU bus LOCALBUS.
The CPU processing management module 3 receives a time quality setting instruction (the feature code is 0x0042), the CPU processing management module 3 reads the feature code (0x0042) and a message body (the message body consists of 2 bytes, the message body is a time quality setting value, the 16-system range is 0x 0000-0 x000F, the decimal range is 0-15), and the time quality setting value (the decimal value range is 0-15) is obtained. The time quality setting value is contained in the B code time and represents the quality of the B code time output by the time synchronization management tester, and the time quality deviation is larger along with the increase of the value. The default value is 0, which represents that the time quality is optimal; the value 15 represents the worst temporal quality. The CPU processing management module 3 sends the time quality value to the optical B code output module 4 and the electric B code output module 5 through a CPU bus LOCALBUS.
The CPU processing management module 3 receives a channel delay setting instruction (the feature code is 0x0043), the CPU processing management module 3 reads the feature code (0x0043) and a message body (the message body consists of 2 bytes, the message body is a channel delay value, the 16-system range is 0x 0000-0 xFFFF, the decimal range is 0-65535), and the channel delay value (the decimal value range is 0-65535) is obtained. The channel delay value represents the time offset of the whole B code time relative to the whole second, the channel delay value is 0 under the default condition, and the time synchronization management tester sends the B code time once in the whole second. If the channel delay value is set to 3, the time synchronization management tester will send the B code time once (whole second +3 ms). The CPU processing management module 3 directly issues the channel delay value to the optical B code output module 4 and the electric B code output module 5 through a CPU bus LOCALBUS.
In this embodiment, the CPU processing management module 3 is provided with an embedded real-time multitask operating system RTOS, and communicates with the client 8, the optical B code output module 4, and the electrical B code output module 5 according to a TCP/IP protocol, and the CPU processing management module 3 is built with a transmission control protocol service TCPSERVER for monitoring and responding to communication information of the client 8, and preferentially receiving a test setting instruction to ensure accuracy of time setting.
The CPU processing management module 3, upon receiving the B code test instruction issued by the client 8, quickly responds to the B code test instruction, and parses the clock instruction packet according to the private protocol. The proprietary protocol defines the data frame format of the B code test instruction, and the data frame consists of a message header and a message body. The message header contains 7 bytes, including start code (1 byte, fixed as 0x68), message length (2 bytes, low bytes are before, not including start code and message length), source address (1 byte), destination address (1 byte), signature code (2 bytes), different instructions are distinguished according to the signature code in the message header. The message body comprises two bytes, and the specifically set operation parameters and parameter values are contained in the message body, such as the aforementioned leap second setting mode, time quality setting value, channel delay value, and the like, which are all embodied in the message body. The CPU processing management module 3 issues the acquired B code test instruction to the optical B code output module 4 and the electric B code output module 5 through a CPU bus LOCALBUS.
And the optical B code output module 4 and the electric B code output module 5 receive the B code test instruction sent by the CPU processing management module 3 and output a time message according to the IRIG-B code element definition. In order to improve the precision of the B code output time, the B code output module is realized by using a field programmable logic array FPGA, and a 25M constant temperature crystal oscillator is adopted, so that the B code output error can be ensured to be less than 1 us.
And the optical B code output module 4 receives a B code test instruction issued by the CPU processing management module 3, defines an output time message according to an IRIG-B code element by using a field programmable logic array FPGA, and sends the output time message to an optical B code timing interface of the tested relay protection device in an optical signal transmission mode.
And the electric B code output module 5 receives a B code test instruction issued by the CPU processing management module 3, defines an output time message according to an IRIG-B code element by using a field programmable logic array FPGA, and sends the output time message to an electric B code timing interface of the tested relay protection device in a high-low level transmission mode.
In the above process, the optical B code output module 4 and the electrical B code output module 5 receive a B code test instruction issued by the CPU processing management module 3 at the same time, and the optical B code output module 4 or the electrical B code output module 5 is used during the test, depending on which timing interface the tested relay protection device has. If the time correcting interface of the relay protection device to be detected is an optical B code time correcting interface, the optical B code output module 4 is used for correcting the time of the relay protection device to be detected; if the timing interface of the relay protection device to be tested is an electric B code timing interface, the electric B code output module 5 is used for timing the relay protection device to be tested.
After the tested relay protection device successfully corrects the time by using the method, the display interface of the relay protection device can prompt the success of time correction. The tested relay protection device transmits the time calibration success signal to the client 8 through a communication line by manufacturing a message standard mms message form. And the client 8 analyzes the channel data in the mms message according to the international electrotechnical commission IEC61850 standard to obtain a signal of successful timing.
For the B code test instruction, the second-skipping setting can cause the tested relay protection device to fast forward or skip back for 1s on the basis of the original travel time, according to the requirement of time synchronization management, the interface of the tested relay protection device can prompt the time correction abnormity, and the time correction abnormity signal is transmitted to the client 8 through a communication line in a mode of manufacturing a message standard mms message. The client 8 analyzes the channel data in the mms message according to the international electrotechnical commission IEC61850 standard to obtain a signal with abnormal timing. Similarly, according to the requirement of time synchronization management, an unreasonable leap second time instruction (generally agreed that the time of Beijing is 1 month, 1 day, 7 points 59, the time of Beijing is 7 month, 1 day, 7 points 59 is divided into reasonable leap second time, and if leap second occurs in the rest time, the leap second time is unreasonable) and a time quality invalid instruction can cause the interface of the relay protection device to be detected to prompt that the time correction is abnormal, and the leap second time instruction is transmitted to the client 8 through a communication line in a mode of manufacturing a message standard mms message.
For the network time protocol NTP time measurement instruction, after the client 8 starts the NTP time measurement service, a frame of NTP time measurement message is sent to the relay protection device to be tested. If the measured relay protection device does not succeed in NTP measurement, the NTP measurement message is not returned to the client 8, the client 8 waits for 20 seconds and does not receive the return message, and the client 8 displays the NTP measurement failure on the human-computer interface. If the tested relay protection device NTP time measurement succeeds, a frame NTP time measurement message is replied to the client 8, the message comprises the actual time (time 1) of the relay protection device and the time (time 2) of the time synchronization management tester, the client 8 reads the two times, the clock difference is calculated, and the clock difference is displayed in a human-computer interface. According to the requirement of time synchronization management, if the channel delay is set to 0 under the condition of successful timing, the clock difference is less than 3 milliseconds; if the channel delay is set other than 0, the clock difference should be less than (channel delay +3) milliseconds.
For the general object-oriented substation event GOOSE time measurement instruction, after the client 8 starts the GOOSE time measurement service, a frame of GOOSE time measurement message is sent to the relay protection device to be tested. If the GOOSE measurement of the relay protection device to be tested is unsuccessful, the GOOSE measurement message is not returned to the client 8, and the client 8 waits for 20 seconds and does not receive the return message, so that the man-machine interface of the client 8 displays the GOOSE measurement failure. If the GOOSE time measurement of the relay protection device to be tested is successful, a frame of GOOSE time measurement message is returned to the client 8, the message comprises the actual time (time 1) of the relay protection device and the time (time 2) of the time synchronization management tester, the client 8 reads the two times, calculates the clock difference, and displays the clock difference in a human-computer interface. According to the requirement of time synchronization management, if the channel delay is set to 0 under the condition of successful timing, the clock difference is less than 3 milliseconds; if the channel delay is set other than 0, the clock difference should be less than (channel delay +3) milliseconds.
For example: the client 8 simulates a clock source through a human-computer interface and issues a B code test instruction. For example, the time quality is set as the example, the time calibration of the relay protection device to be tested is successful according to the prior art, then the time quality setting of the client 8 is compared according to the prior art, the quality mark of the simulation B code time setting signal is invalid or inferior to the receiving threshold of the relay protection device to be tested, and the relay protection device to be tested should generate a time setting alarm signal and transmit the time setting alarm signal to the client 8; the time tick quality flag is changed to be valid, and the relay protection device to be tested should generate a time tick alarm return signal and transmit the time tick alarm return signal to the client 8. The quality bit set by the client 8 is 0-15, the default is 0, and the quality is optimal at the moment. As the number increases, the quality deviation increases.
For another example: the client 8 simulates station control layer equipment through a human-computer interface and issues a network time protocol NTP time measurement instruction. The instruction verifies whether the NTP time measurement of the relay protection device to be tested is correct or not by setting a network address and a network time protocol reference identifier. And successfully calibrating the time synchronization management tester used by the tested relay protection device, starting the NTP time measurement service, and ensuring that the time measurement state and the time measurement service response state of the tested relay protection device are normal. And the operator manually modifies the time of the tested relay protection device, the time is advanced or lagged by more than 5s than the original time, whether the clock difference value displayed by the client 8 is matched with the manually modified deviation value is checked, and whether the local time of the tested relay protection device is not modified by the client is checked. Sending an error time measurement request message to the tested relay protection device by using a client 8 human-computer interface, wherein the NTP reference identifier field is not 'time synchronization service state monitoring TSSM' or is empty, and the tested relay protection device does not respond to the request; and the NTP reference identifier field in the sent message is recovered to be time synchronization service state monitoring TSSM, and the tested relay protection device can recover and respond to the NTP request sent by the client.
The following steps are repeated: the client 8 simulates process layer equipment through a human-computer interface and issues a general object-oriented substation event GOOSE time measurement instruction. The client 8 can import the device configuration file SCD, select the related open-in and open-out control blocks for GOOSE time measurement of the substation event of the general object of the tested relay protection device, and then start a time measurement request. And (3) successfully calibrating the time synchronization management tester used by the tested relay protection device, and checking a clock error measurement result fed back to the client 8 by the tested relay protection device, wherein the clock error is less than 3 milliseconds.
As shown in fig. 4, the optical B-code output module 4 is connected to the CPU processing management module 3 through a 26-pin dual-row socket interface, and the optical B-code output module 4 is provided with 16 groups of output optical ports. When receiving the time output instruction of the CPU processing management module 3, the optical B code output module 4 converts the time output instruction into a corresponding optical timing signal, and outputs the optical timing signal to the relay protection device to be tested through the output optical port.
The electric B code output module 5 is connected with the CPU processing management module 3 through a 26-pin double-row socket interface and is provided with 1 group of output electric ports. When the electric B code output module 5 receives the time output instruction of the CPU processing management module 3, the time output instruction is converted into a corresponding electric timing signal, and the corresponding electric timing signal is output to the tested relay protection device through an output electric port.
The power module 6 is a direct current power module, can input a direct current 220V or 110V power supply, converts the direct current into a direct current 5V power supply, and is connected to the slot 7 of the bus board through a crimping terminal to provide working power for each module of the tester.
As shown in fig. 5, the tester is provided with a power supply plus interface, a power supply plus interface and a grounding interface, is connected with a direct current 110V or 220V power supply, and supplies power to each module of the tester after voltage conversion is performed through the power supply module 6 according to the prior art. The signal of the optical B code output module of the tester is sent out through a TX port, and the signal of the electric B code output module is output through electric B + and electric B-.
As shown in fig. 6, the CPU processing management module 3 outputs a time synchronization management signal, and transmits the time synchronization management signal to the optical B code output module 4 and the electrical B code output module 5 through the 26-pin double-row socket interface, so as to test the time synchronization management function of the relay protection device under test.
As shown in fig. 7, the bus board 7 has 4 slots, two of which are respectively connected to the CPU processing management module 3 and the power module 6, and two slots are reserved, so that the CPU processing management module 3 can be flexibly added, a time synchronization interface can be extended, 3 groups of CPU processing management modules 3 can be connected to the maximum, and 48 groups of optical timing signal outputs and 3 groups of electrical timing signal outputs can be extended.
The invention has the following advantages: 1. small, use in a flexible way, convenient to carry, length 258.9mm, wide 283.0mm, high 177.0mm, occupation space is little, can conveniently carry to each experimental place. 2. The method is simple to operate and easy to operate, the external client uses a matched system, and time synchronization management signals meeting the standard and standard requirements can be output through simple setting, so that time-related function tests can be quickly completed. 3. The cost is low, the module configuration is flexible, a bus structure is adopted, plug and play are realized, the modules can be flexibly configured according to specific requirements, and the cost is greatly reduced. 4. The time-correcting signal output interfaces are multiple, the time synchronization management function test of batch devices can be carried out simultaneously, the test efficiency is improved, 16 groups of optical time-correcting signal interfaces and 1 group of electric time-correcting signal interfaces are standardized, and the maximum expansion can be achieved to 48 groups of optical time-correcting signal interfaces and 3 groups of electric time-correcting signal interfaces.
Claims (8)
1. A time synchronization management tester for testing a relay protection device is provided with a rectangular case (1), and is characterized in that: a debugging interface (2) is arranged at the left upper part of a front panel in front of a case (1), a bus board (7) parallel to the front panel of the case (1) is arranged in the case (1), a supporting plate vertical to the bus board (7) is arranged behind the bus board (7), a CPU processing management module (3), an optical B code output module (4) and an electric B code output module (5) are installed on the supporting plate, a power module (6) board is arranged behind the bus board (7) and parallel to the supporting plate, and a client (8) is arranged outside the case (1); the client (8) is electrically connected with the debugging interface (2) through a communication line (9); the debugging interface (2) is electrically connected to the CPU processing management module (3) through a bus board (7), and the CPU processing management module (3) is electrically connected with the optical B code output module (4) and the electric B code output module (5) respectively; the power supply module (6) supplies power to the debugging interface (2), the CPU processing management module (3), the optical B code output module (4) and the electric B code output module (5) through the bus board (7);
the client (8) is provided with a human-computer interface for setting and modifying various timing parameters by operators, simulating normal or abnormal clock signals, converting the clock signals into data frames, namely B code test instruction messages, and then sending the B code test instruction messages to the debugging interface (2) through a communication line (9);
the debugging interface (2) transmits the instruction to the CPU processing management module (3) in real time according to a TCP/IP protocol;
the CPU processing management module (3) receives a B code test instruction sent by the client (8), obtains a time value after operation processing, and respectively sends the time value to the optical B code output module (4) or the electric B code output module (5); the test instruction is set by jumping second, leap second, time quality and channel delay;
the CPU processing management module (3) receives a B code test instruction which is a second skip setting instruction, reads a feature code and a message body in a data frame message, and according to a second skip setting mode in the message body, if the B code test instruction is a forward skip 1s, the CPU processing management module (3) fast forwards the current time by 1s and sends the modified time to the optical B code output module (4) or the electric B code output module (5); if the time is backward jump 1s, the CPU processing management module (3) backs the current self time by 1s and sends the modified time to the optical B code output module (4) and the electric B code output module (5).
2. The time synchronization management tester for testing the relay protection device according to claim 1, wherein: the CPU processing management module (3) receives the B code test instruction which is a leap second setting instruction, reads the feature code and the message body in the data frame message, and according to the leap second setting mode in the message body, if the leap second is positive, the CPU processing management module (3) can move the second counting time from 58 seconds of a certain normal minute to 59 seconds, and then move to 00 seconds and 01 seconds of the next minute; the modification is that 58 seconds of a certain minute is walked to 59 seconds, then 60 seconds are walked, and then the next minute is walked to 00 seconds and 01 seconds; the modified time is sent to an optical B code output module (4) or an electric B code output module (5); if the number of seconds is negative leap seconds, the CPU processing management module (3) will move the second counting time from 58 seconds of a certain normal minute to 59 seconds, and then to the next minute 00 seconds and 01 seconds; the modification is that 58 seconds in one minute directly go to the next 00 seconds and 01 seconds in one minute; and sending the obtained modified time to an optical B code output module (4) and an electric B code output module (5).
3. The time synchronization management tester for testing the relay protection device according to claim 1, wherein: the method comprises the steps that a B code test instruction received by a CPU processing management module (3) is a time quality setting instruction, the CPU processing management module (3) reads a feature code and a message body in a data frame message to obtain a time quality setting value, the value range is 0-15, and the time quality value is sent to an optical B code output module (4) and an electric B code output module (5).
4. The time synchronization management tester for testing the relay protection device according to claim 1, wherein: the method comprises the steps that a B code test instruction received by the CPU processing management module (3) is a channel delay setting instruction, the CPU processing management module (3) reads a feature code and a message body in a data frame message to obtain a channel delay value, the channel delay value range is 0-65535, and the channel delay value is directly issued to the optical B code output module (4) and the electric B code output module (5).
5. The time synchronization management tester for testing the relay protection device according to claim 1, wherein: and the optical B code output module (4) and the electric B code output module (5) receive the B code test instruction sent by the CPU processing management module (3) and output a time message according to the IRIG-B code element definition.
6. The time synchronization management tester for testing the relay protection device according to claim 1, wherein: and the optical B code output module (4) receives the time setting of the B code test instruction issued by the CPU processing management module (3), uses a field programmable logic array FPGA, defines an output time message according to an IRIG-B code element, and sends the output time message to an optical B code timing interface of the tested relay protection device in an optical signal transmission mode.
7. The time synchronization management tester for testing the relay protection device according to claim 1, wherein: the electric B code output module (5) receives the time setting of a B code test instruction issued by the CPU processing management module (3), uses a field programmable logic array FPGA, defines an output time message according to an IRIG-B code element, and sends the output time message to an electric B code timing interface of the tested relay protection device in a high-low level transmission mode.
8. The time synchronization management tester for testing the relay protection device according to claim 1, wherein: when the optical B code output module (4) and the electric B code output module (5) simultaneously receive a B code test instruction issued by the CPU processing management module (3), if the timing interface of the tested relay protection device is an optical B code timing interface, the optical B code output module (4) is used for timing the tested relay protection device; if the time correcting interface of the relay protection device to be detected is an electric B code time correcting interface, the electric B code output module (5) is used for correcting the time of the relay protection device to be detected.
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