CN111030479A - Active clamp flyback power converter and related control method - Google Patents

Abstract

An active-clamp flyback power converter comprising: and the active clamping circuit is connected with the main winding of the transformer in parallel. The active clamping circuit comprises an upper arm switch and a capacitor which are connected in series. The active-clamp flyback power converter also includes a lower arm switch connecting the main winding to a first power line. The control method comprises the following steps: a switch lower arm switch for generating N continuous switch periods, wherein N is an integer greater than 1, at least the Nth switch period is an improved flyback period, and the others are normal flyback periods; making each switching period not less than a shielding time, wherein the shielding time is generated according to the load of the active clamping flyback power converter; in each normal flyback period, the upper arm switch is fixedly maintained to be closed; and in each improved flyback period, after the shielding time, the upper arm switch is turned on to generate an upper arm turn-on time so that the lower arm switch performs zero-voltage switching.

Description

Active clamp flyback power converter and related control method

Technical Field

The present invention relates generally to active-clamp flyback power converters and related control methods, and more particularly to related art active-clamp flyback power converters that may have active clamp circuits without energy loss.

Background

Flyback power converters (flyback power converters) are widely used in power supplies of many electronic products, such as home appliances, computers, battery chargers, and so on. In order to improve the power conversion efficiency, an active-clamp (active-clamp) circuit is used to improve the energy loss of the snubber (snubber) of the conventional flyback power converter. A flyback power converter with an active clamp circuit is generally called an Active Clamp Flyback (ACF) power converter. Under heavy load conditions, the ACF power converter tends to perform well in terms of power conversion performance. However, under light load conditions, the ACF power converter tends to have high power loss due to circulating current (circulating current) in the main winding.

Texas instruments provide a flyback power converter controlled by a flyback controller of UCC 28780. UCC28780 can switch between four operating modes according to the load size, but it can be found from the specification (datasheet) of UCC28780 that in the system application circuit of UCC28780, a bleeder resistor (bleederresistor) is still required in the active clamp circuit to slowly discharge the electric energy stored in the capacitor in the active clamp circuit. Clearly, UCC28780 does not fully exploit the advantages of active clamp circuits. The active clamp circuit provided by texas instruments still has a loss of energy due to the presence of the bleeder resistor.

Furthermore, the conventional ACF power converter also suffers from electromagnetic interference (EMI) and/or noise (audible noise) problems in system design.

Disclosure of Invention

The control method is suitable for an active clamping flyback power converter. The active clamping flyback power converter comprises an active clamping circuit which is connected with a main winding of a transformer in parallel. The active clamping circuit comprises an upper arm switch and a capacitor which are connected in series. The active clamp flyback power converter further includes a lower arm switch connecting the main winding to a first power line. The control method comprises the following steps: switching a lower arm switch to generate N continuous switching periods, wherein N is an integer greater than 1, at least the Nth switching period is an improved flyback period, and the others are normal flyback periods; making each switching period not less than a shielding time, wherein the shielding time is generated according to a load of the active clamp flyback power converter; in each normal flyback period, the upper arm switch is fixedly maintained to be closed; and in each improved flyback period, after the shielding time, the upper arm switch is started to generate an upper arm starting time so as to enable the lower arm switch to carry out zero voltage switching.

The embodiment of the invention provides an active clamping flyback power converter, which comprises a lower arm switch, an upper arm switch and a control circuit. The lower arm switch connects a main winding of a transformer to a first power line. The upper arm switch is connected in series with a capacitor to form an active clamping circuit. The active clamping circuit is connected in parallel with the main winding. The control circuit is configured to control the upper arm switch and the lower arm switch according to a compensation signal and a current detection signal, so as to adjust an output voltage of the active-clamp flyback power converter. The control circuit is selectively operable in one of a plurality of operating modes. The operation modes include a flyback mode. When the control circuit operates in the flyback mode, the control circuit switches the lower arm switch to generate a plurality of switching cycles, including an improved flyback cycle and a normal flyback cycle. In each normal flyback period, the control circuit keeps the upper arm switch off. In each improved flyback period, the control circuit enables the upper arm to be opened after a shielding time, and an upper arm opening time is generated, so that the lower arm switch can carry out zero voltage switching. The control circuit generates the masking time according to a load of the active clamp flyback power converter.

Drawings

Fig. 1 shows an ACF power converter 10 implemented according to the present invention.

Fig. 2 shows an ACF mode and a flyback mode by way of example.

Fig. 3A is waveforms of some signals when the ACF power converter 10 operates in the ACF mode.

Fig. 3B is waveforms of some signals when the ACF power converter 10 operates in the flyback mode.

FIG. 4 is an enlarged view of the lower arm on time T in FIG. 3A_ON-LInternal current sense voltage V_CSThe waveform of (2).

FIG. 5A shows the switching frequency f of the embodiment of FIG. 1_CYCAnd a compensation voltage V_COMPThe relationship (2) of (c).

FIG. 5B shows the peak V of the embodiment of FIG. 1_CS-PEAKAnd a compensation voltage V_COMPThe relationship (2) of (c).

FIG. 5C shows the embodiment of FIG. 1, in steady state, with the output current I_OAnd a compensation voltage V_COMPAnd switching between ACF mode and flyback mode.

FIG. 6 shows several consecutive switching periods T of the ACF power converter 10 of FIG. 1 operating in the flyback mode_CYC。

Fig. 7 is a control method 60 used in the power supply controller 14.

Detailed Description

In the present specification, the same reference signs refer to the same or similar components having the same or similar structures, functions, and principles, and are derived by the teaching of the present specification. For the sake of brevity of the description, components having the same reference numerals will not be repeated.

Fig. 1 shows an ACF power converter 10 implemented according to the present invention. Bridge rectifier BD will exchange the commercial power V_ACRectified to provide input power line IN and input ground power line GNDI. Input voltage V_INOn the input power line IN. The transformer TF includes a primary winding LP, a secondary winding LS, and an auxiliary winding LA, which are inductively coupled to each other. The main winding LP, the lower arm switch LSS, and the current detection resistor RCS are connected IN series between the input power supply line IN and the input ground power supply line GNDI. The lower arm switch LSS and the current detection resistor RCS connect the main winding LP to the input ground power supply line GNDI. The current detection resistor RCS provides a current detection voltage V through the current detection pin CS_CSTo the power supply controller 14. Upper arm switch HSS and capacitorCACs are connected in series to form an active clamp circuit ACC. An active clamp ACC is connected in parallel with the main winding LP. When the lower arm switch LSS is turned on, the current detection voltage V_CSCan represent the winding current I flowing through the main winding LP_M。

The power controller 14, which may be an integrated circuit, controls the driver DVR through the pins HD and LD. The driver DVR may be another integrated circuit, providing the upper arm signal DRV_HSAnd lower arm signal DRV_LSThe upper arm switch HSS and the lower arm switch LSS are controlled separately. The upper arm switch HSS and the lower arm switch LSS may be high-voltage-tolerant GaN transistors or MOS transistors. In another embodiment, driver DVR, upper arm switch HSS, and lower arm switch LSS are all integrated in a packaged integrated circuit. The power controller 14 together with the driver DVR may be regarded as a control circuit providing an upper arm signal DRV_HSAnd lower arm signal DRV_LSThe upper arm switch HSS and the lower arm switch LSS are controlled separately.

The power supply controller 14 switches the winding current I through the upper arm switch HSS and the lower arm switch LSS_MThe change also causes the secondary winding LS on the secondary side to inductively induce an ac voltage/current. The ac voltage/current on the rectified secondary winding LS may provide an output power supply line OUT and an output ground power supply line GNDO. Output voltage V on output power line OUT_OUTCan be used to power a load 13, and the current flowing through the load 13 is the output current I_O. The load 13 is, for example, a rechargeable battery.

In order to regulate the output voltage V supplied to the load 13_OUTThe error amplifier EA, the optocoupler OPT, and the compensation capacitor CCOMP together provide negative feedback control to the power supply controller 14. Error amplifier EA at secondary side compares output voltage V_OUTAnd a target voltage V_REF-TARThe generation of the compensation voltage V across the compensation capacitor CCOMP is controlled by an optocoupler OPT providing DC isolation_COMP. For example, when the output voltage V is_OUTHigher than the target voltage V_REF-TARTime, compensation voltage V_COMPDown, ACF power converter 10 transfers to load 13Will be reduced with the goal of causing the output voltage V to be reduced_OUTIs maintained at about the target voltage V_REF-TARNearby.

The AC voltage/current on the primary side of the auxiliary winding LA is rectified to generate the operating power V_CCWhich is connected to a power pin VCC of the power controller 14 to substantially supply the operating power required by the power controller 14. Resistors RA and RB are connected in series to form a voltage divider circuit, which is connected in parallel with auxiliary winding LA. The junction between resistors RA and RB is connected to a feedback pin FB of the power controller 14, which has a feedback voltage V_FB。

A power supply controller 14 and a driver DVR for detecting the voltage V with current_CSCompensating voltage V_COMPAnd a feedback voltage V_FBAs input to generate an upper arm signal DRV_HSAnd lower arm signal DRV_LS。

In one embodiment, the power controller 14 selectively switches between two operating modes, although the invention is not limited in this respect. In another embodiment, power controller 14 may be selectively switched to three or more operating modes. Fig. 2 shows, by way of example, two modes of operation, hereinafter referred to as ACF mode and flyback (flyback) mode. Generally speaking, the ACF mode is suitable for the load 13 being heavy load or medium load, and the flyback mode is suitable for the load 13 being medium load or light load.

As shown in fig. 2, when operating in the ACF mode, the power controller 14: 1) make the upper arm signal DRV_HSAnd lower arm signal DRV_LSApproximately complementary, and zero-voltage switching (ZVS) is performed; 2) approximately fixed switching frequency f_CYCBut with a jitter frequency (jitter); and, 3) according to the compensation voltage V_COMPModulation peak value V_CS-PEAK. Peak value V_CS-PEAKRepresentative current sense voltage V_CSAs will be explained in detail later. When operating in ACF mode, the power controller 14 checks the voltage V detected according to the current_CSDefined positive current time T_ON-PAnd a negative current time T_ON-NWhether to conform to a predetermined relationship to determine whether to disengageAnd an ACF mode, and entering a flyback mode. Positive current time T_ON-PAnd a negative current time T_ON-NIndicates the current detection voltage V when the lower arm switch LSS is turned on_CSPositive and negative times, respectively.

When operating in ACF mode, compared with the compensation voltage V_COMPFrom a positive current time T_ON-PAnd a negative current time T_ON-N-The predetermined relationship formed is more representative of the state of the load 13.

When operating in flyback mode, the power controller 14: 1) substantially maintaining the upper arm switch HSS closed; 2) fixed peak value V_CS-PEAK(ii) a And, 3) according to the compensation voltage V_COMPModulating the switching frequency f_CYCAnd adding a dither frequency. At the same time, the power supply controller 14 checks whether or not the voltage V is compensated_COMPWhether or not it is greater than the reference voltage V_COMP-REFAnd judging whether the device is separated from the flyback mode or not and entering the ACF mode.

Please refer to fig. 2 and fig. 3A simultaneously. Fig. 3A is waveforms of some signals when the ACF power converter 10 operates in the ACF mode. From top to bottom, the waveforms in FIG. 3A are the self-generated clock signal CLK and the upper arm signal DRV, respectively, within the power controller 14_HSLower arm signal DRV_LSCurrent detection voltage V_CSA switching voltage V at a connection point between the upper arm switch HSS and the lower arm switch LSS_SWWinding voltage V on auxiliary winding LA_AUX。

The power controller 14 has a frequency generator (not shown) for providing a clock signal CLK defining a switching period T_CYC. The frequency of the clock signal CLK, i.e. the switching period T_CYCIs approximately equal to the lower arm signal DRV_LSSwitching frequency f_CYC。

When operating in ACF mode, the switching frequency f_CYCApproximately a fixed frequency, and may also be added with a dithering frequency. The fixed frequency is independent of the compensation voltage V_COMP. For example, when operating in ACF mode, the switching frequency f_CYCWith 200kHz as a central frequency, the ACF mode can be reduced by periodically dithering to 190kHz and 210kHz and 400HzThe problem of EMI in time.

When the ACF power converter 10 operates in the ACF mode, the power controller 14 causes the upper arm signal DRV_HSAnd lower arm signal DRV_LSSubstantially complementary (complementary) as the upper arm signal DRV in FIG. 3A_HSAnd lower arm signal DRV_LSAs indicated. So the ACF pattern can also be said to be a complementary pattern. When upper arm signal DRV_HSAfter the transition from logical "1" to "0", a blank time (dead time) TD elapses_FRear, lower arm signal DRV_LSIt complementarily transitions from a logical "0" to a "1". While the lower arm signal DRV_LSAfter the transition from logical "1" to "0", a blank time (dead time) TD elapses_RRear, upper arm signal DRV_HSIt complementarily transitions from a logical "0" to a "1".

Blank time TD_RAnd TD_FThe short-circuit switching is possible, and the short-circuit through phenomenon caused by simultaneous on-conduction of the upper arm switch HSS and the lower arm switch LSS is avoided, and zero-voltage switching (ZVS) is also performed between the upper arm switch HSS and the lower arm switch LSS. Overall, despite the blank time TD_RAnd TD_FUpper arm signal DRV_HSAnd lower arm signal DRV_LSOr may be considered complementary. For example, the lower arm signal DRV_LSAfter a transition from a logical "1" to a "0", the winding voltage V_AUXWill start to follow the negative voltage V_NBegins to rise rapidly toward a positive voltage V_PApproach and switch the voltage V_SWRapidly rising from 0V to a voltage V_CPAs shown in fig. 3A. Voltage V_CPThe voltage at the junction of the upper arm switch HSS and the capacitor CAC. The power supply controller 14 feeds back the voltage V_FBTo detect the winding voltage V_AUX. Once the winding voltage V is found_AUXNear reaching positive voltage V_PThat means that the switching voltage V is_SWIs also nearly equal to the voltage V_CPTherefore, the power controller 14 makes the upper arm signal DRV_HSThe logical "0" is changed to "1", and the upper arm switch HSS is caused to perform ZVS. Similarly, when the upper arm signal DRV_HSAfter transitioning from a logical "1" to a "0", power controller 14 may detect winding voltage V_AUXTo identify the switching voltage V_SWWhether it falls to about 0V and at a switching voltage V_SWAbout 0V, lower arm signal DRV is set_LSThe logical "0" is changed to "1", and the lower arm switch LSS is caused to perform ZVS.

Lower arm on time T_ON-LIs the lower arm signal DRV_LSA period when it is logically "1", that is, a period when the lower arm switch LSS is on; on the contrary, upper arm on time T_ON-HFor upper arm signal DRV_HSA period when it is logically "1", that is, a period when the upper arm switch HSS is on.

Fig. 3A also shows how the power supply controller 14 modulates the peak value V_CS-PEAK. In FIG. 3A, the compensation voltage V is reduced_COMP-SCApproximately linear dependence on the compensation voltage V_COMP. For example, V_COMP-SC＝K*V_COMPWhere K is a constant between 0 and 1. The compensation voltage V can be cut by a voltage dividing resistor circuit_COMPTo generate a reduced compensation voltage V_COMP-SC. Reducing the compensation voltage V_COMP-SCCan be used to control the peak value V_CS-PEAK. For example, at the lower arm opening time T_ON-LTime, current detection voltage V_CSRising over time. When the power supply controller 14 finds the current detection voltage V_CSExceeding the reduced compensation voltage V_COMP-SCAt this time, the power controller 14 ends the lower arm on time T_ON-LAnd passing a blank time TD_RThen, the upper arm on time T is started_ON-H. Therefore, in the blank time TD_RInternal, current detection voltage V_CSBecomes 0V, resulting in a peak V_CS-PEAKWhich is approximately equal to the reduction compensation voltage V_COMP-SCAs shown in fig. 3A. Therefore, the power controller 14 depends on the compensation voltage V_COMPTo modulate the peak value V_CS-PEAK. The compensation voltage V is reduced in the switching period on the right side of FIG. 3A compared to the switching period on the left side of FIG. 3A_COMP-SCIncreased, so peak value V_CS-PEAKIs also increased. In other words, the power supplyThe controller 14 makes the peak value V_CS-PEAKApproximately linearly related to the compensation voltage V_COMP。

In FIG. 3A, one switching period T_CYCSequentially from the blank time TD_FLower arm on time T_ON-LBlank time TD_RAnd upper arm on time T_ON-HThereby forming the structure. One pulse of the clock signal CLK ends the upper arm on time T_ON-HStarting blank time TD_F. Switching voltage V_SWAbout 0V, blank time TD_FEnd, lower arm on time T_ON-LAnd starting. When the current detects the voltage V_CSExceeding the reduced compensation voltage V_COMP-SCTime, lower arm on time T_ON-LEnd, blank time TD_RAnd starting. When switching voltage V_SWAbout voltage V_CPTime, blank time TD_REnd, upper arm on time T_ON-HAnd starting. The next pulse of the clock signal CLK ends the upper arm on-time T_ON-HAlso over a switching period T_CYC。

The ACF mode is also a Continuous Conduction Mode (CCM) because of the winding current I flowing through the main winding LP_MChanges are all the time and does not stop at 0A.

Please refer to fig. 2 and fig. 3B simultaneously. Fig. 3B is waveforms of some signals when the ACF power converter 10 operates in the flyback mode. From top to bottom, the waveforms in FIG. 3B are the frequency signal CLK, the upper arm signal DRV, respectively_HSLower arm signal DRV_LSCurrent detection voltage V_CSA switching voltage V_SWAnd a winding voltage V_AUX。

As shown in fig. 3B, when operating in the flyback mode, the upper arm signal DRV is literally represented_HSSubstantially maintained at logic "0", the upper arm switch HSS is turned off, and only the lower arm signal DRV_LSTo switch the lower arm switch LSS. The flyback mode is a non-complementary mode because the upper arm signal DRV_HSAnd lower arm signal DRV_LSAnd are not complementary.

In FIG. 3B, a pulse of the clock signal CLK starts a switchPeriod T_CYCAlso, the lower arm on time T is started_ON-L. When the current detects the voltage V_CSExceeding a fixed reference voltage V_CS-REFTime, lower arm on time T_ON-LEnd, demagnetize time T_DMGAnd starting. Reference voltage V_CS-REFIndependent of the compensation voltage V_COMP. At demagnetizing time T_DMGIn the secondary winding LS, the energy is released to establish the output voltage V_OUT. When the secondary side winding LS releases energy, the demagnetization time T is finished_DMGEnd, oscillation time T_OSCAt the beginning, the switching voltage V_SWOscillation starts as shown in fig. 3B. Thereafter, the next pulse of the frequency signal CLK ends the oscillation time T_OSCAlso ending a switching period T_CYC. As shown in FIG. 3B, when operating in the flyback mode, a switching period T is set_CYCIs determined by the lower arm on-time T_ON-LDemagnetization time T_DMGAnd oscillation time T_OSCThereby forming the structure.

As shown in FIG. 3B, when operating in flyback mode, the peak value V_CS-PEAKNot with reduction of the compensation voltage V_COMP-SCOr a compensation voltage V_COMPVaries to maintain a constant reference voltage V_CS-REF. Thus, peak value V_CS-PEAKIndependent of the compensation voltage V_COMP。

When operating in the flyback mode, the frequency generator generating the clock signal CLK is subject to the compensation voltage V_COMPAnd (4) controlling. In the switching period on the right side of FIG. 3B, the compensation voltage V is reduced compared to the switching period on the left side of FIG. 3B_COMP-SCReduce, cause the switching period T_CYCIs increased.

When operating in the flyback mode, a jitter frequency may also be added to reduce the EMI problem. For example, when operating in flyback mode, the switching frequency f_CYCPeriodically varying between an upper limit frequency and a lower limit frequency with an average frequency as a center, wherein the average frequency is the compensation voltage V_COMPAs a function of (c).

Although fig. 3B shows the upper arm switch HSS fixed in the off state, the present invention is not limited thereto.In another embodiment, the upper arm switch HSS is not on for the lower arm on time T when operating in the flyback mode_ON-LAnd demagnetization time T_DMGIs in an on state, but may be in an oscillation time T_OSCAnd is briefly turned on to discharge the energy stored in the capacitor CAC by the leakage inductance of the main winding LP.

The flyback mode is also a Discontinuous Conduction Mode (DCM) because of the winding current I flowing through the main winding LP_MThere is a period of time to stop at 0A.

When operating in flyback mode, if the power supply controller 14 finds the compensation voltage V_COMPGreater than a reference voltage V_COMP-REFThe power controller 14 may leave the flyback mode and enter the ACF mode.

FIG. 4 is an enlarged view of the lower arm on time T in FIG. 3A_ON-LInternal current sense voltage V_CSThe waveform of (2). When operating in ACF mode, the lower arm is turned on for a time T_ON-LAt the beginning, the winding current I of the main winding LP_MMay be negative and thus result in a current sense voltage V_CSInitially negative. At lower arm on time T_ON-LBecause of the input voltage V_INMagnetizing main winding and current detecting voltage V_CS-Linearly increasing with time until the current detection voltage V_CS-Exceeding the reduced compensation voltage V_COMP-SCThen (c) is performed. As shown in fig. 4, when the current detects the voltage V_CSA period of time which is negative, called negative current time T_ON-N(ii) a When the current detects the voltage V_CSA period of positive, called positive current time T_ON-P. Only positive current time T_ON-PGreater than negative current time T_ON-NOnly for the ACF power converter 10 to output the voltage V_OUTProviding electrical energy. In other words, when the current is positive for a time T_ON-PVery close to the negative current time T_ON-NAt this time, the representative load 13 may not be in a heavy load state, and may be in a medium load state or a light load state.

FIG. 4 also shows that, when operating in ACF mode, the compensation voltage V_COMPOr reducing the compensation voltage V_COMP-SCAnd do not represent the state of the load 13State due to a negative current time T_ON-NIs present. Therefore, compared with the reference compensation voltage V_COMPTo leave ACF mode according to the positive current time T_ON-PAnd a negative current time T_ON-NIt is a better choice to decide whether to leave the ACF mode.

As illustrated in FIG. 2, in one embodiment, power controller 14 checks for a positive current time T_ON-PAnd a negative current time T_ON-NWhether the ACF mode is separated from the ACF mode or not is judged according to a preset relation, and the flyback mode is entered. For example, when T is_ON-P<T_ON-N+K_TAt this time, the power controller 14 may leave the ACF mode and enter the flyback mode, where K is_TIs a fixed value. This predetermined relationship is not limited to comparing positive current times T_ON-PAnd a negative current time T_ON-NIn another embodiment, power controller 14 checks the energy-absorbing duty cycle D_ON-PWhether or not it is less than a value, wherein the energy-absorbing duty cycle D_ON-PIs defined as T_ON-P/(T_ON-P+T_ON-N). Working period D when absorbing energy_ON-PWhen the value is less than the fixed value, the power controller 14 may leave the ACF mode and enter the flyback mode.

In one embodiment, when the current is positive for a time T_ON-PAnd a negative current time T_ON-NWhen the predetermined relationship is met, the power controller 14 immediately leaves the ACF mode and enters the flyback mode, but the invention is not limited thereto. In another embodiment, the power controller 14 is only disengaged from the ACF mode and enters the flyback mode when the predetermined relationship is met for a predetermined period of time, such as 1 ms. Such a method of delaying the removal of the ACF mode for a predetermined time may be advantageous in a load transient response (load transient response) test. Assuming that the predetermined time is 1ms, and under the load transient response test, the light-heavy load switching period of the load 13 is less than 1ms, which means that the load 13 is out of the heavy load state for no more than 1ms, and then returns to the heavy load state. Under such a load transient response test, the power controller 14 will always operate in the ACF mode and will not enter the flyback mode. Thus, the ACF power converter 10 enjoys a faster response speed and a better comparisonA stable output voltage.

FIG. 5A shows the switching frequency f of the embodiment of FIG. 1_CYCAnd a compensation voltage V_COMPThe relationship (2) of (c). When operating in ACF mode, the switching frequency f_CYCAnd a compensation voltage V_COMPIn line Cf_CYC-ACFRepresents; when operating in flyback mode, the line Cf is used_CYC-FLYAnd (4) showing. Line Cf_CYC-ACFDisplay, when operating in ACF mode, the switching frequency f_CYCIs of a fixed value f_HIndependent of the compensation voltage V_COM. Line Cf_CYC-FLYAt a compensation voltage V_COMPBetween 4.3V and 0.7V, it shows the switching frequency f when operating in the flyback mode_CYCAnd a compensation voltage V_COMPThere is a positive linear relationship; switching frequency f_CYCWith compensation voltage V_COMPIncreases linearly. When the embodiment of fig. 1 has a frequency dithering function, the line Cf_CYC-ACFAnd Cf_CYC-FLYThe switching frequency f is shown in ACF mode and flyback mode respectively_CYCAverage frequency at the jitter frequency.

FIG. 5A also shows when the compensation voltage V is applied_COMPBelow 0.5V, the power controller 14 can operate in burst mode (burst mode), whether it was previously operating in ACF mode or flyback mode. The burst mode can save switching loss and improve the electric energy conversion efficiency in a light load or no load state. When outputting current I_OVery low but greater than 0A, so that the compensation voltage V_COMPWhen the voltage is lower than 0.5V, the power controller 14 turns off the upper arm switch HSS and the lower arm switch LSS to make the switching frequency f_CYCAt 0, the power conversion is stopped. However, since the current I is outputted_OGreater than 0A, no conversion of electrical energy will result, eventually, in a compensation voltage V_COMPRising over time. Once the power supply controller 14 finds the compensation voltage V_COMPBeyond 0.7V, the power controller 14 returns to operating in either ACF or flyback mode, and power conversion begins. If the output current I_OStill low, the power supplied to the load 13 by the ACF power converter 10 is greater than the power consumed by the load 13, and the compensation voltage V is set after a certain period of time_COMPIt will again go below 0.5V, causing the power conversion to stop. Thus, the switching frequency f_CYCThe pulse is cyclically not 0Hz for a period of time, and 0Hz for another period of time, which is called a burst mode.

FIG. 5B shows the peak V of the embodiment of FIG. 1_CS-PEAKAnd a compensation voltage V_COMPThe relationship (2) of (c). When operating in ACF mode, peak value V_CS-PEAKAnd a compensation voltage V_COMPIn line CV_CS-P-ACFRepresents; when operating in flyback mode, the line CV is used_CS-P-FLYAnd (4) showing. Line CV_CS-P-ACFShows the peak value V when operating in ACF mode_CS-PEAKAnd a compensation voltage V_COMPThere is a positive linear relationship; peak value V_CS-PEAKWith compensation voltage V_COMPAnd increased by an increase. Line CV_CS-P-FLYIt shows the peak value V when operating in flyback mode_CS-PEAKIs a fixed reference voltage V_CS-REFIndependent of the compensation voltage V_COMP。

FIG. 5C shows the embodiment of FIG. 1, in steady state, with the output current I_OAnd a compensation voltage V_COMPAnd switching between ACF mode and flyback mode. When operating in ACF mode, the current I is output_OAnd a compensation voltage V_COMPIs expressed as a line CI_O-ACFRepresents; when operating in flyback mode, the line CI is set to_O-FLYAnd (4) showing. Assume that the initial state of the ACF power converter 10 is the output current I_OLess than the reference current I_O-2Referring to fig. 5C, the power controller 14 initially operates in the flyback mode. Output current I_OWill make the compensation voltage V_COMPAccording to line CI_O-FLYAnd follows the change. After that, assume the output current I_OGradually increasing. When outputting current I_OExceeding the reference current I_O-1At this time, the power supply controller 14 finds the compensation voltage V_COMPGreater than a reference voltage V_COMP-REF. Therefore, the power controller 14 leaves the flyback mode, enters the ACF mode, and compensates the voltage V_COMPA jump-up occurs as shown in fig. 5C. Then, the current I is output_OWill make the compensation voltage V_COMPAccording to line CI_O-ACFAnd follows the change. Then, when the current I is output_OReduced to a reference current I_O-2The power supply controller 14 finds a positive current time T_ON-PAnd a negative current time T_ON-NHas met the predetermined relationship of being out of ACF mode, thus being out of ACF mode, entering flyback mode, compensating voltage V_COMPA jump reduction occurs.

FIG. 6 shows several consecutive switching periods T of the ACF power converter 10 of FIG. 1 operating in the flyback mode_CYC. In fig. 6, the ACF power converter 10 has a lower arm signal DRV_LSA lower switch arm switch LSS for continuously and periodically generating N continuous switching periods T_CYCWhere N is an integer greater than 1, for example, N may be 8.

From top to bottom, the waveforms in FIG. 6 are the clock signal CLK and the upper arm signal DRV, respectively_HSLower arm signal DRV_LSCurrent detection voltage V_CSA switching voltage V_SWA mask signal S_BLANAnd counting the CNTs.

Masking signal S_BLANGenerated internally by the power controller 14 to provide a masking time T_BLAN(blankinggtime). In each switching period T_CYCIn at least the masking time T_BLANAfter the lapse of the next switching period T_CYCCan be started. Thus, each switching period T_CYCNot less than the masking time T_BLAN. Masking time T_BLANMay be generated in dependence on the load 13. In an embodiment, the masking time T_BLANAccording to the compensation voltage V_COMPIs generated while masking the frequency f_BLAN(＝1/T_BLAN) And a compensation voltage V_COMPThe relationship (c) can be roughly represented by the line Cf of FIG. 5A_CYC-FLYAnd (4) showing.

The power controller 14 is provided with a counter (not shown) having a count CNT for counting the switching periods T_CYC. FIG. 6 shows that when the count CNT indicates N switching periods T_CYCAfter this occurs, the count CNT is reset to 1 and is counted again.

FIG. 7 shows a control method used in the power supply controller 14Method 60. When the count CNT is 1 to N-1, it indicates that the current is the 1 st to N-1 st switching period T_CYCThe check in step 62 to see if the count CNT is N will be negative and the control method 60 will proceed from step 62 to the steps in the normal flyback cycle. Thus, the 1 st to N-1 st switching periods T_CYCConsidered as a normal flyback period. When the count CNT is N, it indicates that the current is the Nth switching period T_CYCThe result of the check in step 62 will be positive and the control method 60 proceeds from step 62 to a step in the modified flyback cycle. Thus, the Nth switching period T_CYCIs considered as an improved flyback period.

In other words, the switching period T of FIG. 6 is from 1 to N-1 for the count CNT_CYCAll are normal flyback periods; switching period T for counting CNT to N_CYCThe improved flyback period is used. At the end of the modified flyback period, the count CNT is reset to 1 and the count is re-incremented. FIG. 6 shows every N consecutive switching periods T_CYCIn the middle, there is an improved flyback period, and the others are normal flyback periods. The invention is not so limited. In another embodiment, every N consecutive switching periods T_CYCIn the middle, there are several continuous improved flyback periods, and the others are normal flyback periods.

Taking fig. 6 as an example, one of the main differences between the normal flyback period and the modified flyback period is the upper arm signal DRV_HSThe waveform of (2). During a normal flyback period, the upper arm signal DRV_HSThe fixed state is logically "0", and the upper arm switch HSS is kept in the off state. Differently, the upper arm signal DRV in the improved flyback period_HSMost of the time is at logic "0", but only near the end of the modified flyback period is logic "1" for a short time, and the upper arm switch HSS is turned on for a short time. Therefore, in the improved flyback period, the switching period T_CYCIncluding upper arm on time T_ON-HLike the Nth switching period T of FIG. 6_CYCShown.

In each normal flyback period, since the upper arm switch HSS is always kept in the off state, the leakage inductance of the main winding is in each lower armOpening time T_ON-LThe generated magnetic energy is converted into electric energy, which is accumulated on capacitor CAC, so that voltage V is obtained_CPAnd (4) increasing. In each improved flyback period, the upper arm switch HSS is turned on briefly, so that the energy accumulated in the capacitor CAC can be released and converted to the output voltage V_OUTAnd the conversion efficiency is improved. Furthermore, the voltage V can be reduced_CPAnd the voltage that the lower arm switch LSS must withstand when turned off, so as to prevent the lower arm switch LSS from being damaged due to an excessive voltage stress.

Therefore, in the embodiment of the invention, the active clamping circuit does not need a bleeder resistor, thereby not only increasing the conversion efficiency, but also reducing the production cost. As exemplified by the ACF power converter 10 of fig. 1, the active clamp ACC has no energy loss when the upper arm switch HSS is turned off, and is an energy-lossless active clamp.

Referring to fig. 7, in each normal flyback period, step 64a is to lower the leg signal DRV_LSTurn on the lower arm switch LSS to generate the lower arm turn-on time T_ON-LAnd approximately fixes the peak value V_CS-PEAK. With the 1 st switching period T in FIG. 6_CYCFor example. 1 st switching period T_CYCMost of the signal waveforms can be found with reference to fig. 3B and the related explanation, which are not repeated. Like the 1 st switching period T in FIG. 6_CYCBy way of example, the masking time T_BLANAnd lower arm on time T_ON-LStarting all together. Masking time T_BLANCan be adjusted with the load 13. In the 1 st switching period T_CYCMiddle, shielding time T_BLANCovers the lower arm opening time T_ON-LDemagnetization time T_DMGAnd part of the oscillation time T_OSC. 1 st switching period T_CYCOscillation time T of_OSCInternal and external switch voltage V_SWOscillating to generate wave peak PK₁、PK₂And trough VY₁、VY₂、VY₃。

Step 66a of FIG. 7 waits for a mask time T_BLANIn the past. The 1 st switching period T in FIG. 6_CYCMiddle, shielding time T_BLANApproximately ends at peak PK₂After the occurrence.

Step 68 of fig. 7 continues with step 66a and detects and waits for a valley to occur. When a trough is found to occur in step 68, this normal flyback period ends and the count CNT is incremented by 1 in step 70. The 1 st switching period T of FIG. 6_CYCAt a time point t_DETDetecting a trough VY₃Thus, the frequency signal CLK ends the 1 st switching period T_CYC. At a point in time t_DETCount CNT is increased by 1, 2 nd switching period T_CYCAnd starting.

Referring to fig. 7, steps 64b and 66b in each modified flyback cycle are the same as steps 64a and 66a in the normal flyback cycle, and it can be understood from the previous description and will not be repeated. Nth switching period T in FIG. 6_CYCIs an improved flyback period in which the blanking time T is_BLANCovers the lower arm opening time T_ON-LDemagnetization time T_DMGAnd part of the oscillation time T_OSC. The Nth switching period T_CYCOscillation time T of_OSCInternal and external switch voltage V_SWOscillating to generate wave peak PK₁、PK₂、PK₃And trough VY₁、VY₂、VY₃。

Step 72 of fig. 7 continues with step 66b by detecting and waiting for a peak to occur. When a peak is found in step 72, step 74 is followed by turning on the upper arm switch HSS for the upper arm on time T_ON-H. Like the Nth switching period T of FIG. 6_CYCShown in (1), peak PK₃For masking time T_BLANFollowed by the first occurring peak. So upper arm on time T_ON-HBeginning at peak PK₃When present. On the upper arm for a time T_ON-HVoltage V at the junction of upper arm switch HSS and capacitor CAC_CPWill be dropped by the discharge.

In some embodiments, the upper arm on time T in each modified flyback period_ON-HAll occur only once and at the masking time T_BLANAfter finishing, as illustrated in fig. 6.

In some embodiments, eachUpper arm on time T in improved flyback period_ON-HAgain, a predetermined length of time, but the invention is not limited thereto. In some embodiments, the upper arm on time T_ON-HIs formed by the voltage V at the junction of the upper arm switch HSS and the capacitor CAC_CPDetermined while the voltage V_CPCan be controlled by winding voltage V_AUXInduced, and winding voltage V_AUXCan be detected by the power controller 14 through the feedback pin FB. For example, at arm-on time T_ON-HIn the power supply controller 14, the voltage V is detected by the feedback pin FB_CP. When the power supply controller 14 finds the voltage V_CPThe power controller 14 ends the upper arm on time T in an improved flyback period when the upper arm on time T is lower than a reference value_ON-H。

Continuing the upper arm opening time T of step 74_ON-HAfter this is done, step 76 of FIG. 7 waits for a blank time T_DFAnd at a switching voltage V_SWAbout 0V, lower arm signal DRV is set_LSThe logic "0" is changed to "1", that is, the lower arm switch LSS is ZVS. Step 78 ends the nth switching cycle T_CYCResetting the count CNT to 1 for the next switching period T_CYCAnd starting.

As can be seen from the examples in fig. 6 and 7, when the ACF power converter 10 operates in the flyback mode, the ACF power converter 10 can be regarded as a quasi-resonant power converter (quasi-resonant power converter) because the valley switching is shown when the normal flyback period and the modified flyback period both end at a valley. Valley switching may reduce switching losses, but the invention is not limited thereto. When the ACF power converter 10 operates in the flyback mode, the ACF power converter 10 does not necessarily have to perform valley switching. For example, in some embodiments, step 68 in fig. 7 may be omitted. I.e., in some embodiments during the normal flyback period, approximately when the blanking time T is_BLANUpon completion, the next switching cycle is started.

Although fig. 6 and 7 illustrate an improved flyback period, the upper arm on time T_ON-HBeginning at peak PK₃At the time of occurrenceHowever, the present invention is not limited thereto. In other embodiments, step 72 of FIG. 7 may be modified or omitted. In some embodiments, step 72 of FIG. 7 is modified to detect the presence of a wait-for-one-valley, i.e., upper arm on time T_ON-HStarting at the masking time T_BLANThe first trough after completion. In some embodiments, step 72 in FIG. 7 is omitted, i.e., upper arm on time T_ON-HImmediately following the masking time T_BLANAnd (5) after finishing.

Although N is a fixed integer in the foregoing description, the present invention is not limited thereto. In one embodiment, N may be adaptively changed. For example, the upper arm on time T of the Nth switching cycle in FIG. 6_ON-HShortly before the end, the power supply controller 14 may detect the winding voltage V of the auxiliary winding LA via the feedback pin FB_AUXThe voltage V at the connection point of the upper arm switch HSS and the capacitor CAC is detected equivalently_CP. When the voltage V is_CPIf the number of N is greater than a predetermined reasonable range, N may be too many, so that N is decreased by 1 at the end of the nth switching period, and the frequency of occurrence of the improved flyback period is relatively increased; in contrast, when the voltage V is_CPLess than that default reasonable range, N may be increased by 1, equivalently increasing the frequency of occurrence of normal switching cycles.

The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the claims of the present invention should be covered by the present invention.

List of reference numerals

10 ACF power converter

13 load

14 power supply controller

60 control method

62. 62, 64a, 64b, 66a, 66b, 70, 72, 74, 76, 78 steps

ACC active clamp circuit

BD bridge rectifier

CAC capacitor

CCOMP compensation capacitor

CI_O-ACF、CI_O-FLY、CV_CS-P-ACF、CV_CS-P-FLY、Cf_CYC-ACF、Cf_CYC-FLYLine strip

CLK frequency signal

CNT counting

CS current detection pin

DVR driver

DRV_HSUpper arm signal

DRV_LSLower arm signal

EA error amplifier

f_CYCSwitching frequency

f_HFixed value

FB feedback pin

GNDI input ground power supply line

GNDO output ground power supply line

HD. LD pin

HSS upper arm switch

I_MCurrent of winding

IN input power line

I_OOutput current

I_O-1、I_O-2Reference current

LA auxiliary winding

LP main winding

LS secondary side winding

LSS lower arm switch

OPT optical coupler

OUT output power line

PK₁、PK₂、PK₃Wave crest

RA, RB resistance

RCS current detection resistor

S_BLANMasking signals

t_DETPoint in time

T_BLANTime of shade

T_CYCPeriod of switching

TD_F、TD_RBlank time

TF transformer

T_DMGTime of demagnetization

T_ON-HUpper arm on time

T_ON-LLower arm opening time

T_ON-NNegative current time

T_ON-PPositive current time

T_OSCTime of oscillation

V_ACAC commercial power

V_AUXVoltage of winding

V_CCOperating power supply

V_COMPCompensating voltage

V_COMP-REFReference voltage

V_COMP-SCReducing compensation voltage

V_CPVoltage of

V_CSCurrent detection voltage

V_CS-PEAKPeak value

V_CS-REFReference voltage

VCC power supply pin

V_FBFeedback voltage

V_INInput voltage

V_OUTOutput voltage

V_PPositive voltage

V_REF-TARTarget voltage

V_SWSwitching voltage

VY₁、VY₂、VY₃Trough of wave

Claims (10)

1. A control method for an active-clamp flyback power converter, the active-clamp flyback power converter comprising an active clamp circuit connected in parallel with a primary winding of a transformer, the active clamp circuit comprising an upper arm switch and a capacitor connected in series, the active-clamp flyback power converter further comprising a lower arm switch connecting the primary winding to a first power line, the control method comprising:

a switch lower arm switch for generating N continuous switch periods, wherein N is an integer greater than 1, at least the Nth switch period is an improved flyback period, and the others are normal flyback periods;

making each switching period not less than a shading time, wherein the shading time is generated according to the load of the active clamping flyback power converter;

in each normal flyback period, the upper arm switch is fixedly maintained to be closed; and

in each improved flyback period, after the shielding time, the upper arm switch is turned on to generate an upper arm turn-on time, so that the lower arm switch performs zero-voltage switching.

2. The control method of claim 1, wherein the switching voltage of the lower arm switch starts oscillating after the demagnetization time to generate at least one peak and one valley, the control method comprising:

in each improved flyback period, waiting for the peak to appear; and

when the peak appears, the upper arm turn-on time is started.

3. The control method of claim 1, wherein the switching voltage of the lower arm switch starts oscillating after the demagnetization time to generate at least one peak and one valley, the control method comprising:

in each improved flyback period, waiting for the wave trough to appear; and

when the wave trough appears, the upper arm opening time is started.

4. The control method of claim 1, wherein only the nth switching cycle of the N switching cycles is a modified flyback cycle, and the others are normal flyback cycles.

5. The control method according to claim 1, comprising:

the lower arm switch is switched to continuously generate the N continuous switching cycles.

6. The control method according to claim 5, wherein N is a fixed integer.

7. The control method according to claim 5, comprising:

providing a counter for counting the successive switching cycles; and

the count is reset when there is N for the successive switching cycles.

8. The control method of claim 5, wherein the transformer includes an auxiliary winding, the control method comprising:

changing N according to the winding voltage of the auxiliary winding during the upper arm on time.

9. The control method according to claim 1, comprising:

in each improved flyback period, the upper arm opening time is generated only after the shielding time.

10. An active-clamp flyback power converter, comprising:

a lower arm switch for connecting the main winding of the transformer to a first power line;

an upper arm switch connected in series with a capacitor to form an active clamping circuit, wherein the active clamping circuit is connected in parallel with the main winding; and

a control circuit configured to control the upper arm switch and the lower arm switch according to a compensation signal and a current detection signal for adjusting (regulating) an output voltage of the active clamp flyback power converter;

the control circuit can be selectively operated in one of a plurality of operation modes, wherein the operation modes comprise a flyback mode;

when the control circuit operates in the flyback mode, the control circuit switches the lower arm switch to generate a plurality of switching cycles, including an improved flyback cycle and a normal flyback cycle;

in each normal flyback period, the control circuit keeps the upper arm switch closed;

in each improved flyback period, the control circuit enables the upper arm switch to be opened after the shielding time to generate the upper arm opening time so as to enable the lower arm switch to carry out zero voltage switching; and

the control circuit generates the masking time according to the load of the active clamp flyback power converter.

Images