CN111026402B - Coding-type PLC code execution efficiency optimization method - Google Patents
Coding-type PLC code execution efficiency optimization method Download PDFInfo
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- CN111026402B CN111026402B CN201911253266.6A CN201911253266A CN111026402B CN 111026402 B CN111026402 B CN 111026402B CN 201911253266 A CN201911253266 A CN 201911253266A CN 111026402 B CN111026402 B CN 111026402B
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- 238000000034 method Methods 0.000 title claims abstract description 34
- 238000005457 optimization Methods 0.000 title claims abstract description 8
- 238000004364 calculation method Methods 0.000 claims description 6
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- 230000009286 beneficial effect Effects 0.000 description 1
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
Abstract
The optimization method for the code execution efficiency of the compiling type PLC provided by the invention optimizes the compiling type PLC, integrates the advantages of the compiling type PLC in the compiling IL, effectively solves the contradiction between small code length and execution efficiency, and optimizes the compiling process of the PLC code.
Description
Technical Field
The invention relates to a compiling type PLC code execution efficiency optimization method.
Background
The execution mode of the PLC has two modes of compiling and interpretation. The interpretation execution mode has small code length and is convenient for breakpoint setting during debugging; the compiling execution mode does not explain the re-executing process, and has the advantages of high execution efficiency and good real-time performance.
For a compiled PLC, the parsed code needs to be compiled into executable code for execution. The compiling results of different compiling methods have different code lengths and execution efficiencies. The small code length and high execution efficiency are a pair of contradictions, and the best method balances according to specific PLC hardware resources and application requirements.
Disclosure of Invention
In order to solve the technical problems, the invention provides a compiling type PLC code execution efficiency optimization method.
The invention is realized by the following technical scheme.
The invention provides a compiling type PLC code execution efficiency optimization method, which comprises the following steps:
s1, compiling a PLC language into an IL program by the IDE;
s2, calculating a compiling method of the IL program and selecting an identifier;
s3, selecting a compiling method according to the flag_DEC, and generating two types of DEC codes or CEC codes, wherein the selecting method is as follows:
s4, calculating the flag_DEC, wherein the calculating method is as follows:
s4.1, respectively calculating xd_1, xd_2, xd_3, xc_1 and xc_2;
s4.2, further calculating xd and xc according to the calculation result of the S4.1 pole;
s4.3, if xd < xc, adopting a direct instruction mode, wherein flag_DEC=true; otherwise, adopting a library calling mode, wherein flag_DEC=false;
s5, according to the result of S3.3, generating a DEC code when flag_DEC=true; generating a CEC code when flag_dec=false;
s6, downloading the generated code types into Flash of the PLC.
The compiling process of the step S2 is as follows:
a1, reading IL;
a2, inquiring IL;
a3, executing the selected IL to acquire the EC code.
In the step S4, xd_1 is an execution period of DEC, xd_2 is a memory occupation of DEC, xd_3 is a global call number, xc_1 is an execution period of CEC, xc_2 is a memory period of CEC, xd is a DEC performance value, and xc is a CEC performance value.
The calculation methods of the DEC performance value xd and the CEC performance value xc are respectively as follows:
Kd＝fd(IL)；
Kc＝fc(IL)；
xd＝Kd1*xd_1+Kd2*xd_2+Kd3*xd_3；
xc＝Kc1*xc_1+Kc2*xc_2；
where Kd, kc are weights.
The DEC code generated in said step S5 is a direct executable code; the CEC code generated in step S5 is a library-call-type directly executable code, i.e., a library function can be directly called.
The invention has the beneficial effects that: the method integrates the advantages of the compiling type PLC in the compiling type IL, effectively solves the contradiction between the small code length and the execution efficiency, and optimizes the compiling process of the PLC codes.
Drawings
FIG. 1 is an overall compilation process of the present invention;
FIG. 2 is a compilation selection process of the present invention;
FIG. 3 is a compiled output result of the present invention.
Detailed Description
The technical solution of the present invention is further described below, but the scope of the claimed invention is not limited to the above.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings and specific embodiments.
A compiling type PLC code execution efficiency optimization method comprises the following steps:
s1, compiling a PLC language into an IL program by the IDE;
s2, calculating a compiling method of the IL program and selecting an identifier;
s3, selecting a compiling method according to the flag_DEC, and generating two types of DEC codes or CEC codes, wherein the selecting method is as follows:
s4, calculating the flag_DEC, wherein the calculating method is as follows:
s4.1, respectively calculating xd_1, xd_2, xd_3, xc_1 and xc_2;
s4.2, further calculating xd and xc according to the calculation result of the S4.1 pole;
s4.3, if xd < xc, adopting a direct instruction mode, wherein flag_DEC=true; otherwise, adopting a library calling mode, wherein flag_DEC=false;
s5, according to the result of S3.3, generating a DEC code when flag_DEC=true; generating a CEC code when flag_dec=false;
s6, downloading the generated code types into Flash of the PLC.
The compiling process of the step S2 is as follows:
a1, reading IL;
a2, inquiring IL;
a3, executing the selected IL to acquire the EC code.
In step S4, xd_1 is the execution period of DEC, xd_2 is the memory footprint of DEC, xd_3 is the number of global calls, xc_1 is the execution period of CEC, xc_2 is the memory period of CEC, xd is the DEC performance value, and xc is the CEC performance value.
The calculation methods of the DEC performance value xd and the CEC performance value xc are respectively as follows:
Kd＝fd(IL)；
Kc＝fc(IL)；
xd＝Kd1*xd_1+Kd2*xd_2+Kd3*xd_3；
xc＝Kc1*xc_1+Kc2*xc_2；
where Kd, kc are weights.
The DEC code generated in the step S5 is a direct executable code, the code reuse problem is not considered in the mode, the code length is larger, and the execution efficiency is better; the CEC code generated in step S5 is a library-calling type directly executable code, i.e., can directly call a library function, and has a small code length, but has limited execution efficiency improvement.
The compiling type PLC included in the system firstly converts the PLC language into the IL language through the compiler under the IDE environment, then judges according to the result of calculating the flag_DEC, selects and outputs the DEC or CEC mode for compiling, can ensure the balance between the size of the PLC code and the execution efficiency, and realizes the optimized compiling process.
Claims (3)
1. A compiling type PLC code execution efficiency optimization method is characterized by comprising the following steps:
s1, compiling a PLC language into an IL program by the IDE;
s2, calculating a compiling method of the IL program and selecting an identifier;
s3, selecting a compiling method according to the flag_DEC, and generating two types of DEC codes or CEC codes, wherein the selecting method is as follows:
s4, calculating the flag_DEC, wherein the calculating method is as follows:
s4.1, respectively calculating xd_1, xd_2, xd_3, xc_1 and xc_2;
s4.2, further calculating xd and xc according to the calculation result of the S4.1 pole;
s4.3, if xd < xc, adopting a direct instruction mode, wherein flag_DEC=true; otherwise, adopting a library calling mode, wherein flag_DEC=false;
s5, according to the result of S3.3, generating a DEC code when flag_DEC=true; when (when)
Flag_dec=false, and generates the CEC code;
s6, downloading the generated code type into Flash of the PLC;
in the step S4, xd_1 is an execution period of DEC, xd_2 is a memory occupation of DEC, xd_3 is a global call number, xc_1 is an execution period of CEC, xc_2 is a memory period of CEC, xd is a DEC performance value, and xc is a CEC performance value;
the DEC code generated in said step S5 is a direct executable code; the CEC code generated in step S5 is a library-call-type directly executable code, i.e., a library function can be directly called.
2. The method for optimizing execution efficiency of a compiled PLC code according to claim 1, wherein: the compiling process of the step S2 is as follows:
a1, reading IL;
a2, inquiring IL;
a3, executing the selected IL to acquire the EC code.
3. The method for optimizing execution efficiency of a compiled PLC code according to claim 1, wherein: the calculation methods of the DEC performance value xd and the CEC performance value xc are respectively as follows:
Kd＝fd(IL)；
Kc＝fc(IL)；
xd＝Kd1*xd_1+Kd2*xd_2+Kd3*xd_3；
xc＝Kc1*xc_1+Kc2*xc_2；
where Kd, kc are weights.
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| CN106708497A (en) * | 2015-11-18 | 2017-05-24 | 上海木鸡网络科技有限公司 | Code executing method and device |
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| JP3642772B2 (en) * | 2002-09-25 | 2005-04-27 | 三菱電機株式会社 | Computer apparatus and program execution method |
| JP2006309387A (en) * | 2005-04-27 | 2006-11-09 | Matsushita Electric Ind Co Ltd | Method for supporting program compilation of programmable logic controller |
| JP5051377B2 (en) * | 2008-03-15 | 2012-10-17 | オムロン株式会社 | Operation specification management method for program development support device |
| JP5849592B2 (en) * | 2011-10-07 | 2016-01-27 | 富士電機株式会社 | Programmable controller system, programming device thereof, programmable controller, program, and debugging method |
| EP2912549A1 (en) * | 2012-10-29 | 2015-09-02 | ST-Ericsson SA | Methods for compilation, a compiler and a system |
| CN103901810B (en) * | 2012-12-31 | 2017-04-12 | 施耐德电器工业公司 | Optimizing system and method for user application of PLC |
| KR102063966B1 (en) * | 2015-10-21 | 2020-01-09 | 엘에스산전 주식회사 | Optimization method for compiling programmable logic controller command |
| CN107340995B (en) * | 2016-04-29 | 2020-11-20 | 中国铁道科学研究院 | Traction control application software development system and optimization compiling method for platform-independent codes |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1790267A (en) * | 2005-12-14 | 2006-06-21 | 浙江大学 | Virtual machine compiling system implementation method applied in Java operation system |
| CN106708497A (en) * | 2015-11-18 | 2017-05-24 | 上海木鸡网络科技有限公司 | Code executing method and device |
| CN105843659A (en) * | 2016-03-17 | 2016-08-10 | 深圳市金玺智控技术有限公司 | Implementation method and system of embedded C compiler |
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Address after: No. 249, Baiyun North Road, Baiyun District, Guiyang City, Guizhou Province Patentee after: Guiyang Yongqing Intelligent Control Technology Co.,Ltd. Address before: No. 249, Baiyun North Road, Baiyun District, Guiyang City, Guizhou Province Patentee before: GUIYANG YONGQING INSTRUMENTS & ELECTRONIC SCIENCEAND TECHNOLOGY Co.,Ltd. |
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