CN111007694A - Method for manufacturing phase shift mask for integrated circuit - Google Patents

Method for manufacturing phase shift mask for integrated circuit Download PDF

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Publication number
CN111007694A
CN111007694A CN201911347709.8A CN201911347709A CN111007694A CN 111007694 A CN111007694 A CN 111007694A CN 201911347709 A CN201911347709 A CN 201911347709A CN 111007694 A CN111007694 A CN 111007694A
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CN
China
Prior art keywords
etching
exposure
phase shift
photoresist
mask
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CN201911347709.8A
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Chinese (zh)
Inventor
刘维维
尤春
刘浩
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Wuxi Zhongwei Mask Electronics Co ltd
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Wuxi Zhongwei Mask Electronics Co ltd
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Priority to CN201911347709.8A priority Critical patent/CN111007694A/en
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/26Phase shift masks [PSM]; PSM blanks; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/72Repair or correction of mask defects

Abstract

The invention discloses a method for manufacturing a phase shift mask for an integrated circuit, which comprises the steps of converting graphic data into a format which can be identified by mask exposure equipment according to a graphic designed by a customer, exposing a mask substrate attached with a photosensitive material by using a mask exposure machine, and generating a transparent and opaque logic graphic on the surface of the mask substrate by a developing and etching process; the method sequentially comprises the following steps: the method comprises the following steps of first exposure, baking, first development, first chromium etching, first photoresist stripping, phase shift layer etching, first photoresist coating, monitoring pattern exposure, second development, second chromium etching, second photoresist stripping, monitoring pattern phase angle, evaluating and calculating the etching time of the phase shift layer, second photoresist coating, second exposure, third development, third chromium etching, third photoresist stripping, cleaning, pattern detection, film pasting, particle detection, packaging and delivery. The invention can overcome the defect that the phase angle exceeds the specification requirement after the main graphic metallic chromium is removed by final exposure in the prior process.

Description

Method for manufacturing phase shift mask for integrated circuit
Technical Field
The invention relates to a method for manufacturing a phase shift mask for an integrated circuit.
Background
In recent years, with the rapid development of semiconductor manufacturing technology, the device size is continuously reduced, the device integration level is higher and higher, and the number of transistors is doubled every 18 months according to Moore's law, which puts higher demands on the lithography technology. When the process node reaches 0.18 micron or even higher node, the light beam generates obvious diffraction effect after passing through the mask. The diffraction effect is more pronounced for the same light source as they transmit smaller reticle sizes. As a result, the light intensity distributions are significantly superimposed, and there is no way to generate enough energy intensity contrast to make the photoresist on the wafer react and develop to form the required pattern.
In order to maintain resolution and swath control, Resolution Enhancement Techniques (RET) such as phase shift masks (phase shift masks), off-axis illumination (OAI), Optical Proximity Correction (OPC), Pupil Filtering (PF), and multilayer resist imaging techniques are required in mask, imaging, and lithography processes. Phase shift masks are a key technology among them.
Conventionally, there is only a binary mask (binary), and the upper region of the mask is either completely transparent or completely opaque, and the optical path difference of all light passing through the light-transmitting pattern portion is the same. A novel phase shift mask technique is a technique for improving the resolution of a system by using a phase modulation method. This technique is also a method of reducing the k1 factor, so it does not reduce the depth of focus DOF, and makes the two light beams passing through the adjacent transparent regions have 180 degrees relative phase difference by phase shifting layer, so that the two light beams have destructive interference between them, and the light intensity at the adjacent boundary is reduced, so that the edge contrast of the pattern is improved, and the depth of focus and resolution are improved.
The determination of the intensity of the pattern light by the combination of waves diffracted by the individual light-transmitting apertures on the mask is a basic idea of the lithography technique. The light intensity is reduced along with the reduction of the focal depth, the contrast of the graph is reduced along with the reduction of the characteristic size and the focal depth of the graph, the image quality is reduced, a high-quality graph is difficult to be photoetched, and the criterion of graph engraving is mainly determined by the contrast of the graph. The phase shift mask method proposed in Levenson1982 achieves higher resolution than the conventional method. The basic idea is to selectively introduce a phase shift layer, i.e. a phase shifter, in some transparent areas on the mask, with a thickness: dPS λ/2(n-1) × (2m +1) where λ -wavelength; n-refractive index of phase shift layer material; the introduction of phase shift layer can make the phase difference of 180 deg. between the light passed through the light-transmitting regions with or without phase shifter on the mask produce, so that the spatial frequency distribution and spatial image distribution of mask pattern can be changed, and the intensity of dark region between adjacent light-transmitting hole images on the surface of silicon wafer can be reduced due to destructive interference, and according to the law of conservation of energy the bright region image intensity of characteristic pattern can be inevitably increased, so that the bright region can be brighter, so that the image contrast, intensity distribution slope, resolution and image quality can be raised. The resolution also depends on the partial coherence factor (e) of the illumination light, the mask pattern spatial frequency (g0), and the imaging system numerical aperture (N A). The improvement of the contrast ratio enables the pattern which cannot be resolved due to the poor contrast ratio to be resolved, so that the phase shift mask improves the resolution ratio.
The Rayleigh resolution criterion is used, and the resolution W is calculated according to the formula as follows:
W=k 1λ/NA
where λ is the exposure wavelength, NA is the imaging optics numerical aperture, and k1 is a process dependent factor. Table 4.2-1 lists the resolving power of the optical system when k1 is taken to be 0.5 and 0.38, where k1 ═ 0.5 is the fundamental limit when using binary masks and conventional illumination; k 1-0.38 is the resolution achievable using advanced lithography techniques such as OAI and phase shift masks. By means of interference cancellation at the edges of the pattern, the contrast of the pattern can be significantly improved by means of a phase-shifting mask. The specific principle is shown in fig. 1 and fig. 2.
It is obvious that after the phase shift mask is matched, the pattern can be completely displayed, and the contrast is obviously improved. However, the phase shift mask requires two exposures, and not only is the overlay accuracy controlled more precisely, but also the period is long. The control difficulty is more. The main technical points of the phase shift mask are a phase control technique, a long period stripe width control technique, and a defect control technique.
The main function of the phase shift mask is to overcome the interference and diffraction problems in the wafer exposure process by means of phase deflection. The phase layer of a phase shift mask determines the final quality of the phase shift mask, but since the phase of the mask is affected by a number of factors, such as phase shift layer material, etching, cleaning, etc. Therefore, the phase of the phase shift mask is easily changed and is not easily controlled.
Disclosure of Invention
The invention aims to solve the technical problem of overcoming the defect that the phase angle of the mask can only be scrapped after the phase angle is found to exceed the specification requirement by measuring the phase angle of the traditional phase shift mask after the phase shift mask is manufactured, and provides a manufacturing method of an integrated circuit phase shift mask for reducing scrapping caused by the phase angle exceeding the specification.
In order to solve the technical problems, the invention provides the following technical scheme:
the invention provides a method for manufacturing a phase shift mask for an integrated circuit, which comprises the steps of converting graphic data into a format which can be identified by mask exposure equipment according to a graphic designed by a customer, exposing a mask substrate attached with a photosensitive material by using a mask exposure machine, and generating a transparent and opaque logic graphic on the surface of the mask substrate by a developing and etching process; the method sequentially comprises the following steps: the method comprises the following steps of first exposure, baking, first development, first chromium etching, first photoresist stripping, phase shift layer etching, first photoresist coating, monitoring pattern exposure, second development, second chromium etching, second photoresist stripping, monitoring pattern phase angle, evaluating and calculating the etching time of the phase shift layer, second photoresist coating, second exposure, third development, third chromium etching, third photoresist stripping, cleaning, pattern detection, film pasting, particle detection, packaging and delivery.
Further, the first exposure and the second exposure refer to irradiating the mask substrate coated with the photoresist through laser or electron beams, wherein the irradiated position of the photoresist can generate chemical reaction, so that the areas with/without chemical reaction in the photoresist can be separated, the photoresist with chemical reaction is removed through baking and developing, and finally the metal chromium without the protection of the photoresist is removed through etching.
Further, the phase shift layer etching is to etch the phase shift layer without protection of the metal layer by plasma.
Furthermore, the monitoring pattern phase angle means that the phase angle is confirmed and timely adjusted before chromium metal is removed, so that the phase angle precision is improved.
The invention has the following beneficial effects: the phase-shift mask manufacturing method for the integrated circuit adds a phase angle monitoring process in the existing manufacturing process, wherein the background of the phase angle monitoring process is that equipment on a production line is abnormal, but the equipment is not found in normal monitoring, so that products are finally scrapped and cannot be saved, and the phase angle monitoring process is added before metal etching. And measuring the phase angle before final exposure to obtain a phase angle value, and further evaluating whether the phase shift layer needs to be etched. To evaluate the phase angle correction process feasibility, a phase shift mask was used to etch the mask phase shift layer after the chrome etch, and the feasibility of the correction process was determined by evaluating the effect of the etch time on the phase angle.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a second order mask imaging diagram;
FIG. 2 shows an imaging diagram of a phase shift mask;
FIG. 3 is a phase shifted normal wafer lithographic image of a mask;
FIG. 4 is a wafer lithographic image with abnormal phase shift of the mask;
FIG. 5 is a graph of the amount of phase angle change versus time of the etch.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
As shown in fig. 1 to 5, a method for manufacturing a phase shift mask for an integrated circuit, which converts graphic data into a format recognizable by a mask exposure device according to a graphic designed by a customer, exposes the graphic data to a mask substrate attached with a photosensitive material by using a mask exposure machine, and generates a transparent and opaque logic graphic on the surface of the mask substrate by a developing and etching process; the method sequentially comprises the following steps: the method comprises the following steps of first exposure, baking, first development, first chromium etching, first photoresist stripping, phase shift layer etching, first photoresist coating, monitoring pattern exposure, second development, second chromium etching, second photoresist stripping, monitoring pattern phase angle, evaluating and calculating the etching time of the phase shift layer, second photoresist coating, second exposure, third development, third chromium etching, third photoresist stripping, cleaning, pattern detection, film pasting, particle detection, packaging and delivery.
The first exposure and the second exposure refer to that the mask substrate coated with the photoresist is irradiated by laser or electron beams, the irradiated position of the photoresist can generate chemical reaction, so that the areas with/without chemical reaction in the photoresist can be separated, the photoresist with chemical reaction is removed through baking and developing, and finally the metal chromium without the protection of the photoresist is removed through etching.
The phase shift layer etching is to etch the phase shift layer without the protection of the metal layer by plasma.
The monitoring pattern phase angle means that the phase angle is confirmed and timely adjusted before chromium metal is removed, so that the phase angle precision is improved.
The invention relates to a method for manufacturing a phase shift mask for an integrated circuit, which adds a phase angle monitoring process in the existing manufacturing process, wherein the background of the phase angle monitoring process is that equipment on a production line is found to be abnormal, but the equipment is not found in normal monitoring, so that products are finally scrapped and cannot be saved, therefore, the phase angle monitoring process is added before metal etching, and the problem that how to answer the product is more appropriate is not known. And measuring the phase angle before final exposure to obtain a phase angle value, and further evaluating whether the phase shift layer needs to be etched. To evaluate the phase angle correction process feasibility, a phase shift mask was used to etch the mask phase shift layer after the chrome etch, and the feasibility of the correction process was determined by evaluating the effect of the etch time on the phase angle. FIG. 5 is a graph showing the relationship between the amount of phase angle change and the etching time. As can be seen from FIG. 5, the phase angle increases linearly with the increase of the etching time, the etching time is 1s, the phase angle is increased by 0.5 degrees, so that the etching time can be accurately controlled, the phase angle error can be controlled, and the problem that the phase angle exceeds the specification requirement and is scrapped after the main pattern metal chromium is removed by final exposure in the existing process is overcome.
The invention relates to a method for manufacturing a phase shift mask for an integrated circuit, which adds a phase angle monitoring procedure in the existing manufacturing process, evaluates whether a phase shift layer needs to be etched or not by measuring a phase angle value before final exposure, and controls the final phase angle of the phase shift mask by adding etching for 2s according to an experimental result, increasing the phase angle by 1 degree and adding etching to the phase shift mask so as to overcome the defect that the phase angle exceeds the specification requirement after the main pattern metal chromium is removed by final exposure in the existing process. The lithographic effect on the wafer after mask phase change is shown in fig. 3 and 4.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (4)

1. A phase shift mask manufacturing method for integrated circuit is characterized in that according to the figure designed by the customer, the figure data is converted into the format which can be identified by the mask exposure equipment, the mask exposure machine is used to expose the mask substrate with photosensitive material, and the surface of the mask substrate is made to generate the process of transparent and opaque logic figure through the developing and etching process; the method sequentially comprises the following steps: the method comprises the following steps of first exposure, baking, first development, first chromium etching, first photoresist stripping, phase shift layer etching, first photoresist coating, monitoring pattern exposure, second development, second chromium etching, second photoresist stripping, monitoring pattern phase angle, evaluating and calculating the etching time of the phase shift layer, second photoresist coating, second exposure, third development, third chromium etching, third photoresist stripping, cleaning, pattern detection, film pasting, particle detection, packaging and delivery.
2. The method of claim 1, wherein the first exposure and the second exposure are performed by irradiating a mask substrate coated with a photoresist with laser or electron beams, the photoresist is chemically reacted at the irradiated position to separate regions with/without chemical reaction in the photoresist, the photoresist is baked and developed to remove the chemically reacted photoresist, and the chrome metal without protection of the photoresist is finally removed by etching.
3. The method of claim 1, wherein the phase shift layer etching is plasma etching of the phase shift layer without protection of the metal layer.
4. The method as claimed in claim 1, wherein the step of monitoring the pattern phase angle comprises determining the phase angle and adjusting the phase angle in time before removing chromium metal, and further improving the phase angle accuracy, and comprises measuring the phase angle of the monitoring pattern after glue application, exposure, development, chromium etching and glue removal, and evaluating whether a phase shift layer reprocessing process is required according to experimental data.
CN201911347709.8A 2019-12-24 2019-12-24 Method for manufacturing phase shift mask for integrated circuit Pending CN111007694A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0659434A (en) * 1992-08-07 1994-03-04 Dainippon Printing Co Ltd Phase-shift photomask blank and phase-shift photomask
US20060292455A1 (en) * 2005-06-23 2006-12-28 Yung-Feng Cheng Method for checking phase shift angle of phase shift mask, lithography process and phase shift mask
CN1892418A (en) * 2005-07-01 2007-01-10 联华电子股份有限公司 Method for verifying phase-shift angle of phase-shift photomask, photoengraving technology and phase-shift photomask
CN102213913A (en) * 2010-04-09 2011-10-12 中国科学院微电子研究所 Methods for enhancing resolution of optical mask and manufacturing high-resolution optical mask
CN109164674A (en) * 2018-08-30 2019-01-08 无锡中微掩模电子有限公司 A kind of integrated circuit phase shifting mask manufacturing method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0659434A (en) * 1992-08-07 1994-03-04 Dainippon Printing Co Ltd Phase-shift photomask blank and phase-shift photomask
US20060292455A1 (en) * 2005-06-23 2006-12-28 Yung-Feng Cheng Method for checking phase shift angle of phase shift mask, lithography process and phase shift mask
CN1892418A (en) * 2005-07-01 2007-01-10 联华电子股份有限公司 Method for verifying phase-shift angle of phase-shift photomask, photoengraving technology and phase-shift photomask
CN102213913A (en) * 2010-04-09 2011-10-12 中国科学院微电子研究所 Methods for enhancing resolution of optical mask and manufacturing high-resolution optical mask
CN109164674A (en) * 2018-08-30 2019-01-08 无锡中微掩模电子有限公司 A kind of integrated circuit phase shifting mask manufacturing method

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