CN111007390B - Analog circuit fault diagnosis model based on algebraic method - Google Patents
Analog circuit fault diagnosis model based on algebraic method Download PDFInfo
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Abstract
The invention discloses an algebraic method-based analog circuit fault diagnosis, which unifies fault detection, fault positioning and fault parameter identification on a model for integrated processing, adopts a topology correlation algorithm to select effective test points, improves the fault coverage rate, is convenient to implement, has short on-line calculation time, can effectively overcome the influence of noise on a fault diagnosis result, meets the actual requirements of engineering application, solves the problems of continuous parameters and difficult parameter identification of analog circuit devices due to the particularity of the method, can still realize fault diagnosis under a certain undersampling condition, finally analyzes the influence of element tolerance on the diagnosis result, and researches a method for reducing the influence of tolerance according to the characteristics of the proposed method.
Description
Technical Field
The invention belongs to the technical field of analog circuit fault diagnosis, and particularly relates to an algebraic method-based analog circuit fault diagnosis model.
Background
Simulation of the technical status of circuit fault diagnosis
During the design, manufacture, use and maintenance of the circuit system, related fault diagnosis technology needs to be researched to improve the reliability of the system and reduce the cost of production test and use and maintenance. The analog circuit has the characteristics of limited accessible measuring points, infinite signal values, tolerance of device parameters, nonlinear relation between circuit response and element characteristics and the like, so that a fault diagnosis model is lacked and fault diagnosis is difficult. Therefore, the research of analog circuit fault diagnosis is a subject with important theoretical research and engineering application value, and the proposal of a good analog circuit fault diagnosis method has very important significance for the production design, use and maintenance of the analog circuit.
Secondly, the existing analog circuit fault diagnosis model mainly has the following five defects
1. Failure parameter identification can not be realized
The analog circuit fault diagnosis comprises fault detection, fault location and parameter identification. The existing analog circuit fault diagnosis technology only generally detects and positions faults. For general application occasions, the requirements can be met only by completing fault detection and fault positioning, for example, fault elements or modules can be repaired or replaced in time, and a circuit or an electronic system can be recovered to work normally again. However, with higher and more severe requirements for reliability in the engineering technology field, it is not enough to detect or locate a fault, for example, in links such as fault prediction of a circuit and an electronic system, residual life estimation of the system, component failure mechanism analysis, and improvement of system design according to reliability characteristics in system application, it is far from sufficient to know a fault position (fault location), and at this time, it is also necessary to know a fault state, that is, it is necessary to perform parameter identification on a faulty component, especially on-line parameter identification, to provide more and more specific fault information. Compared with fault detection and fault location, fault parameter identification is much more difficult.
2. The fault diagnosis model is too complex
The existing analog circuit fault detection model, whether based on an information processing method and an artificial intelligence algorithm, or based on a traditional circuit network theory analysis fault modeling method, cannot achieve the purposes of accurately realizing fault detection, fault positioning and fault parameter identification, and achieving quick and convenient implementation of fault diagnosis and low cost. In addition, most fault diagnosis models cannot be suitable for a time domain signal analysis method and a frequency domain signal analysis method, and are suitable for linear circuits and nonlinear circuits.
3. Fault diagnosis time is too long
The existing analog circuit fault detection model, whether based on information processing or analytical modeling, is very complicated and time-consuming in calculation. For example, in the wavelet analysis method based on the information processing method, after the wavelet coefficient is obtained by collecting the output signal of the circuit and performing wavelet analysis, the fault diagnosis is completed according to the variation of the wavelet decomposition coefficient. The method has good time-frequency resolution, can be combined with other diagnostic methods to be applied to local circuit modules or large-scale circuit systems, and has the advantages of high reliability and high reliability; the disadvantages are that the calculation is complex, different wavelet coefficients can be generated by additionally selecting different wavelet bases, so that the diagnosis result is influenced, and the optimization of wavelet decomposition layers is difficult and time-consuming.
4. Fault diagnosis is affected by component tolerances
In practical applications, the tolerance of the component parameters affects the preparation of mathematical models of circuits, which makes many circuit fault models difficult to accurately establish, and some fail to establish. In addition, as the scale of the circuit to be diagnosed is enlarged, the complexity of the system to be diagnosed is increased, the mutual influence between each device and each signal in the circuit is caused, and the mutual influence relationship between the parameters is difficult to describe accurately.
5. Cost of fault diagnosis model is too high
When the high-frequency analog circuit is diagnosed, the output response is sampled according to the nyquist theorem, for example, the sampling frequency and the storage rate are required to be high, the cost of the fault diagnosis model is very high, but the lower the cost (such as time overhead and test difficulty) of fault diagnosis is expected to be, the better the actual engineering requirements are.
Third, prior art
The first prior art is as follows:
the invention discloses a fault diagnosis method for a linear analog circuit, which is disclosed by the patent document CN201410436919.5 with the application number of CN 104198923A.
The fault diagnosis method includes the steps of firstly simulating an analog circuit to obtain fault characteristic column vectors corresponding to fault source elements, dividing the corresponding fault source elements into fuzzy groups when the fault characteristic column vectors are the same in an error range, selecting one representative fault source element from each fuzzy group, then respectively simulating each representative fault source element for Q times to obtain Q fault characteristic column vectors, taking each representative fault source element as a category, obtaining classification model data according to the corresponding fault characteristic column vector, obtaining the fault column vectors according to output voltage phasor vectors in normal operation and fault output voltage phasor vectors when the analog circuit fails, and classifying the fault column vectors according to the classification model data and a corresponding classification method to obtain a fault diagnosis result.
The fault diagnosis method has the following defects: the fault diagnosis adopts the fault characteristic column vector to carry out analog circuit fault characterization, and the fault diagnosis method of the linear fuzzy circuit is provided based on the fault diagnosis method, although the calculation process is simpler and has small complexity, and the influence of tolerance on the fault diagnosis can be reduced, so that the fault diagnosis result is more accurate, the fault parameters cannot be identified, and the method has no certain anti-noise interference capability. In the existing engineering technology, identification of fault parameters is more and more important, various interferences are certainly generated in actual fault diagnosis, and the anti-interference capability is particularly important.
The second prior art is:
patent document CN201310034375.5, publication number CN103245907A discloses an analog circuit fault diagnosis mode classification algorithm based on signal feature space modeling.
The fault diagnosis method comprises the steps of carrying out optimal fractional Fourier transform and R-type cluster analysis on signals acquired by a test node on the basis of an information entropy principle to describe the characteristics of a fault sample, and modeling the fault into different spatial distributions; constructing a target optimization function of the nuclear parameters by using the class separability criterion of characteristic evaluation of 'minimum intra-class distance and maximum inter-class distance', optimally solving the target function based on the adaptive genetic algorithm, and setting the nuclear parameters; a hierarchical support vector machine classifier is constructed by combining Q-type clustering analysis to discover and separate faults; the algorithm can extract the sensitive quantity reflecting the fault characteristics from the measurement signals, and obtains higher fault diagnosis speed and higher fault diagnosis accuracy.
The fault diagnosis method has the following defects: the method can obtain higher fault diagnosis speed and higher fault diagnosis accuracy, but is inconvenient to implement due to complex principle and large calculation amount. In addition, the fault model established by the method also can not realize fault parameter identification, and the cost is relatively increased because the condition of undersampling can not be met when the fault diagnosis is carried out on the high-frequency analog circuit.
The prior art is three:
patent document "a method for diagnosing a fault of an analog circuit", with application No. CN201410404031.3 and publication No. CN104237770A, discloses a method for diagnosing a fault of an analog circuit.
Firstly, simulating each element under the conditions of no fault and two faults to obtain a no-fault voltage value and two fault voltage values of a measuring point, obtaining a characteristic circle corresponding to the element according to the three voltage values, solving the intersection point of the characteristic circle to obtain aliasing voltage, and obtaining the equivalent excitation of the element; when the circuit fails, the shortest distance from the fault voltage to each characteristic circle is calculated, if the shortest distance is smaller than or equal to 1, the element corresponding to the shortest distance is the fault element, otherwise, the aliasing voltage closest to the fault voltage is found out from all the aliasing voltages, the equivalent excitation of the corresponding element is respectively adopted to excite the fault circuit, the obtained response voltage phasor sequence is translated and then compared with the characteristic circle of the corresponding element, and the element corresponding to the maximum similarity is the fault element.
The fault diagnosis method has the following defects: the method adopts the fault equivalent excitation to excite the tested analog circuit to activate the fault so as to obtain a series of fault outputs, and changes the point diagnosis into the line diagnosis, thereby improving the accuracy, stability and robustness of the fault diagnosis. However, the fault diagnosis model realized by the method has a complex principle and large calculation amount, cannot identify fault parameters, cannot perform fault diagnosis even under the condition of undersampling, and does not have strong anti-interference capability, so that the requirement on the test is high. In conclusion, the fault diagnosis method has the defects of time consumption, high cost, small application range, incomplete functions and the like.
Fourthly, summary of the prior art
Through the analysis, it can be found that although the fault diagnosis model established by the existing fault diagnosis method can achieve high fault detection precision, high fault coverage rate and strong stability, the mature method for identifying the parameters of the analog circuit is rarely reported at present, and meanwhile, the method is complex in operation, high in detection cost, small in application range and weak in anti-interference capability.
With the improvement of the degree of the requirement of engineering application on the identification of the fault parameters and the actual requirements of reducing the fault diagnosis cost, shortening the fault diagnosis time, reducing the fault test requirement and the like in the diagnosis process, the research on the fault positioning and parameter identification method of the analog circuit has very important significance.
Disclosure of Invention
The invention provides an algebraic method-based analog circuit fault diagnosis, aiming at overcoming the defects that the existing analog circuit fault diagnosis model cannot realize fault parameter identification, has overlong fault diagnosis time and small use range, the fault diagnosis is influenced by component tolerance, the diagnosis result is sensitive to noise, so that the fault detection is inaccurate, the fault diagnosis cannot realize undersampling, so that the cost is increased when the fault detection is carried out on a high-frequency circuit, the method integrates the fault detection, the fault positioning and the fault parameter identification on one model, is convenient to implement, has less on-line calculation time, can effectively overcome the influence of the noise on the fault diagnosis result, meets the actual requirements of engineering application, solves the problems of continuous parameters and difficult parameter identification of analog circuit devices due to the particularity of the method, and can still realize the fault diagnosis under certain undersampling conditions, finally, the influence of component tolerance on the diagnosis result is analyzed, and a method for reducing the influence of tolerance is researched according to the characteristics of the proposed method.
In order to achieve the purpose, through analyzing the reasons that the analog circuit fault diagnosis model with the parameter identification function is difficult to establish, a solution thought is provided for the problems that the establishment of the analog circuit fault diagnosis model is limited in accessible measuring points, multiple in device types, infinite continuous states of device parameters and signal values, component parameter tolerance, the input-output relation does not meet the linear relation, the circuit structure is complex and the like.
The solution idea of establishing the analog circuit fault diagnosis model with limited accessible measuring points is as follows: more information is obtained from each measuring object by using an efficient automatic testing system, as many fault characteristics as possible are extracted by adopting an advanced algorithm, and phase synchronization processing is carried out when a measured signal is sampled, so that not only voltage amplitude information but also phase information of voltage can be obtained.
The solution idea that the types of devices facing the establishment of the analog circuit fault diagnosis model are various and the devices with different units and parameters cannot be unified into the same fault model is as follows: the parameters of the tested device are normalized, namely the nominal value of each device is 1, and when the device parameters change from the nominal value to the nominal value, the normalized parameter value changes around 1. Therefore, parameters of different devices can be unified to the same coordinate system, and a fault model is established for fault diagnosis.
The solution idea that the device parameters and the signal values of the analog circuit fault diagnosis model have infinite continuous states is as follows: the least square fitting method can obtain the corresponding functional relation between the measured value and the parameter state according to the limited parameter state and the corresponding limited measured value, and establishes the function between the measured value and the parameter state in the fault diagnosis model, and the functional relation can approximately reflect the corresponding relation between the infinite measured value and the infinite parameter state.
The solution idea of establishing the influence of the element parameter tolerance faced by the analog circuit fault diagnosis model on the element parameter tolerance is as follows: the fault diagnosis model is established by using the mapping relation that the fault characteristics of the tested circuit change along with the change of the device parameters, namely, the relative change quantity is considered. Although the fault characteristic curve of a tested circuit with the influence of device parameter tolerance can deviate from the fault characteristic curve without the influence of tolerance, the change trend of the fault characteristic curve caused by the change of a certain device parameter in the circuit is similar regardless of the influence of tolerance, and the similar change trend ensures that the relative change quantity of the fault characteristic of the circuit along with the change of the device parameter is not greatly influenced by the tolerance, so that the deviation of the fault characteristic curve caused by the existence of tolerance of the device parameter relative to the fault characteristic curve without the influence of tolerance can be reduced by adopting a linear compensation mode.
The solution idea that the input-output relationship of the analog circuit fault diagnosis model does not satisfy the linear relationship is as follows: based on the algebra viewpoint, the mapping relation between the fault characteristics of the circuit to be tested and the device parameters is established, the proper fault characteristics are extracted by an algebra method, and the fault diagnosis problem of the analog circuit is changed into the problem of algebraic analysis. So that it is applicable whether the input-output of the circuit under test is linear or non-linear.
From the above, the solution adopted by the present invention is,
the analog circuit fault diagnosis method based on the algebraic method comprises the following steps:
a. acquiring information from a measurement object by using an automatic test system to obtain fault characteristics, sampling a measured signal by adopting phase synchronization, and acquiring voltage amplitude information and voltage phase information;
b. normalizing the parameters of the device to be tested;
c. acquiring a function relation corresponding to the measured value and the parameter state according to the limited parameter states and the corresponding limited measured values by using a least square fitting method, and establishing a function of the measured value and the parameter state in the analog circuit fault diagnosis model;
d. the method comprises the steps of establishing a fault diagnosis model by utilizing a mapping relation that the fault characteristics of a tested circuit change along with the change of device parameters, extracting the fault characteristics by using an algebraic method, changing the fault diagnosis problem of an analog circuit into an algebraic analysis problem, and realizing fault parameter identification, fault detection and fault positioning through the mapping relation between a fault characteristic value and the device parameters.
Further, the step of establishing a fault diagnosis model of the analog circuit comprises:
1) sampling the output response signal to obtain 25 voltage amplitude values, arranging the 25 voltage amplitude values into a matrix in sequence, and solving a characteristic value;
2) establishing a fault detection function according to the relation that the characteristic value changes along with the change of the normalized value of the element parameter,
Zi,j,wfor the values of the fault signature, the index i denotes the ith element, the index j denotes the jth measurement, the index w denotes the w fault signature corresponding to the fault response, xi,jDenotes the normalized parameter value of the ith element at the jth measurement, an,i,w,an-1,i,w,...,a1,i,w,a0,i,wIs a constant;
two fault detection functions built from the spectral radius and the next largest eigenvalue are as follows,
3) the coefficients a of equations (2) and (3) are derived by least squares fitting of 21 spectral radii and 21 next-largest eigenvalues for each devicen,i,w,an-1,i,w,...,a1,i,w,a0,i,wObtaining fault characteristics Z of multiple fault diagnosis devicesi,j,wNormalizing value x with device parameteri,jThe mapping relationship between them.
Further, the fault diagnosis process steps of the analog circuit are as follows,
1) testing the output response of the circuit under test, calculating the corresponding fault characteristics of the response matrix, Z1Denotes the radius of the spectrum, Z2Represents the next largest eigenvalue;
2) by Z1Instead of Z in equation (2)i,j,1Solving equations, wherein each equation obtains n solutions;
3) judging whether the solution of the equation is in the range of the device normalization value, if the solution of the equation is an imaginary number or less than zero, indicating that the solution is not in the range of the device normalization value, and rejecting the solution;
4) replacing x in equation (3) with a solution of equation (2) over a range of device normalization valuesi,jCalculating the corresponding Zi,j,2；
5) Subjecting Z obtained in step 4) toi,j,2With Z calculated in step 1)2Comparing to find Z2The value of the difference between the two is the minimum and is recorded as Zp,j,wThen Z isp,j,wBest matching the fault signature of device p. If Z is calculated in step 4)p,j,wCorresponding to xp,jIf the tolerance range of the device p is exceeded, the device p generates a fault, and the parameter identification result is xp,j。
Further, in the step d, a linear compensation mode is adopted to reduce the deviation of the fault characteristic curve caused by the existence of tolerance in the device parameters relative to the fault characteristic curve without tolerance influence.
The method is different from digital signal processing and artificial intelligence algorithms and analytical fault modeling methods based on the traditional circuit network theory, but from the algebraic point of view, the method uses the output response test signal as an intermediate variable, applies a functional analysis method and provides a new fault diagnosis model establishment method according to the mapping relation between the device parameters and the fault characteristics of the circuit, and the established fault diagnosis model has the main beneficial effects that:
1. the fault detection, fault positioning and fault parameter identification are unified on one model for integrated processing, so that the implementation is convenient, the online calculation time is short, and the actual application requirements of the engineering are met;
2. in the process of establishing a fault diagnosis model, only a limited number of discrete parameter states of a simulation device to be diagnosed are simulated, after fault characteristics are extracted from corresponding limited response signals, least square fitting is carried out, fault characteristic information corresponding to continuous parameter states of the simulation device can be obtained according to a fitting curve, and the problems that parameters of a simulation circuit device are continuous and parameter identification is difficult are solved;
3. the mapping relation between the circuit parameters and the fault characteristics is directly considered, and as long as the fault characteristics are reasonably selected, the fault model is suitable for a time domain signal analysis method, a frequency domain signal analysis method, a linear circuit and a nonlinear circuit;
4. according to the established fault model, four fault feature extraction algorithms are analyzed, and the diagnosis effect is verified. In fault diagnosis techniques based on digital signal processing and artificial intelligence, the diagnostic results are sensitive to noise. In order to reduce the sensitivity to noise, in the algebraic method, when the fault characteristics are selected, a matrix disturbance theory is used as a support, the selected fault characteristics can reflect the relative change condition of signals on the whole, and the method has no dependence on the previous test data, so that the test requirement can be reduced;
5. aiming at the problem that the output response is sampled according to the Nyquist theorem and the requirement on the sampling frequency and the storage rate is higher when a high-frequency analog circuit is diagnosed, the method analyzes and verifies that the provided method can still realize fault diagnosis under a certain undersampling condition;
6. the influence of component tolerance on a diagnosis result is analyzed, and a method for reducing the influence of the tolerance is researched according to the characteristics of the proposed method;
in summary, the fault detection model established by the method has the advantages of high detection precision, high fault coverage rate, strong stability and low cost, and can also be used for fault parameter identification and fault diagnosis under certain undersampling conditions, and most importantly, the fault diagnosis model provided by the method is convenient to implement.
Drawings
FIG. 1 is a diagram of a test model of a circuit under test.
FIG. 2 is a schematic diagram of fault modeling.
Fig. 3 is a circuit diagram of a band pass filter.
Fig. 4 is a voltage waveform of the 21 output responses obtained by modifying the device under test.
Fig. 5 shows 21 fault characteristic values obtained by modifying the tested components.
FIG. 6 is a graph of the variation of the failure characteristics as the device normalization value varies.
FIG. 7 is a graph of fault characteristics as a function of device normalization value under the influence of tolerance on the fault model.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention are described clearly and completely below, and it is obvious that the described embodiments are some, not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention is further described below with reference to the accompanying drawings:
referring to fig. 1-7, the basic theory for establishing a fault model according to the present invention is as follows:
considering that the influence of circuit failure is that the output response does not meet the ideal requirement, namely the output response deviates from the normal response, and in order to avoid the influence that the established fault diagnosis model depends on the circuit structure and the device characteristics seriously, only considering the corresponding relation between the fault device parameters and the fault characteristics extracted from the output response signals to establish the fault diagnosis model.
The test model of the circuit under test can be simplified to the structure shown in fig. 1, where the device with failure is represented by xiIdentification, RLIs the test port load. If the output response signal of the selected test point is influenced by the device parameter xiWhen dividing x in the circuit under testiWhen all other device parameters are normal values, xiOutputs a response Y when the value of (A) is changedgWill follow xiI.e. the parameter value x of the faulty deviceiAnd a response signal Y at the test pointgA mapping relation is formed between the two groups of the first and the second,namely, can handle YgIs represented by F [ x ]i]。
If the response signal Y of the slave circuitgWherein the extracted fault feature is Zg,wWhere Z isg,wW in the subscript of (a) denotes a response from one YgW fault features are extracted, because Zg,wWith YgIs changed, so that Zg,wAnd YgForm a mapping relation, can use one xiFunctional representation Zg,wIs composed of
Zg,w＝J[F[xi]]
Here J [. C]Is represented by F [ x ]i]To Zg,wTo (3) is performed. When the parameters of each device in the same tested circuit are different, the output response at the same test point may be the same or different, i.e. the mapping relationship F [. cndot.) between the parameter set of the circuit and the response set of the circuit]It may be a many-to-one mapping, or a one-to-one unidirectional mapping. Similarly, the same fault feature extraction method is adopted, the fault features extracted from the same response signal are the same, and the fault features extracted from different response signals can be the same or different, so that the output response Y is outputgAnd failure feature set Zg,wJ [ · mapping between]Also a many-to-one or one-to-one-way mapping. Thus, the composite map J [ F [ · ]]]One-way mapping V [ ·that can be abstracted as a many-to-one or one-to-one]I.e. by
Zg,w＝V[xi]
If V [ · ]]Is a one-to-one mapping, then the fault feature set Z can be derived by means of a negation functiong,wDetermining a faulty device parameter xiThe method realizes parameter identification, and compares the identification result with the tolerance range of the device to obtain the fault detection and fault positioning results.
In practical engineering application, J and F are often many-to-one mapping, so that parameter identification cannot be performed by a direct inverse function method, and other measures should be taken to change J and F from many-to-one mapping to one-to-one mapping, so that parameter identification can be performed by an inverse function method.
J [. cndot.) is the mapping from multiple response signals to a fault feature, which indicates that the extracted fault feature can not fully reflect the response signal characteristics of the tested circuit, and also indicates the influence of the selection of the fault feature on the correctness of the diagnosis result.
F is a many-to-one mapping, which shows that when any one device in a group of devices has parameter change, the output response is caused to have the same change, namely the selected output response can only be positioned to the group of devices but not to one device in the group of devices. To change F [. cndot. ] from a many-to-one mapping to a one-to-one mapping, three aspects can be considered:
1. improving a test system, and obtaining more test information from the same test point;
2. dividing fault groups for hierarchical diagnosis;
3. and the accessible test points are fully utilized. Common test point selection algorithms include an intersection operation method, a division correlation matrix algorithm, a topology correlation algorithm and the like.
By adopting the three measures, the situation that F [ cndot ] is mapped to one image by a plurality of original images can be reduced as much as possible according to the circuit characteristics. In the research process, the testability design of a tested circuit is determined, effective test points are selected by adopting a topology correlation algorithm, a test system is reasonably improved according to the characteristics of an observed object, and more comprehensive test information is obtained from the same test point so as to achieve the purpose of improving the fault coverage rate. For example, in an output voltage response signal test, measurement is performed in a time synchronization manner, and the result of one measurement includes both amplitude change information and relative phase difference information. Meaning that a topology correlation algorithm is used to solve many-to-one problems.
Solve the problem of J [. degree]And F [ ·]After the many-to-one mapping problem, the diagnosable set of faults satisfies J [ ·]And F [ ·]Is a one-to-one mapping condition. At this point, the composite map V [ ·]＝J[F[·]]Also satisfies the condition of one-to-one mapping, and calculates the fault characteristic Z from the output responseg,wThen, by making a pair Zg,w＝V[xi]By means of an inverse function, can be derived fromZg,wFinding xiAnd fault diagnosis and parameter identification can be realized by combining optimization algorithms such as optimal approximation and the like.
In this embodiment, the step of establishing the fault diagnosis model of the analog circuit includes:
1) sampling the output response signal to obtain 25 voltage amplitude values, arranging the 25 voltage amplitude values into a matrix in sequence, and solving a characteristic value;
2) establishing a fault detection function according to the relation that the characteristic value changes along with the change of the normalized value of the element parameter,
Zi,j,wfor the values of the fault signature, the index i denotes the ith element, the index j denotes the jth measurement, the index w denotes the w fault signature corresponding to the fault response, xi,jDenotes the normalized parameter value of the ith element at the jth measurement, an,i,w,an-1,i,w,...,a1,i,w,a0,i,wIs a constant;
two fault detection functions built from the spectral radius and the next largest eigenvalue are as follows,
3) the coefficients a of equations (2) and (3) are derived by least squares fitting of 21 spectral radii and 21 next-largest eigenvalues for each devicen,i,w,an-1,i,w,...,a1,i,w,a0,i,wObtaining fault characteristics Z of multiple fault diagnosis devicesi,j,wNormalizing value x with device parameteri,jThe mapping relationship between them.
The fault diagnosis process of the analog circuit comprises the following steps:
1) testing the output response of the circuit under test, calculating the corresponding fault characteristics of the response matrix, Z1Denotes the radius of the spectrum, Z2Represents the next largest eigenvalue;
2) by Z1Instead of Z in equation (2)i,j,1Equations are solved, each equation yielding n solutions.
3) Judging whether the solution of the equation is in the range of the device normalization value, if the solution of the equation is an imaginary number or less than zero, indicating that the solution is not in the range of the device normalization value, and rejecting the solution;
4) replacing x in equation (3) with a solution of equation (2) over a range of device normalization valuesi,jCalculating the corresponding Zi,j,2；
5) Subjecting Z obtained in step 4) toi,j,2With Z calculated in step 1)2Comparing to find Z2The value of the difference between the two is the minimum and is recorded as Zp,j,wThen Z isp,j,wBest matching the fault signature of device p. If Z is calculated in step 4)p,j,wCorresponding to xp,jIf the tolerance range of the device p is exceeded, the device p generates a fault, and the parameter identification result is xp,j。
The circuit shown in fig. 3 is subjected to fault diagnosis by using the algebraic-method-based analog circuit fault diagnosis model of the present embodiment.
The bandpass filter circuit shown in fig. 3 is composed of four filters and an adder, and the parameters of the circuit are shown in the figure, the tolerance limit is +/-5%, the unit of resistance is ohm, the unit of capacitance is farad, and the center frequency of the circuit is 5 kHz. Selecting a node VoutThe output voltage signal is a test object for a test point. The circuit is excited by a sinusoidal voltage signal with the amplitude of 5V and the frequency of 5kHz, parameters of a device in the circuit are simulated by PSPICE tool software in a 3% step change from 70% to 130% of a nominal value, 21 parameter states are simulated, the corresponding 21 output voltage response signal sampling sequences correspond, and the waveform of 21 response signals is depicted in figure 4. 25 element values are taken from each output voltage sampling sequence to generate a 5-order response matrix, and a fault feature is extracted from each response matrix, so that the total number of the fault features is 21. FIG. 5 shows the spectral radii of the 21 response matrices as a function of R4In the case where the normalized value of the parameter(s) is changed by a change, the abscissa represents R4The ordinate represents the spectral radius of the response matrix. As can be seen from FIG. 5, the spectral radius can be represented by R4A higher order polynomial representation of the normalized parameter value representation of:
since here only one device R is tested4And one response corresponds to one fault signature, so fault signature Zg,wBy ZjDenotes, the index j denotes the j-th measurement, xjDenotes the time of j measurement R4Normalized parameter value of an,an-1,...,a1,a0As a constant, can be obtained by applying to the above ZjOf 21 as the device parameter xiLeast squares fit for variables obtained according to an,an-1,...,a1,a0And equation (4), a mapping V [ x ] between the fault characteristics and the device parameters is obtainedi]。
In actual diagnosis, the number of devices to be covered is large, if there are i faulty devices to be diagnosed, each device simulates j parameter states, and each fault response corresponds to w fault characteristics, then the fault diagnosis equation corresponding to one test point can be derived from the equation (4) as follows:
here, the equation coefficient an,i,w,an-1,i,w,...,a1,i,w,a0,i,wIs also as an,an-1,...,a1,a0Similarly, the fault characteristics Z of a plurality of fault devices are diagnosed by pre-test simulationi,j,wNormalizing value x with device parameteri,jThe mapping relation V [ x ] betweeni,j]。
Taking a fault diagnosis equation (5) as a fault diagnosis model, measuring the output response of the tested circuit in the actual diagnosis process to obtain w fault characteristics ZwApplying Z in w pairswSubstituting Z in equation (5)i,j,wAccording to the coefficient a already obtainedn,i,w,an-1,i,w,...,a1,i,w,a0,i,wThe subscript i representing different device numbers is taken as a variable to be sequentially valued, and optimization algorithms such as optimal approximation are adopted, so that the value can be obtained from Z on the coordinate corresponding to the equation (5)i,j,wIn the process of finding and ZwThe best matched w values are used for fault location, and the corresponding x values are usedi,jAnd realizing fault parameter identification. The principle of fault diagnosis of the proposed method is illustrated below, again taking the band-pass filter circuit shown in fig. 3 as the circuit under test. For the convenience of understanding, only one node is selected as a test point (Vo), only the output voltage signal is selected as an output response signal, only two fault characteristics are extracted from one response signal sequence, and only R is selected as a fault device to be diagnosed4And R5Two, i.e. w is 1,2 and i is 1,2 in equation (5). At this time, the 1 st faulty device R to be diagnosed can be selected4The mapping relationship between the fault characteristics and the normalized values of the device parameters is rewritten by equation (5) as:
similarly, the 2 nd faulty device R to be diagnosed5The mapping relationship between the failure characteristics and the normalized values of the device parameters can be described as follows:
the circuit was excited with a sinusoidal voltage signal of amplitude 5V and frequency 5 kHz. In order to enable the output response signal to contain amplitude information and phase difference information of the output voltage, a sampling sequence is obtained by synchronizing sampling time in a rising edge triggering mode of an excitation signal, and the sampling frequency is 125 kHz. Respectively simulating device R by using PSPICE tool software4And R5Is varied in steps of 3% between 70% and 130% of the nominal value, i.e. xi,jAnd j is 1,2, … 21. Each device corresponds to 21 output voltage response signal sampling sequences, 25 sampling values are taken from each output voltage sampling sequence to generate a 5-order square matrix, the spectrum radius and the second big eigenvalue of each square matrix are calculated and shown in table 1, and R is shown in the table4The corresponding 21 spectrum radiuses and 21 second-largest eigenvalues respectively correspond to Z1,j,1And Z1,j,2And R is5The corresponding 21 spectrum radiuses and 21 second-largest eigenvalues respectively correspond to Z2,j,1And Z2,j,2. Fig. 6 depicts the correspondence of these four sets of fault signatures as a function of the variation of the normalized parameter value of the device, with the ordinate representing the spectral radius and the second largest eigenvalue, and the abscissa representing the normalized parameter value of the device. In the figure, the curves L1 and L4 depicted by "+" correspond to the device R5Spectrum radius Z of2,j,1And the second largest eigenvalue Z2,j,2Curves L2 and L3 depicted by "o" correspond to device R4Spectrum radius Z of1,j,1And the second largest eigenvalue Z1,j,2. Thus, each device to be diagnosed corresponds to a fault signature curve pair, curve pair (L2, L3) and device R4Corresponding to (L1, L4) and device R5And (7) corresponding.
Device parameter normalization value x in fault diagnosis equationi,jThe higher the order of the polynomial is, the smaller the difference between the fault characteristics expressed by the equation and the fault characteristics obtained by simulation is, the better the fault diagnosis effect is. As the polynomial order increases, the calculation time is exponentially multiplied, resulting in higher fault diagnosis cost. Therefore, the requirements of fault diagnosis indexes should be comprehensively considered in the polynomial order selection, and the fault coverage rate, the parameter identification precision, the fault positioning accuracy rate and the like are ensuredAnd under the condition that the diagnosis index meets the diagnosis requirement, the test cost is reduced and the online calculation time is shortened as much as possible.
It can be seen from fig. 6 that the failure characteristics vary with device parameter x when the device parameter varies between 70% and 130% of the nominal valuei,jThe change curve of (2) has the characteristic of unidirectional increment or unidirectional decrement and has certain linearity.
Table 1 four sets of extracted fault signatures
The lower order terms of the polynomial have a major influence on equations (6) to (9). So in this example x is selectedi,jThe third order polynomial of (a) illustrates the diagnostic principle.
Thus, the coefficients of equations (6) to (9) can be obtained by performing a least squares fit on the 21 spectral radii and the 21 second largest eigenvalues of each device, respectively, and the coefficients of fitting by taking the three-stage polynomial are shown in table 2.
TABLE 2 derived equation coefficients for least squares fitting
Thus, the device R4The fault diagnosis equations (6) and (7) of (a) take a specific form of a third-order polynomial as follows:
device R5The fault diagnosis equations (10) and (11) of (a) take a specific form of a third-order polynomial as follows:
after the four fault diagnosis equations are obtained, the four equations can be used for fault diagnosis. Firstly, the R is kept unchanged under the condition of the excitation signal used by simulation5Becomes 88% of its nominal value, i.e. device R5Is 0.88, the actual output voltage signal V of the test circuitO. In the test, the output voltage signal is sampled at the sampling frequency of 125kHz in a mode of excitation signal rising edge triggering as in the simulation stage, and an obtained sampling sequence VO(nTs) Where n is 1, 2.., 25, TsIs the sampling period. Handle VO(nTs) The elements of (a) form a 5 th order square matrix, the spectral radius of which is calculated to be 2.2207, and the second largest eigenvalue is 0.7194. By best approximation, a curve pair that best matches a pair of data (2.2207,0.7194) composed of a spectrum radius and a second largest eigenvalue corresponding to the output response of the actual circuit is found from the pairs of maximum spectrum radius and second largest eigenvalue curves (L1, L4) and (L2, L3) corresponding to the two devices shown in fig. 6, and the process of implementation is described below.
Suppose to be a device R5As can be seen from fig. 6, in the fault characteristics extracted from the output response of the fault circuit, the maximum spectral radius corresponds to (0.8817,2.2207) the coordinate point (x, y1) on the curve L1 in the graph, because the spectral radius of 2.2207 and the second largest eigenvalue of 0.7194 correspond to R5A state of a parameter ofTherefore, keeping x constant, finding the corresponding coordinate point (x, y2) on the second largest eigenvalue curve L4 in the graph (0.8817,0.7187), and actually measuring the difference between the second largest eigenvalue 0.7194 obtained by calculation and the second largest eigenvalue 0.7187 at the matching point by 0.0007.
Suppose to be a device R4As can be seen from fig. 6, the maximum spectrum radius 2.2207 corresponds to (1.15,2.2207) at the coordinate point (x1, y1) on the curve L2. Since a spectral radius of 2.2207 and a second largest eigenvalue of 0.7194 corresponds to R4Thus keeping x1 constant, at R4The next largest eigenvalue point (x1, y3) corresponding to x1 is found on the next largest eigenvalue curve L3 (0.88, 0.8124). At this point, the corresponding next largest eigenvalue 0.8124 differs from the next largest eigenvalue 0.7194 calculated from actual testing by 0.093.
Thus, the spectrum radius and the next largest eigenvalue and R of the fault circuit can be judged by the minimum error criterion5Is most closely matched with the fault signature curve pair (L1, L4), R can be diagnosed5If the fault occurs, the matched device parameter value x is 0.8817 and the tolerance upper limit corresponding to the device nominal value is compared to know that the device parameter is out of the tolerance range, so the device R5When a fault occurs, the identification result of the normalized value of the parameter of the fault device is x which is 0.8817, and the difference of x and the actual result is 0.88 and is 0.17 percent, so that the identification precision is high.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (3)
1. An algebraic method-based analog circuit fault diagnosis method is characterized by comprising the following steps of:
a. acquiring information from a measurement object by using an automatic test system to obtain fault characteristics, sampling a measured signal by adopting phase synchronization, and acquiring voltage amplitude information and voltage phase information;
b. normalizing the parameters of the device to be tested;
c. acquiring a function relation corresponding to the measured value and the parameter state according to the limited parameter states and the corresponding limited measured values by using a least square fitting method, and establishing a function of the measured value and the parameter state in the analog circuit fault diagnosis model;
d. establishing a fault diagnosis model by using a mapping relation that the fault characteristics of a tested circuit change along with the change of device parameters, extracting the fault characteristics by using an algebraic method, changing the fault diagnosis problem of an analog circuit into an algebraic analysis problem, and realizing fault parameter identification, fault detection and fault positioning through the mapping relation between a fault characteristic value and the device parameters;
establishing a fault diagnosis model of the analog circuit:
1) sampling the output response signal to obtain 25 voltage amplitude values, arranging the 25 voltage amplitude values into a matrix in sequence, and solving a characteristic value;
2) establishing a fault detection function according to the relation that the characteristic value changes along with the change of the normalized value of the element parameter,
Zi,j,wfor the values of the fault signature, the index i denotes the ith element, the index j denotes the jth measurement, the index w denotes the w fault signature corresponding to the fault response, xi,jDenotes the normalized parameter value of the ith element at the jth measurement, an,i,w,an-1,i,w,...,a1,i,w,a0,i,wIs a constant;
two fault detection functions built from the spectral radius and the next largest eigenvalue are as follows,
3) the coefficients a of equations (2) and (3) are derived by least squares fitting of 21 spectral radii and 21 next-largest eigenvalues for each devicen,i,w,an-1,i,w,...,a1,i,w,a0,i,wObtaining fault characteristics Z of multiple fault diagnosis devicesi,j,wNormalizing value x with device parameteri,jThe mapping relationship between them.
2. The analog circuit failure diagnosis method according to claim 1,
the steps of the fault diagnosis process of the analog circuit are as follows,
1) testing the output response of the circuit under test, calculating the corresponding fault characteristics of the response matrix, Z1Denotes the radius of the spectrum, Z2Represents the next largest eigenvalue;
2) by Z1Instead of Z in equation (2)i,j,1Solving equations, wherein each equation obtains n solutions;
3) judging whether the solution of the equation is in the range of the device normalization value, if the solution of the equation is an imaginary number or less than zero, indicating that the solution is not in the range of the device normalization value, and rejecting the solution;
4) replacing x in equation (3) with a solution of equation (2) over a range of device normalization valuesi,jCalculating the corresponding Zi,j,2；
5) Subjecting Z obtained in step 4) toi,j,2With Z calculated in step 1)2Comparing to find Z2The value of the difference between the two is the minimum and is recorded as Zp,j,wThen Z isp,j,wBest matching the fault signature curve of device p; if Z is calculated in step 4)p,j,wCorresponding to xp,jIf the tolerance range of the device p is exceeded, the device p generates a fault, and the parameter identification result is xp,j。
3. The analog circuit fault diagnosis method according to claim 1 or 2, wherein in the step d, a linear compensation method is adopted to reduce the deviation of the fault characteristic curve caused by the existence of tolerance in the device parameters relative to the fault characteristic curve without tolerance influence.
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