CN110996499A - 一种印制电路板（pcb）高速信号的过孔走线结构 - Google Patents

一种印制电路板（pcb）高速信号的过孔走线结构 Download PDF

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CN110996499A
CN110996499A CN201911377905.XA CN201911377905A CN110996499A CN 110996499 A CN110996499 A CN 110996499A CN 201911377905 A CN201911377905 A CN 201911377905A CN 110996499 A CN110996499 A CN 110996499A
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signal
speed
routing
via hole
pcb
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陈吉锋
蒋粉
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Shanghai Baoding Technology Service Co Ltd
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Shanghai Baoding Technology Service Co Ltd
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Priority to CN201911377905.XA priority Critical patent/CN110996499A/zh
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0245—Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

本发明公开了一种印制电路板(PCB)高速信号过孔走线结构。其中该种结构主要使用长方形的铜皮禁布区，来为差分过孔走线减少过孔的寄生电容，同时使用长方形两端或者两侧的参考地过孔来进行高速信号回流。明显减少了PCB高速差分信号过孔走线对其他信号走线的影响，同时明显增加了PCB高速差分走线的高速信号传输性能。通过实验发现，此种方法可以让常规PCB板厚(1.6mm)的高速过孔信号(1GHz～40GHz)取得(0.01db～0.1db随着信号频率增加，信号的插损变大)插损，同时保持‑15db以下的回损控制。可以非常好的适配现有主流高速信号走线对于过孔性能的要求。同时该方法可以非常好的减少高速走线对其他走线信号参考地的破坏，适配主流的芯片高速信号扇出结构。

Description

一种印制电路板(PCB)高速信号的过孔走线结构
技术领域
本发明属于电子电路PCB布线技术领域，具体涉及PCB高速过孔走线的方法，在PCB高速差分走线(1GHz～40GHz)和射频PCB走线中进行应用。
背景技术
随着电子电路的发展，PCB高速差分走线的速率不断提高，现在主流通信背板的速率都在30Gbps左右，这对高速的PCB差分走线提出了非常高的要求。而在PCB走线中，最为关键的便是PCB的过孔走线问题。因为过孔没有完整的地参考，容易引起阻抗失配，而过孔周围的地铜皮则会增加过孔的寄生电容，引起过孔在高频区域的性能劣化。目前主流的处理方法是利用过孔自身的反焊盘进行参考地规避，但是圆形反焊盘会严重影响PCB芯片和接插件区域的走线扇出。同时由于圆形规避带来的不规则图形，会严重影响仿真速度，所以需要一种新的方法来改善过孔的走线性能。
发明内容
本发明针对现有的PCB高速差分走线问题，对差分走线的过孔进行了方法学上的优化。此种方法可以保障差分走线的芯片扇出空间，同时可以在缺少仿真的情况下，大概率保障差分走线的高速性能。还能为仿真提出优化的方法，提高仿真的收敛速度。
本发明的实施具体步骤为
1.确定高速差分走线，一般我们认为需要进行高速差分走线的需求为1GHz以上，当然在对性能有非常高的要求的板子上，也需要对走线的过孔进行特别优化。
2.明确其他走线的扇出方向，长方形挖空的方向一般与其他信号走线的扇出方向相同。长方形的宽可以紧贴过孔的边缘，这样就可以增加其他走线的空间。
3.确定长方形两端的地过孔间距，如果两端没有地孔，则在过孔外侧10mm处或者根据条件(管脚规避和走线空间)设计地过孔，应该确保地过孔对所有的地层进行良好的连接。
4.对2，3所确定的空间进行挖空处理，挖空的处理需要做到PCB所有层做到净空，不应该出现地，电源和信号的铜皮或者走线。这样可以保障过孔对地的寄生电容做到最小，同时地孔可以为信号过孔提供信号回流，达到最好的阻抗匹配。
5.在应用发明以后，可以从仿真和实测上明确发现信号的改善。可以在5G～30G内达到理想的回损和插损，测试得到如下结果让常规PCB板厚(1.6mm)的高速过孔信号(1GHz～40GHz)取得(0.01db～0.1db随着信号频率增加，信号的插损变大)插损。
附图说明
图1.长方形挖空结构，左图为透视图，右图为挖空示意。(该为摘要附图)
图2.长方形挖空示意，左图为立体图，右图为侧视图。
图3.挖空效果测试图，左图为插损，右图为回损。

Claims (3)

1.一种印制电路板(PCB)高速信号过孔走线结构，其特征在于：1.使用长方形对过孔走线周围地参考进行挖空，区别于传统的圆形反焊盘设计。2.长方形挖空附近可以为其他走线提供更多的走线通道。3.在长方形两端或者在长方形侧边需要提供2个或者更多地孔来进行信号回流，来提供稳定的阻抗和信号屏蔽。
2.所述的长方形挖空，为距离差分过孔两侧1mm～30mm，挖空区域内不能有地走线，地铜皮或者电源走线，电源铜皮。长方形挖空根据差分对过孔进行设置，需要尽量考虑回避其他信号走线，以免对其他信号走线产生干扰。在长方形两侧或者两端提供的地过孔需要为差分走线提供最好的信号回流，位置为长方形挖空外侧的0mm～10mm。
3.根据权利要求1.需要先确定需要优化的高速差分走线对，在差分走线对上需要进行过孔换层的地方，进行长方形挖空设计。设计的时候，先明确差分过孔可能的地孔位置，明确回流的过孔，在地回流过孔的内侧0mm～10mm范围内，进行挖空设计，挖空需要考虑其他信号走线的位置，为其他信号走线留出走线空间。
CN201911377905.XA 2019-12-27 2019-12-27 一种印制电路板（pcb）高速信号的过孔走线结构 Withdrawn CN110996499A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113133186A (zh) * 2021-04-15 2021-07-16 山东英信计算机技术有限公司 一种基于PCIe 5.0协议的高密连接器PCB结构

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US20080121421A1 (en) * 2006-11-24 2008-05-29 Nec Corporation Printed circuit board
WO2009144829A1 (en) * 2008-05-26 2009-12-03 Nec Corporation Multilayer substrate
US20120125679A1 (en) * 2010-11-23 2012-05-24 Hon Hai Precision Industry Co., Ltd. Printed circuit board having differential vias
US20140326495A1 (en) * 2011-08-25 2014-11-06 Amphenol Corporation High performance printed circuit board
CN109076700A (zh) * 2016-03-08 2018-12-21 安费诺公司 用于高速、高密度电连接器的背板封装部
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* Cited by examiner, † Cited by third party
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CN113133186A (zh) * 2021-04-15 2021-07-16 山东英信计算机技术有限公司 一种基于PCIe 5.0协议的高密连接器PCB结构

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Application publication date: 20200410