CN110994727B - Battery management circuit and method thereof - Google Patents

Battery management circuit and method thereof Download PDF

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Publication number
CN110994727B
CN110994727B CN201911303610.8A CN201911303610A CN110994727B CN 110994727 B CN110994727 B CN 110994727B CN 201911303610 A CN201911303610 A CN 201911303610A CN 110994727 B CN110994727 B CN 110994727B
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China
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circuit
sub
main control
battery pack
mos tube
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CN201911303610.8A
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Chinese (zh)
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CN110994727A (en
Inventor
梅志刚
刘忠群
张艳春
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Dongguan Dehe Technology Co ltd
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Dongguan Laima Electronic Technology Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/44—Methods for charging or discharging
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0068—Battery or charger load switching, e.g. concurrent charging and load supply
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4278—Systems for data transfer from batteries, e.g. transfer of battery parameters to a controller, data transferred between battery controller and main controller
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Secondary Cells (AREA)

Abstract

The invention relates to a battery management circuit and a method thereof, comprising a main control circuit, a signal receiving circuit, a voltage detection circuit and a switching circuit; a battery management method is applied to a battery management circuit and comprises the following steps: the main control circuit obtains an external signal from the signal receiving circuit and judges whether the external signal is a set trigger signal, if so, the voltage detection circuit and the switching circuit are controlled to be started, the voltage detection circuit detects the voltage value of the battery pack, and when the detected voltage value is lower than the lowest value of a rated starting voltage range, the battery pack is controlled to be charged only and not discharged; when the voltage value is detected to be higher than the highest value of the rated starting voltage range, the battery pack is controlled to only discharge and not to be charged; detecting that the voltage value is within a rated starting voltage range, and controlling the battery pack to be charged and discharged simultaneously; whole process automation degree is higher, replaces the manual work to press mechanical switch, and easy operation need not manual operation, reduces the dismouting cost, and intelligent degree is higher, does not damage the group battery, prolongs the life of group battery.

Description

Battery management circuit and method thereof
Technical Field
The present invention relates to the field of battery technologies, and in particular, to a battery management circuit and a method thereof.
Background
The battery pack of the existing battery pack is generally awakened by a mechanical switch, and the operation mode is as follows: when the battery pack is dormant, the battery pack needs to be detached from the host (or additionally connected with a wire) and then the wake-up switch needs to be pressed, so that the operation is troublesome and can be finished by professional personnel. If press and awaken the switch after, because do not detect the group battery voltage condition of battery package, just directly awaken the charge-discharge function of battery package, lead to easily damaging the battery package, then shorten the life of battery package. In addition, the current battery pack can not detect the working condition of the host machine, so that the battery is easy to be damaged due to power shortage after being placed for a long time.
Therefore, in the present patent application, the applicant has studied a battery management circuit and a method thereof elaborately to solve the above problems.
Disclosure of Invention
The invention aims at the defects of the prior art, and mainly aims to provide a battery management circuit and a method thereof, wherein the automation degree of the whole awakening process is higher, a mechanical switch is replaced by manual pressing, the operation is simple, manual operation is not needed, the additional increase of external leads is avoided, the disassembly and assembly cost is reduced, the intelligence degree is higher, the battery pack is not damaged, and the service life of the battery pack is prolonged.
In order to achieve the purpose, the invention adopts the following technical scheme:
a battery management circuit comprises a main control circuit, a signal receiving circuit for receiving external signals, a voltage detection circuit for detecting the voltage of a battery pack and a switching circuit for controlling the charging and discharging states of the battery pack;
the signal receiving circuit is connected with the main control circuit, and the main control circuit is respectively connected with the voltage detection circuit and the switching circuit;
when the signal receiving circuit receives an external signal, the signal receiving circuit sends the external signal to the main control circuit, the main control circuit receives and judges whether the external signal is a correct trigger signal,
if the external signal is a correct trigger signal, the main control circuit drives the voltage detection circuit to detect whether the voltage value of the battery pack is within a rated starting voltage range;
if the voltage value of the battery pack is detected to be within the rated starting voltage range, the main control circuit drives the switching circuit to wake up the charging and discharging function of the battery pack;
if the voltage value of the battery pack is detected to be lower than the lowest value of the rated starting voltage range, the main control circuit drives the switching circuit to wake up the charging-only but not discharging function of the battery pack;
if the voltage value of the battery pack is detected to be higher than the highest value of the rated starting voltage range, the main control circuit drives the switching circuit to wake up the discharging-only but not charging function of the battery pack.
Preferably, the signal receiving circuit is a sensor detection circuit.
Preferably, the sensor detection circuit comprises an acceleration sensor detection circuit, and the acceleration sensor detection circuit comprises an acceleration sensor chip U3, a capacitor C10, a resistor R14, a resistor R15 and a resistor R61;
the acceleration sensor chip U3 has detection pin 1 to detection pin 12, and the main control circuit connects detection pin 1 and detection pin 12 respectively, detects pin 1 and connects in the one end of resistance R61 through resistance R15, detects pin 12 and connects in the one end of resistance R61 through resistance R14, and the main control circuit is connected to the one end of resistance R61, and detection pin 7 is connected to the other end of resistance R61, and detection pin 7 connects the analog ground through electric capacity C10, and detection pin 9 connects the analog ground.
As a preferred scheme, the voltage detection circuit includes a first sub-circuit, a second sub-circuit, a third sub-circuit and a fourth sub-circuit, the first sub-circuit is connected to the second sub-circuit, the second sub-circuit is connected to the third sub-circuit and the fourth sub-circuit, the third sub-circuit is connected to the fourth sub-circuit, and the main control circuit is respectively connected to the first sub-circuit, the second sub-circuit, the third sub-circuit and the fourth sub-circuit;
the first sub circuit, the second sub circuit, the third sub circuit and the fourth sub circuit respectively comprise a first MOS (metal oxide semiconductor) tube and a first polarity capacitor;
the first MOS tube of the first subcircuit is provided with a source electrode used for being connected with the positive electrode output end of the battery pack, the source electrode of the first MOS tube of the first subcircuit is connected with the source electrode of the first MOS tube of the second subcircuit through a first capacitor of the first subcircuit, the source electrode of the first MOS tube of the second subcircuit is connected with the source electrode of the first MOS tube of the third subcircuit through a first capacitor of the second subcircuit, the source electrode of the first MOS tube of the third subcircuit is connected with the source electrode of the first MOS tube of the fourth subcircuit through a first capacitor of the third subcircuit, and the source electrode of the first MOS tube of the fourth subcircuit is grounded through a first capacitor of the fourth subcircuit;
the drain electrodes of the first MOS tubes of the first sub-circuit, the second sub-circuit, the third sub-circuit and the fourth sub-circuit are all connected with a main control circuit;
the grid electrode of the first MOS tube of the first sub-circuit and the grid electrode of the first MOS tube of the third sub-circuit are both connected with the grid electrode of the first MOS tube of the fourth sub-circuit, and the grid electrode of the first MOS tube of the fourth sub-circuit is also connected with the drain electrode of the second MOS tube of the fourth sub-circuit;
the grid electrode of the second MOS tube of the first sub-circuit and the grid electrode of the second MOS tube of the fourth sub-circuit are both connected with the main control circuit, and the source electrode of the second MOS tube of the first sub-circuit and the source electrode of the second MOS tube of the fourth sub-circuit are both connected with analog ground.
As a preferred scheme, the switching circuit includes a charging switch circuit and a discharging switch circuit, the charging switch circuit has a first signal receiving terminal, a first connection terminal and a second connection terminal for connecting the negative electrode of the battery pack, the discharging switch circuit has a second signal receiving terminal, a third connection terminal and a negative electrode output terminal for connecting the electric device, the first signal receiving terminal and the second signal receiving terminal are both connected to the main control circuit, the first connection terminal is connected to the third connection terminal, the second connection terminal is connected to the analog ground, and the negative electrode output terminal is connected to the signal ground.
As a preferred scheme, the charging switch circuit includes at least one third MOS transistor, a gate of the third MOS transistor is a first signal receiving terminal, a drain of the third MOS transistor is a second connection terminal, and a source of the third MOS transistor is a first connection terminal.
As a preferred scheme, the discharge switch circuit includes at least one fifth MOS transistor, a gate of the fifth MOS transistor is a second signal receiving terminal, a drain of the fifth MOS transistor is a negative output terminal, and a source of the fifth MOS transistor is a third connection terminal.
As a preferred scheme, the switching circuit further includes a first driving circuit and a second driving circuit, the first driving circuit and the second driving circuit both include a seventh MOS transistor and a driving chip, the driving chip has driving pins 1 to 6, the driving pin 4 and the driving pin 6 of the first driving circuit are both connected to the first signal receiving terminal, the driving pin 4 and the driving pin 6 of the second driving circuit are both connected to the second signal receiving terminal, the gate of the seventh MOS transistor is connected to the main control circuit, the driving pin 1 and the driving pin 3 are both connected to the drain of the seventh MOS transistor, and the source of the seventh MOS transistor is grounded.
Preferably, the signal receiving circuit comprises a wireless communication circuit.
A battery management method applied to the battery management circuit of any one of the preceding claims 1 to 9, the battery management method comprising:
the main control circuit acquires an external signal from the signal receiving circuit and analyzes the external signal and a set trigger signal;
when the main control circuit judges that the external signal is a non-trigger signal, the main control circuit controls the voltage detection circuit and the switching circuit to enter a sleep mode;
when the main control circuit judges that the external signal is a trigger signal, the main control circuit controls the voltage detection circuit and the switching circuit to start, and the voltage detection circuit detects the voltage value of the battery pack at the moment;
when the voltage value of the battery pack is detected to be within the rated starting voltage range, the main control circuit drives the switching circuit to control the battery pack to enter two states of charging and discharging simultaneously;
when the voltage value of the battery pack is detected to be lower than the lowest value of the rated starting voltage range, the main control circuit drives the switching circuit to control the battery pack to enter a charging state and close a discharging state;
when the voltage value of the battery pack is detected to be higher than the highest value of the rated starting voltage range, the main control circuit drives the switching circuit to control the battery pack to enter a discharging state and close the charging state;
when the main control circuit fails to obtain an external signal from the signal receiving circuit, the signal receiving circuit is in an intermittent working state, the main control circuit controls the voltage detection circuit to enter a dormant state, meanwhile, the main control circuit controls the driving switching circuit to control the battery pack to stop charging and discharging states, and the main control circuit also enters a dormant mode.
Compared with the prior art, the invention has obvious advantages and beneficial effects, particularly: the battery pack awakening method mainly comprises the steps of receiving an external signal, judging whether the external signal is correctly triggered, starting voltage detection and switching the charging and discharging states of the battery pack, has high automation degree in the whole awakening process, replaces manual pressing of a mechanical switch, is simple to operate, does not need manual operation, avoids additional external leads, reduces the disassembly and assembly cost, and particularly has high intelligence degree by detecting the voltage of the battery pack and awakening the corresponding function of the battery pack, does not damage the battery pack and prolongs the service life of the battery pack;
secondly, man-machine interaction is realized through the wireless communication circuit, particularly, the battery pack of the battery pack can be controlled to enter dormancy in real time, power consumption is reduced, the battery pack can be placed for a long time without power loss, and meanwhile, various information of the battery pack can be read in real time through the wireless communication circuit;
and the whole circuit structure is ingenious and reasonable in design, and stability and reliability in the awakening process are ensured.
Drawings
FIG. 1 is a general control block diagram of an embodiment of the present invention;
FIG. 2 is a circuit schematic of an embodiment of the present invention;
the reference numbers illustrate:
10. master control circuit
20. Signal receiving circuit
21. Sensor detection circuit 22 and wireless communication circuit
30. Voltage detection circuit
31. First branch circuit 32 and second branch circuit
33. Third sub-circuit 34 and fourth sub-circuit
40. Switching circuit
41. Charging switch circuit 42 and discharging switch circuit
421. Negative electrode output end 422 and positive electrode output end
43. First drive circuit 44 and second drive circuit
50. A battery pack.
Detailed Description
The invention is further described with reference to the following detailed description and accompanying drawings.
As shown in fig. 1 and 2, a battery management circuit for a battery pack 50 of a battery pack, particularly a battery pack 50 for an electric vehicle, a starting battery pack 50 for an automobile and a motorcycle, a power supply battery pack 50 for an electric power tool, and the like. A battery management circuit comprises a main control circuit 10, a signal receiving circuit 20 for receiving external signals, a voltage detection circuit 30 for detecting the voltage of a battery pack 50 and a switching circuit 40 for controlling the charging and discharging states of the battery pack 50;
the signal receiving circuit 20 is connected to the main control circuit 10, and the main control circuit 10 is respectively connected to the voltage detection circuit 30 and the switching circuit 40;
when the signal receiving circuit 20 receives an external signal, the signal receiving circuit 20 sends the external signal to the main control circuit 10, the main control circuit 10 receives and judges whether the external signal is a correct trigger signal,
if the external signal is a correct trigger signal, the main control circuit 10 drives the voltage detection circuit 30 to detect whether the voltage value of the battery pack 50 is within the rated starting voltage range;
if the voltage value of the battery pack 50 is detected to be within the rated starting voltage range, the main control circuit 10 drives the switching circuit 40 to wake up the charging and discharging functions of the battery pack 50, and if the voltage value of the battery pack 50 is detected to be lower than the lowest value of the rated starting voltage range, the main control circuit 10 drives the switching circuit 40 to wake up only the charging and discharging functions of the battery pack; if it is detected that the voltage value of the battery pack 50 is higher than the highest value of the rated starting voltage range, the main control circuit 10 drives the switching circuit 40 to wake up the discharging-only but not charging function of the battery pack 50.
The signal receiving circuit 20 is a sensor detecting circuit 21, preferably, the sensor detecting circuit 21 includes an acceleration sensor detecting circuit, and of course, the sensor detecting circuit 21 may also be a gravity sensor detecting circuit, a pressure sensor detecting circuit, a vibration sensor detecting circuit, a reed switch sensor detecting circuit, and the like, without limitation, a sensor is used to replace a mechanical switch, the sensor detects a signal and sends the signal to the main control circuit 10 for judgment, and the external signal may be a corresponding shaking signal or a vibration signal. When the signal disappears, the main control circuit 10 can control the battery pack 50 of the battery pack to sleep, so as to reduce power consumption, so that the battery pack 50 of the battery pack can be placed for a long time, and meanwhile, the mobile terminal can also control the battery pack to wake up or sleep in a Bluetooth mode, and the relevant information of the battery pack 50 of the battery pack can be read.
In this embodiment, the main control circuit 10 includes a main control chip U2, the main control chip U2 has main control pins 1 to 28, and the main control pin 25 is connected with a status indicator LED 1. The acceleration sensor detection circuit comprises an acceleration sensor chip U3, a capacitor C10, a resistor R14, a resistor R15 and a resistor R61;
the acceleration sensor chip U3 has detection pins 1 to 12, and the main control circuit 10 is connected to the detection pins 1 and 12, specifically, the main control pin 23 is connected to the detection pin 1, and the main control pin 22 is connected to the detection pin 12.
The detection pin 1 is connected to one end of a resistor R61 through a resistor R15, the detection pin 12 is connected to one end of a resistor R61 through a resistor R14, one end of the resistor R61 is connected to a main control pin 24 of the main control circuit 10, the other end of the resistor R61 is connected to the detection pin 7, the detection pin 7 is connected to an analog ground through a capacitor C10, and the detection pin 9 is connected to the analog ground.
Of course, the signal receiving circuit 20 further includes a wireless communication circuit 22, the wireless communication circuit 22 may be a bluetooth communication circuit, a wifi communication circuit, or the like, and may transmit a wake-up signal through the mobile terminal, and after receiving the wake-up signal, the wireless communication circuit 22 sends the wake-up signal to the main control circuit 10.
In this embodiment, the voltage detection circuit 30 includes a first sub-circuit 31, a second sub-circuit 32, a third sub-circuit 33, and a fourth sub-circuit 34, the first sub-circuit 31 is connected to the second sub-circuit 32, the second sub-circuit 32 is connected to the third sub-circuit 33 and the fourth sub-circuit 34, the third sub-circuit 33 is connected to the fourth sub-circuit 34, and the main control circuit 10 is connected to the first sub-circuit 31, the second sub-circuit 32, the third sub-circuit 33, and the fourth sub-circuit 34;
the first subcircuit 31, the second subcircuit 32, the third subcircuit 33 and the fourth subcircuit 34 all comprise a first MOS transistor and a first polarity capacitor;
the first MOS transistor of the first sub-circuit 31 has a source for connecting to the 422 positive output terminal of the battery pack 50, the source of the first MOS transistor of the first sub-circuit 31 is connected to the source of the first MOS transistor of the second sub-circuit 32 through the first capacitor of the first sub-circuit 31, the source of the first MOS transistor of the second sub-circuit 32 is connected to the source of the first MOS transistor of the third sub-circuit 33 through the first capacitor of the second sub-circuit 32, the source of the first MOS transistor of the third sub-circuit 33 is connected to the source of the first MOS transistor of the fourth sub-circuit 34 through the first capacitor of the third sub-circuit 33, and the source of the first MOS transistor of the fourth sub-circuit 34 is grounded through the first capacitor of the fourth sub-circuit 34;
the drains of the first MOS transistors of the first subcircuit 31, the second subcircuit 32, the third subcircuit 33 and the fourth subcircuit 34 are all connected with the main control circuit 10; in this embodiment, the first MOS transistor and the first polarity capacitor of the first sub-circuit 31 are respectively defined as a first MOS transistor Q1 and a first polarity capacitor CL4, a drain of the first MOS transistor Q1 is connected to the main control pin 12, the main control pin 12 is further connected to the analog ground through a resistor R4, two ends of the resistor R4 are connected in parallel to a capacitor C4, and a gate of the first MOS transistor Q1 is connected to an anode of the first polarity capacitor CL 4;
the first MOS transistor and the first polarity capacitor of the second sub-circuit 32 are respectively defined as a first MOS transistor Q3 and a first polarity capacitor CL3, the drain of the first MOS transistor Q3 is connected to the main control pin 11, the main control pin 11 is further connected to the analog ground through a resistor R13, two ends of the resistor R13 are connected in parallel with a capacitor C7, and the gate of the first MOS transistor Q3 is connected to the positive electrode of the first polarity capacitor CL 43;
the first MOS transistor and the first polarity capacitor of the third shunting circuit 33 are respectively defined as a first MOS transistor Q4 and a first polarity capacitor CL2, the drain of the first MOS transistor Q4 is connected to the main control pin 10, the main control pin 10 is further connected to the analog ground through a resistor R19, two ends of the resistor R19 are connected in parallel with a capacitor C11, and the gate of the first MOS transistor Q4 is connected to the positive electrode of the first polarity capacitor CL 2;
the first MOS transistor and the first polarity capacitor of the fourth circuit 34 are respectively defined as a first MOS transistor Q5 and a first polarity capacitor CL1, the drain of the first MOS transistor Q5 is connected to the main control pin 9, the main control pin 9 is further connected to the analog ground through a resistor R26, two ends of the resistor R26 are connected in parallel to a capacitor C13, and the gate of the first MOS transistor Q5 is connected to the anode of the first polarity capacitor CL 1.
The first subcircuit 31 and the fourth subcircuit 34 further include a second MOS transistor, a gate of the first MOS transistor of the first subcircuit 31 is connected to a drain of the second MOS transistor of the first subcircuit 31, a gate of the first MOS transistor of the second subcircuit 32 and a gate of the first MOS transistor of the third subcircuit 33 are both connected to a gate of the first MOS transistor of the fourth subcircuit 34, and a gate of the first MOS transistor of the fourth subcircuit 34 is further connected to a drain of the second MOS transistor of the fourth subcircuit 34;
the grid electrode of the second MOS transistor of the first sub-circuit 31 and the grid electrode of the second MOS transistor of the fourth sub-circuit 34 are both connected to the main control circuit 10, and the source electrode of the second MOS transistor of the first sub-circuit 31 and the source electrode of the second MOS transistor of the fourth sub-circuit 34 are both connected to analog ground. In this embodiment, the second MOS transistor of the first sub-circuit 31 is defined as a second MOS transistor Q2, and the second MOS transistor of the fourth sub-circuit 34 is defined as a second MOS transistor Q7.
The switching circuit 40 includes a charging switch circuit 41, a discharging switch circuit 42, a first driving circuit 43 and a second driving circuit 44, the charging switch circuit 41 has a first signal receiving terminal, a first connection terminal and a second connection terminal for connecting the negative electrode of the battery pack 50, the discharging switch circuit 42 has a second signal receiving terminal, a third connection terminal and a negative electrode output terminal 421 for connecting the electric device, the first signal receiving terminal and the second signal receiving terminal are both connected to the main control circuit 10 through the following corresponding driving circuits, the first connection terminal is connected to the third connection terminal, the second connection terminal is connected to the analog ground, and the negative electrode output terminal 421 is connected to the signal ground;
the charging switch circuit 41 includes a resistor R40, a resistor R58, a resistor R47, a resistor R57, and at least one third MOS transistor, wherein a gate of the third MOS transistor is a first signal receiving terminal, a drain of the third MOS transistor is a second connection terminal, and a source of the third MOS transistor is a first connection terminal. In this embodiment, the charging switch circuit 41 further includes four parallel fourth MOS transistors, the third MOS transistor is four parallel third MOS transistors, the four parallel third MOS transistors are respectively defined as a third MOS transistor Q10, a third MOS transistor Q11, a third MOS transistor Q12 and a third MOS transistor Q13, and the four parallel fourth MOS transistors are respectively defined as a fourth MOS transistor Q14, a fourth MOS transistor Q15, a fourth MOS transistor Q16 and a fourth MOS transistor Q17;
the grid electrode of each third MOS tube is connected with one end of a resistor R40, the grid electrode of each fourth MOS tube is connected with one end of a resistor R47, and the other end of the resistor R40 and the other end of the resistor R47 are connected to form a first signal receiving end; the drain electrode of each third MOS tube and the drain electrode of each fourth MOS tube are connected together to form a second connecting end; the source electrode of each third MOS tube and the source electrode of each fourth MOS tube are connected together to form a first connection end;
the source of the last parallel third MOS transistor (i.e., the third MOS transistor Q13) is connected to the gate of the last parallel third MOS transistor (i.e., the third MOS transistor Q13) through a resistor R58, and the source of the last parallel fourth MOS transistor (i.e., the fourth MOS transistor Q17) is connected to the gate of the last parallel fourth MOS transistor (i.e., the fourth MOS transistor Q17) through a resistor R57.
The discharge switch circuit 42 includes a resistor R39, a resistor R48, a resistor R59, a resistor R60, and at least one fifth MOS transistor, a gate of the fifth MOS transistor is a second signal receiving terminal, a drain of the fifth MOS transistor is a negative output terminal, and a source of the fifth MOS transistor is a third connection terminal. In this embodiment, the discharge switch circuit 42 further includes four parallel sixth MOS transistors, the fifth MOS transistor is four parallel fifth MOS transistors, the four parallel fifth MOS transistors are respectively defined as a fifth MOS transistor Q18, a fifth MOS transistor Q19, a fifth MOS transistor Q20 and a fifth MOS transistor Q21, and the four parallel sixth MOS transistors are respectively defined as a sixth MOS transistor Q22, a sixth MOS transistor Q23, a sixth MOS transistor Q24 and a sixth MOS transistor Q25;
the grid electrode of each fifth MOS tube is connected with one end of a resistor R48, the grid electrode of each sixth MOS tube is connected with one end of a resistor R39, and the other end of the resistor R48 and the other end of the resistor R39 are connected to form a second signal receiving end; the drain electrode of each fifth MOS transistor and the drain electrode of each sixth MOS transistor are connected together to form a negative output end 421; the source electrode of each fifth MOS tube and the source electrode of each sixth MOS tube are connected together to form a third connecting end;
the source of the first fifth MOS transistor (i.e., the fifth MOS transistor Q18) is connected to the gate of the first fifth MOS transistor (i.e., the fifth MOS transistor Q18) through the resistor R59, and the source of the first sixth MOS transistor (i.e., the sixth MOS transistor Q22) is connected to the gate of the first sixth MOS transistor (i.e., the sixth MOS transistor Q22) through the resistor R60.
The first driving circuit 43 and the second driving circuit 44 both comprise a seventh MOS transistor and a driving chip, the driving chip has driving pins 1 to 6, the driving pin 4 and the driving pin 6 of the first driving circuit 43 are both connected to the first signal receiving terminal, the driving pin 4 and the driving pin 6 of the second driving circuit 44 are both connected to the second signal receiving terminal, the gate of the seventh MOS transistor is connected to the main control circuit 10, the driving pin 1 and the driving pin 3 are both connected to the drain of the seventh MOS transistor, and the source of the seventh MOS transistor is grounded;
as shown in fig. 2, in the present embodiment, the seventh MOS transistor of the first driving circuit 43 and the driving chip are respectively defined as a seventh MOS transistor Q9, the driving pin 6 of the driving chip U4 is connected to the first signal receiving terminal through a resistor R31, the driving pin 4 of the driving chip U4 is connected to the first signal receiving terminal through a resistor R36, and the gate of the seventh MOS transistor Q9 is connected to the main control pin 16 of the main control circuit 10 through a resistor R37 for receiving the control signal of the main control circuit 10; a driving pin 1 and a driving pin 3 of the driving chip U4 are both connected with the drain electrode of the seventh MOS transistor Q9;
the seventh MOS transistor and the driving chip of the second driving circuit 44 are respectively defined as a seventh MOS transistor Q8, the driving pin 6 of the driving chip U5 is connected to the second signal receiving terminal through a resistor R30, the driving pin 4 of the driving chip U5 is connected to the second signal receiving terminal through a resistor R34, and the gate of the seventh MOS transistor Q8 is connected to the main control pin 17 of the main control circuit 10 through a resistor R38 to receive the control signal of the main control circuit 10; a driving pin 1 and a driving pin 3 of the driving chip U5 are both connected with the drain electrode of the seventh MOS transistor Q8;
the driving pin 2 of the driving chip U4 is connected to the driving pin 2 of the driving chip U5, and the driving pin 5 of the driving chip U4 is connected to the driving pin 5 of the driving chip U5.
A battery management method is applied to the battery management circuit, and comprises the following steps:
the main control circuit 10 obtains an external signal from the signal receiving circuit 20, and analyzes the external signal and the set trigger signal;
when the main control circuit 10 determines that the external signal is a non-trigger signal, the main control circuit 10 controls the voltage detection circuit 30 and the switching circuit 40 to enter a sleep mode;
when the main control circuit 10 determines that the external signal is the trigger signal, the main control circuit 10 controls the voltage detection circuit 30 and the switching circuit 40 to start, and the voltage detection circuit 30 detects the voltage value of the battery pack 50 at this time;
when the voltage value of the battery pack 50 is detected to be within the rated starting voltage range, the main control circuit 10 drives the switching circuit 40 to control the battery pack 50 to enter two states of charging and discharging simultaneously;
when detecting that the voltage value of the battery pack 50 is lower than the lowest value of the rated starting voltage range, the main control circuit 10 drives the switching circuit 40 to control the battery pack 50 to enter a charging state and close a discharging state;
when detecting that the voltage value of the battery pack 50 is higher than the highest value of the rated starting voltage range, the main control circuit 10 drives the switching circuit 40 to control the battery pack 50 to enter a discharging state and close the charging state;
when the main control circuit 10 fails to obtain an external signal from the signal receiving circuit 20, the signal receiving circuit 20 is in an intermittent operation state, the main control circuit 10 controls the voltage detecting circuit 30 to enter a sleep state, and at the same time, the main control circuit 10 controls the driving switching circuit 40 to control the battery pack 50 to stop charging and discharging, and the main control circuit 10 itself also enters the sleep mode.
The design key points of the invention are as follows: the battery pack awakening method mainly comprises the steps of receiving an external signal, judging whether the external signal is correctly triggered, starting voltage detection and switching the charging and discharging states of the battery pack, has high automation degree in the whole awakening process, replaces manual pressing of a mechanical switch, is simple to operate, does not need manual operation, avoids additional external leads, reduces the disassembly and assembly cost, and particularly has high intelligence degree by detecting the voltage of the battery pack and awakening the corresponding function of the battery pack, does not damage the battery pack and prolongs the service life of the battery pack;
secondly, man-machine interaction is realized through the wireless communication circuit, particularly, the battery pack of the battery pack can be controlled to enter dormancy in real time, power consumption is reduced, the battery pack can be placed for a long time without power loss, and meanwhile, various information of the battery pack can be read in real time through the wireless communication circuit;
and the whole circuit structure is ingenious and reasonable in design, and stability and reliability in the awakening process are ensured.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the technical scope of the present invention, so that any minor modifications, equivalent changes and modifications made to the above embodiment according to the technical spirit of the present invention are within the technical scope of the present invention.

Claims (7)

1. A battery management circuit, characterized by: the charging and discharging control circuit comprises a main control circuit, a signal receiving circuit for receiving external signals, a voltage detection circuit for detecting the voltage of a battery pack and a switching circuit for controlling the charging and discharging state of the battery pack;
the signal receiving circuit is connected with the main control circuit, and the main control circuit is respectively connected with the voltage detection circuit and the switching circuit; the signal receiving circuit is a sensor detection circuit, or the signal receiving circuit comprises a wireless communication circuit;
the voltage detection circuit comprises a first sub-circuit, a second sub-circuit, a third sub-circuit and a fourth sub-circuit, the first sub-circuit is connected with the second sub-circuit, the second sub-circuit is connected with the third sub-circuit and the fourth sub-circuit, the third sub-circuit is connected with the fourth sub-circuit, and the main control circuit is respectively connected with the first sub-circuit, the second sub-circuit, the third sub-circuit and the fourth sub-circuit;
the first sub circuit, the second sub circuit, the third sub circuit and the fourth sub circuit respectively comprise a first MOS (metal oxide semiconductor) tube and a first polarity capacitor;
the first MOS tube of the first subcircuit is provided with a source electrode used for being connected with the positive electrode output end of the battery pack, the source electrode of the first MOS tube of the first subcircuit is connected with the source electrode of the first MOS tube of the second subcircuit through a first capacitor of the first subcircuit, the source electrode of the first MOS tube of the second subcircuit is connected with the source electrode of the first MOS tube of the third subcircuit through a first capacitor of the second subcircuit, the source electrode of the first MOS tube of the third subcircuit is connected with the source electrode of the first MOS tube of the fourth subcircuit through a first capacitor of the third subcircuit, and the source electrode of the first MOS tube of the fourth subcircuit is grounded through a first capacitor of the fourth subcircuit;
the drain electrodes of the first MOS tubes of the first sub-circuit, the second sub-circuit, the third sub-circuit and the fourth sub-circuit are all connected with a main control circuit;
the grid electrode of the first MOS tube of the first sub-circuit and the grid electrode of the first MOS tube of the third sub-circuit are both connected with the grid electrode of the first MOS tube of the fourth sub-circuit, and the grid electrode of the first MOS tube of the fourth sub-circuit is also connected with the drain electrode of the second MOS tube of the fourth sub-circuit;
the grid electrode of the second MOS tube of the first sub-circuit and the grid electrode of the second MOS tube of the fourth sub-circuit are both connected with the main control circuit, and the source electrode of the second MOS tube of the first sub-circuit and the source electrode of the second MOS tube of the fourth sub-circuit are both connected with analog ground;
when the signal receiving circuit receives an external signal, the signal receiving circuit sends the external signal to the main control circuit, the main control circuit receives and judges whether the external signal is a correct trigger signal,
if the external signal is a correct trigger signal, the main control circuit drives the voltage detection circuit to detect whether the voltage value of the battery pack is within a rated starting voltage range;
if the voltage value of the battery pack is detected to be within the rated starting voltage range, the main control circuit drives the switching circuit to wake up the charging and discharging function of the battery pack;
if the voltage value of the battery pack is detected to be lower than the lowest value of the rated starting voltage range, the main control circuit drives the switching circuit to wake up the charging-only but not discharging function of the battery pack;
if the voltage value of the battery pack is detected to be higher than the highest value of the rated starting voltage range, the main control circuit drives the switching circuit to wake up the discharging-only but not charging function of the battery pack.
2. A battery management circuit according to claim 1, wherein: the sensor detection circuit comprises an acceleration sensor detection circuit, wherein the acceleration sensor detection circuit comprises an acceleration sensor chip U3, a capacitor C10, a resistor R14, a resistor R15 and a resistor R61;
the acceleration sensor chip U3 has detection pin 1 to detection pin 12, and the main control circuit connects detection pin 1 and detection pin 12 respectively, detects pin 1 and connects in the one end of resistance R61 through resistance R15, detects pin 12 and connects in the one end of resistance R61 through resistance R14, and the main control circuit is connected to the one end of resistance R61, and detection pin 7 is connected to the other end of resistance R61, and detection pin 7 connects the analog ground through electric capacity C10, and detection pin 9 connects the analog ground.
3. A battery management circuit according to claim 1, wherein: the switching circuit comprises a charging switch circuit and a discharging switch circuit, the charging switch circuit is provided with a first signal receiving end, a first connecting end and a second connecting end used for connecting the cathode of the battery pack, the discharging switch circuit is provided with a second signal receiving end, a third connecting end and a cathode output end used for connecting electric equipment, the first signal receiving end and the second signal receiving end are both connected with the main control circuit, the first connecting end is connected with the third connecting end, the second connecting end is connected with an analog ground, and the cathode output end is connected with a signal ground.
4. A battery management circuit according to claim 3, wherein: the charging switch circuit comprises at least one third MOS tube, the grid electrode of the third MOS tube is a first signal receiving end, the drain electrode of the third MOS tube is a second connecting end, and the source electrode of the third MOS tube is a first connecting end.
5. A battery management circuit according to claim 3, wherein: the discharge switch circuit comprises at least one fifth MOS tube, the grid electrode of the fifth MOS tube is a second signal receiving end, the drain electrode of the fifth MOS tube is a negative electrode output end, and the source electrode of the fifth MOS tube is a third connecting end.
6. A battery management circuit according to claim 3, wherein: the switching circuit further comprises a first driving circuit and a second driving circuit, the first driving circuit and the second driving circuit respectively comprise a seventh MOS tube and a driving chip, the driving chip is provided with driving pins 1 to 6, the driving pin 4 and the driving pin 6 of the first driving circuit are both connected with a first signal receiving end, the driving pin 4 and the driving pin 6 of the second driving circuit are both connected with a second signal receiving end, the grid electrode of the seventh MOS tube is connected with a main control circuit, the driving pin 1 and the driving pin 3 are both connected with the drain electrode of the seventh MOS tube, and the source electrode of the seventh MOS tube is grounded.
7. A battery management method, characterized by: the battery management circuit applied to any one of the preceding claims 1 to 6, the battery management method comprising:
the main control circuit acquires an external signal from the signal receiving circuit and analyzes the external signal and a set trigger signal;
when the main control circuit judges that the external signal is a non-trigger signal, the main control circuit controls the voltage detection circuit and the switching circuit to enter a sleep mode;
when the main control circuit judges that the external signal is a trigger signal, the main control circuit controls the voltage detection circuit and the switching circuit to start, and the voltage detection circuit detects the voltage value of the battery pack at the moment;
when the voltage value of the battery pack is detected to be within the rated starting voltage range, the main control circuit drives the switching circuit to control the battery pack to enter two states of charging and discharging simultaneously;
when the voltage value of the battery pack is detected to be lower than the lowest value of the rated starting voltage range, the main control circuit drives the switching circuit to control the battery pack to enter a charging state and close a discharging state;
when the voltage value of the battery pack is detected to be higher than the highest value of the rated starting voltage range, the main control circuit drives the switching circuit to control the battery pack to enter a discharging state and close the charging state;
when the main control circuit fails to obtain an external signal from the signal receiving circuit, the signal receiving circuit is in an intermittent working state, the main control circuit controls the voltage detection circuit to enter a dormant state, meanwhile, the main control circuit controls the driving switching circuit to control the battery pack to stop charging and discharging states, and the main control circuit also enters a dormant mode.
CN201911303610.8A 2019-12-17 2019-12-17 Battery management circuit and method thereof Active CN110994727B (en)

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CN208127932U (en) * 2018-04-23 2018-11-20 长沙优力电驱动系统有限公司 Charge-discharge control circuit and battery management system
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