CN110993780B - Thermoelectric device and method for manufacturing the same - Google Patents
Thermoelectric device and method for manufacturing the same Download PDFInfo
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- CN110993780B CN110993780B CN201911222415.2A CN201911222415A CN110993780B CN 110993780 B CN110993780 B CN 110993780B CN 201911222415 A CN201911222415 A CN 201911222415A CN 110993780 B CN110993780 B CN 110993780B
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- 238000000034 method Methods 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000002070 nanowire Substances 0.000 claims abstract description 119
- 239000000463 material Substances 0.000 claims abstract description 87
- 239000000758 substrate Substances 0.000 claims abstract description 59
- 238000010438 heat treatment Methods 0.000 claims abstract description 27
- 238000005530 etching Methods 0.000 claims abstract description 12
- 239000000969 carrier Substances 0.000 claims abstract description 11
- 238000000151 deposition Methods 0.000 claims abstract description 9
- 238000000137 annealing Methods 0.000 claims abstract description 7
- 239000002184 metal Substances 0.000 claims description 24
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 229910021332 silicide Inorganic materials 0.000 claims description 24
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 235000012239 silicon dioxide Nutrition 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 7
- 229910019001 CoSi Inorganic materials 0.000 claims description 6
- 150000001875 compounds Chemical class 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 238000000231 atomic layer deposition Methods 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 238000005240 physical vapour deposition Methods 0.000 claims description 3
- 230000001376 precipitating effect Effects 0.000 claims 1
- 238000002360 preparation method Methods 0.000 abstract description 15
- 238000006243 chemical reaction Methods 0.000 abstract description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 230000005678 Seebeck effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/10—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects
- H10N10/17—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects characterised by the structure or configuration of the cell or thermocouple forming the device
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/80—Constructional details
- H10N10/85—Thermoelectric active materials
- H10N10/851—Thermoelectric active materials comprising inorganic compositions
- H10N10/855—Thermoelectric active materials comprising inorganic compositions comprising compounds containing boron, carbon, oxygen or nitrogen
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Abstract
The invention discloses a preparation method of a thermoelectric device, which comprises the following steps: providing a first substrate and a second substrate; forming an oxide layer on a first substrate, and forming a nanowire material layer on a second substrate; bonding the oxide layer and the nanowire material layer; and removing the second substrate; etching the nanowire material layer to form a plurality of nanowires; depositing a high-stress material layer to improve the mobility of carriers in the plurality of nanowires; forming contact electrodes at two ends of the plurality of nanowires; and forming a heating electrode on the outer side of the contact electrode; and (5) annealing treatment. According to the preparation method of the thermoelectric device, after the plurality of nanowires are formed, a layer of high-stress material layer is deposited on the formed structure, strain can be caused in a channel region by the high-stress material layer, mobility of carriers in the nanowires is improved, conductivity is improved, and accordingly thermoelectric quality factor ZT of the nanowires is improved, and thermoelectric conversion efficiency is improved. Meanwhile, the invention also provides a thermoelectric device.
Description
Technical Field
The invention relates to the technical field of semiconductor preparation, in particular to a thermoelectric device and a preparation method thereof.
Background
Today, the problems of fossil energy shortage and environmental pollution are prominent, and the diversification and efficient multi-stage utilization of energy become an important technical approach for solving the problems of energy and environment systematically. Thermoelectric devices, which are self-sufficient energy sources, can directly convert thermal energy into electrical energy according to the Seebeck effect, and can maintain a virtually infinite effective lifetime at a suitable temperature, which makes them one of the hot spots of international research as a high-tech technology in the energy field.
The efficiency of a thermoelectric device fabricated according to the Seebeck effect can be characterized by the thermoelectric figure of merit ZT:
ZT=σ*s 2 *T/κ；
wherein sigma is electrical conductivity, s is Seebeck coefficient, T is working temperature, and kappa is thermal conductivity; the thermoelectric figure of merit ZT represents the thermal and electrical properties of thermoelectric materials that may be used in thermoelectric devices.
As can be seen from the thermoelectric figure of merit ZT, one of the keys to improve the efficiency of thermoelectric devices is the development of thermoelectric materials with high seebeck coefficients and electrical conductivity, as well as low thermal conductivity.
Research proves that after the thermal conductivity of the thermoelectric material is greatly reduced, the thermoelectric figure of merit ZT corresponding to the nanowire can be improved, but at the same time, the nanowire is very likely to have higher resistance, and the performance of the thermoelectric device is also reduced; how to prepare thermoelectric devices with good performance and high thermoelectric figure of merit ZT is a problem to be solved.
Disclosure of Invention
The invention provides a thermoelectric device and a preparation method thereof in order to solve the technical problem that the existing thermoelectric device cannot meet higher working requirements due to the fact that the preparation method of the existing thermoelectric device cannot realize the preparation of high thermoelectric figure of merit ZT and high-performance devices.
The preparation method of the thermoelectric device comprises the following steps:
providing a first substrate and a second substrate; forming an oxide layer on a first substrate, and forming a nanowire material layer on a second substrate;
bonding the oxide layer and the nanowire material layer; and removing the second substrate;
etching the nanowire material layer to form a plurality of nanowires;
depositing a high-stress material layer to improve the mobility of carriers in the plurality of nanowires;
forming contact electrodes at two ends of the plurality of nanowires; and forming a heating electrode on the outer side of the contact electrode;
and (5) annealing treatment.
Preferably, the high stress material layer is SiN, and the layer thickness of the high stress material layer is less than or equal to 5 micrometers.
Preferably, the nanowire material layer is any one of Si, ge, siGe or SiGeSn; the layer thickness of the nanowire material layer is less than or equal to 500 nanometers.
Preferably, contact electrodes are formed at both ends of the several nanowires; and forming a heating electrode outside the contact electrode includes:
etching downwards from the top of the high-stress material layer to form contact holes, wherein the contact holes are positioned at two ends of the nanowire;
forming silicide at the bottom of the contact hole and at the contact position with the nanowire;
depositing metal;
the contact electrode is formed at the contact hole based on the metal, and the heating electrode is formed outside the contact electrode.
Preferably, the silicide is: niSi, tiSi 2 Or CoSi 2 Any one of them; the layer thickness of the silicide is less than or equal to 50 nanometers.
Preferably, the length of the plurality of nanowires is greater than or equal to 50 microns; the number of the nanowires is more than or equal to 1.
Preferably, the oxide layer is silicon dioxide, the thickness of the oxide layer being less than or equal to 10 microns;
the oxide layer is formed by a thermal oxidation method, a chemical vapor deposition method, an atomic layer deposition method or a physical vapor deposition method.
Preferably, the metal is any one of Ni, ti, cu, pt, cr, au, al.
Preferably, the first substrate and the second substrate are each any one of IV, II-V, III-V or II-VI compound semiconductor materials.
Meanwhile, the present invention also provides a thermoelectric device comprising:
a first substrate, an oxide layer formed on the first substrate, a plurality of nanowires formed on the oxide layer, and a high stress material layer formed on the oxide layer and the plurality of nanowires for improving carrier mobility in the plurality of nanowires; a contact electrode contacting both ends of each nanowire, and a heating electrode disposed outside the contact electrode.
Preferably, the high stress material layer is SiN, and the layer thickness of the high stress material layer is less than or equal to 5 micrometers.
Preferably, the nanowire material layer is any one of Si, ge, siGe or SiGeSn; the layer thickness of the nanowire material layer is less than or equal to 500 nanometers.
Preferably, silicide is formed at the contact of the contact electrode and the nanowire.
Preferably, the silicide is: niSi, tiSi 2 Or CoSi 2 Any one of them; the layer thickness of the silicide is less than or equal to 50 nanometers.
Preferably, the length of the plurality of nanowires is greater than or equal to 50 microns; the number of the nanowires is more than or equal to 1.
Preferably, the contact electrode and the heating electrode are any one of Ni, ti, cu, pt, cr, au, al.
Preferably, the oxide layer is silicon dioxide, the thickness of the oxide layer being less than or equal to 10 microns.
Preferably, the first substrate is any one of IV, II-V, III-V or II-VI compound semiconductor materials.
In summary, compared with the prior art, the preparation method of the thermoelectric device provided by the invention has the advantages that after the plurality of nanowires are formed, a layer of high-stress material layer is deposited on the formed structure, the existence of the high-stress material layer can cause strain in the channel region, the mobility of carriers in the nanowires is improved, and the conductivity is improved, so that the thermoelectric quality factor ZT of the nanowires is improved, and the thermoelectric conversion efficiency is increased.
The thermoelectric device provided by the invention has the advantages of high thermoelectric conversion efficiency and high performance.
Drawings
FIG. 1 is a flow chart of a method of fabricating a thermoelectric device in accordance with the present invention;
fig. 2 to 15 are structural diagrams corresponding to each step of the method for manufacturing a thermoelectric device according to the present invention.
Wherein 10 is a first substrate, 11 is an oxide layer, 20 is a second substrate, 21 is a nanowire material layer, 22 is a nanowire, 30 is a high-stress material layer, 40 is a contact electrode, 400 is a contact hole, 401 is a metal layer, 402 is silicide, 41 is a heating electrode, and 42 is metal.
Detailed Description
The following describes specific embodiments according to the present invention with reference to the drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than those described herein, and therefore the present invention is not limited to the specific embodiments disclosed below.
In order to solve the technical problem that the existing thermoelectric device cannot meet higher working requirements due to the fact that the existing thermoelectric device cannot realize the preparation of high thermoelectric figure of merit ZT and high-performance devices, the invention provides a thermoelectric device and a preparation method thereof; specifically, after forming a plurality of nanowires, a layer of high-stress material is deposited on the formed structure, and the presence of the high-stress material layer can induce strain in the channel region, so that the mobility of carriers in the nanowires is improved, the conductivity is improved, the thermoelectric figure of merit ZT of the nanowires is improved, and the thermoelectric conversion efficiency is increased.
The preparation method of the thermoelectric device, as shown in fig. 1, comprises the following steps:
s1, as shown in fig. 2 and 3, providing a first substrate 10 and a second substrate 20; forming an oxide layer 11 on the first substrate 10, and forming a nanowire material layer 21 on the second substrate 20;
in this step, a first substrate 10 and a second substrate 20 are provided; and an oxide layer 11 may be formed on the first substrate 10 by a thermal oxidation method, a chemical vapor deposition method, an atomic layer deposition method, a physical vapor deposition method, or the like; and a nanowire material layer 21 may be formed on the second substrate 20 by epitaxial growth or the like.
Wherein the first substrate 10 and the second substrate 20 are any one of IV, II-V, III-V or II-VI compound semiconductor materials. The nanowire material layer 21 is any one of Si, ge, siGe or SiGeSn; the layer thickness of the nanowire material layer 21 is less than or equal to 500 nm. The oxide layer 11 is silicon dioxide, and the thickness of the oxide layer 11 is less than or equal to 10 micrometers. Of course, the first substrate 10, the second substrate 20, the nanowire material layer 21 and the oxide layer 11 may be any other existing material meeting the working requirements.
Preferably, an oxide layer 11 is formed on the first substrate 10 by a thermal oxidation method; the first substrate 10 and the second substrate 20 are both silicon substrates, and the silicon substrates are low in preparation cost, abundant in raw materials, good in performance and convenient for preparing thermoelectric devices.
S2, as shown in fig. 4 to 6, bonding the oxide layer 11 and the nanowire material layer 21; and removing the second substrate 20;
in this step, as shown in fig. 4 and 5, the second substrate 20 is inverted over the oxide layer 11 of the first substrate 10 through the nanowire material layer 21 so that the oxide layer 11 is in face-to-face contact with the nanowire material layer 21, and after bonding, the two can be closely bonded together.
In this step, as shown in fig. 6, after bonding, the other surface of the second substrate 20 away from the nanowire material layer 21 is subjected to thinning treatment to remove the second substrate 20, leaving only the oxide layer 11 and the nanowire material layer 21 on the first substrate 10; the presence of the oxide layer 11 may isolate the nanowire material layer 21 from the first substrate 10, while a capacitor-like structure may be formed.
Wherein the first substrate 10 may be subjected to a thinning process by a CMP process or a wet etching process.
S3, as shown in FIG. 7, etching the nanowire material layer 21 to form a plurality of nanowires 22;
in this step, after the second substrate 20 is removed, the nanowire material layer 21 under the second substrate 20 is exposed, and the exposed nanowire material layer 21 may be etched by photolithography and etching processes, so as to obtain a plurality of nanowires 22; of course, the nanowire material layer 21 may also be etched in any of the existing ways to form a number of nanowires 22.
Specifically, the length of the plurality of nanowires 22 is 50 microns or more; to create a sufficiently large temperature differential across the nanowire 22 in its direction of extension; wherein, the range of this temperature difference is: 50 to 2000 ℃.
Specifically, the number of nanowires 22 is 1 or more; to capture enough heat to generate more energy. The specific length and number of the nanowires 22 may be selected to be suitable according to different practical situations.
S4, as shown in FIG. 8, depositing a high stress material layer 30 to improve the mobility of carriers in the plurality of nanowires 22;
in this step, after the nanowires 22 are formed, a layer 30 of high stress material is deposited over the formed structure; wherein the high stress material layer 30 is SiN, and the deposited layer thickness is less than or equal to 5 micrometers; the high stress material layer SiN is in contact with the surfaces of the plurality of nanowires 22, and can induce strain in the channel region, improve mobility of carriers in the nanowires 22, and improve conductivity, thereby improving thermoelectric figure of merit ZT of the nanowires 22 and increasing thermoelectric conversion efficiency.
S5, as shown in fig. 9 to 15, contact electrodes 40 are formed at both ends of the plurality of nanowires 22; and a heating electrode 41 is formed outside the contact electrode 40.
Specifically, contact electrodes 40 are formed at both ends of the plurality of nanowires 22; and the step of forming the heating electrode 41 outside the contact electrode 40 includes:
s51, as shown in fig. 9 and 10, a contact hole 400 is formed by etching downwards from the top of the high stress material layer 30; the contact holes 400 are positioned at two ends of the plurality of nanowires 22;
in this step, the contact hole 400 may be formed by etching from the top of the high stress material layer 30 down through a dry etching process or the like until the surfaces of both ends of the plurality of nanowires 22 are exposed.
Note that fig. 9 is a top view of the structure after etching the high stress material layer 30 to form the contact hole 400; fig. 10 is a cross-sectional view of the structure of fig. 9 taken along A-A.
S52, as shown in fig. 11 and 12, silicide 402 is formed at the bottom of the contact hole 400 and at the contact with the nanowire 22;
in this step, after the contact hole 400 is formed, silicide 402 needs to be formed in the contact hole 400 and on the surfaces of the two ends of the plurality of nanowires 22; to reduce contact resistance and improve thermoelectric device performance.
Specifically, a metal layer 401 may be deposited on the formed structure, and the metal layer 401 outside the contact hole 400 is removed, and the metal layer 401 in the contact hole 400 contacts and reacts with the surfaces of the two ends of the nanowire 22 to form the silicide 402;
wherein silicide 402 is: niSi, tiSi 2 Or CoSi 2 Any one of them; silicide 402The layer thickness is less than or equal to 50 nanometers.
S53, as shown in FIG. 13, depositing metal 42;
in this step, a layer of metal 42 is deposited on the formed structure, facilitating the subsequent preparation of the contact electrode 40 and the heating electrode 41; wherein the metal 42 may be any one of Ni, ti, cu, pt, cr, au, al; of course, it is contemplated that the metal 42 may be other metallic materials as desired.
S54, as shown in fig. 14 and 15, the contact electrode 40 is formed at the contact hole 400 based on the metal 42, and the heating electrode 41 is formed outside the contact electrode 40.
In this step, the metal 42 outside the contact hole 400 and outside the heating region may be removed through photolithography and etching processes; metal 42 at the contact hole 400 is remained to form a contact electrode 40; and retaining the metal 42 in the heating region to form the heating electrode 41.
In other alternative embodiments, the contact electrode 40 and the heating electrode 41 may be formed using a lift-off process, specifically, before depositing the metal 42, depositing photoresist on the formed structure and removing the photoresist in the contact hole 400 and the heating region, then depositing the metal 42 on the formed structure, and then removing the photoresist outside the contact hole 400 and the heating region and the metal 42 by a cleaning process or the like, thereby forming the contact electrode 40 and the heating electrode 41.
Note that fig. 11 is a cross-sectional view of the structure along A-A after the metal layer 401 is formed; fig. 12 is a cross-sectional view of the structure along A-A after silicide 402 is formed; FIG. 13 is a cross-sectional view of the structure taken along A-A after forming metal 42; fig. 14 is a top view of a structure for forming the contact electrode 40 and the heating electrode 41; fig. 15 is a cross-sectional view of the structure of fig. 14 taken along A-A.
S6, annealing treatment.
In the step, the formed structure can be annealed by adopting the processes of furnace tube annealing and the like; the specific annealing temperature and annealing time may be set according to the specific circumstances, and are not particularly limited herein.
Meanwhile, the present invention also provides a thermoelectric device comprising:
a first substrate 10, an oxide layer 11 formed on the first substrate 10, a plurality of nanowires 22 formed on the oxide layer 11, and a high stress material layer 30 formed on the oxide layer 11 and the plurality of nanowires 22 for improving carrier mobility in the plurality of nanowires 22; a contact electrode 40 contacting both ends of each nanowire 22, and a heating electrode 41 disposed outside the contact electrode 40.
In the present embodiment, a contact hole 400 is formed in the high stress material layer 30, specifically, the contact hole 400 is located at both ends of the plurality of nanowires 22; the contact hole 400 extends downward from the top of the high stress material layer 30; the bottom of the contact hole 400 terminates at the surface of the nanowire 22; the contact electrode 40 is formed in the contact hole 400; the heating electrode 41 is formed on the high stress material layer 30 and is located outside the contact electrode 40.
Specifically, two oppositely disposed contact electrodes 40 and two oppositely disposed heating electrodes 41 are disposed within one thermoelectric device; of course, the number of the contact electrodes 40 and the heating electrodes 41 may be set according to practical situations in particular, and is not limited to the two described above.
By adopting the technical scheme, the high-stress material layer 30 is formed on the top and the side wall of the nanowire 22, the high-stress material layer 30 can cause strain in the channel region, the mobility of carriers in the nanowire 22 is improved, and the conductivity is improved, so that the thermoelectric figure of merit ZT of the nanowire 22 is improved, and the thermoelectric conversion efficiency is increased.
Further, the high stress material layer 30 is SiN, and the layer thickness of the high stress material layer 30 is 5 μm or less.
By adopting the technical scheme, siN is widely applied to the field of nanoelectronics as a stress material in the CMOS device preparation technology, and can further ensure that the mobility of carriers in the nanowire 22 is improved and the conductivity is improved.
Further, the nanowire material layer 21 is any one of Si, ge, siGe or SiGeSn; the layer thickness of the nanowire material layer 21 is less than or equal to 500 nm.
Further, silicide 402 is formed at the contact of the contact electrode 40 with the nanowire 22.
Further, silicide 402 is: niSi, tiSi 2 Or CoSi 2 Any one of them; the layer thickness of silicide 402 is less than or equal to 50 nanometers.
By adopting the technical scheme, the silicide 402 is formed at the contact position of the contact electrode 40 and the nanowire 22, and the existence of the silicide 402 can reduce the contact resistance and further improve the performance of the thermoelectric device.
Further, the length of the plurality of nanowires 22 is 50 microns or more; the number of nanowires 22 is 1 or more.
By adopting the technical scheme, the lengths of the plurality of nanowires 22 are greater than or equal to 50 micrometers; to create a sufficiently large temperature differential across the nanowire 22 in its direction of extension; and, the number of the nanowires 22 is 1 or more; to capture enough heat to generate more energy.
Further, the contact electrode 40 and the heating electrode 41 are any one of Ni, ti, cu, pt, cr, au, al.
In alternative embodiments, the contact electrode and the heater electrode may be other metallic materials as desired.
Further, the oxide layer 11 is silicon dioxide, and the thickness of the oxide layer 11 is less than or equal to 10 micrometers.
By adopting the technical scheme, the silicon dioxide exists between the first substrate 10 and the nanowire 22, and the silicon dioxide can isolate the first substrate 10 from the nanowire 22 to form a structure similar to a capacitor.
Further, the first substrate 10 is any one of IV, II-V, III-V or II-VI compound semiconductor materials.
In summary, compared with the prior art, after forming a plurality of nanowires 22, a layer of high stress material layer 30 is deposited on the formed structure, and the presence of the high stress material layer 30 can induce strain in the channel region, so as to improve mobility of carriers in the nanowires 22, improve conductivity, thereby improving thermoelectric figure of merit ZT of the nanowires 22 and increasing thermoelectric conversion efficiency.
The thermoelectric device provided by the invention has the advantages of high thermoelectric conversion efficiency and high performance.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (16)
1. A method of fabricating a thermoelectric device, comprising the steps of:
providing a first substrate and a second substrate; forming an oxide layer on the first substrate, and forming a nanowire material layer on the second substrate;
bonding the oxide layer and the nanowire material layer; and removing the second substrate;
etching the nanowire material layer to form a plurality of nanowires;
depositing a high-stress material layer to improve the mobility of carriers in a plurality of nanowires;
etching downwards from the top of the high-stress material layer to form contact holes, wherein the contact holes are positioned at two ends of the plurality of nanowires;
forming silicide at the bottom of the contact hole and at the contact position with the nanowire; precipitating metal; forming a contact electrode at the contact hole based on the metal, and forming a heating electrode outside the contact electrode;
and (5) annealing treatment.
2. The method of manufacturing a thermoelectric device according to claim 1, wherein the high stress material layer is SiN; the layer thickness of the high-stress material layer is less than or equal to 5 micrometers.
3. The method of claim 1, wherein the nanowire material layer is any one of Si, ge, siGe or SiGeSn; the layer thickness of the nanowire material layer is less than or equal to 500 nanometers.
4. The method of manufacturing a thermoelectric device according to claim 1, wherein the silicide is: niSi, tiSi 2 Or CoSi 2 Any one of them; the layer thickness of the silicide is less than or equal to 50 nanometers.
5. The method of manufacturing a thermoelectric device according to claim 1, wherein the length of the plurality of nanowires is 50 μm or more; the number of the nanowires is more than or equal to 1.
6. The method of manufacturing a thermoelectric device according to claim 1, wherein the oxide layer is silicon dioxide, and the thickness of the oxide layer is less than or equal to 10 μm;
the oxide layer is formed by a thermal oxidation method, a chemical vapor deposition method, an atomic layer deposition method or a physical vapor deposition method.
7. The method of claim 1, wherein the metal is any one of Ni, ti, cu, pt, cr, au, al.
8. The method of manufacturing a thermoelectric device according to claim 1, wherein the first substrate and the second substrate are each any one of group IV, II-V, III-V, or II-VI compound semiconductor materials.
9. A thermoelectric device, comprising:
a first substrate, an oxide layer formed on the first substrate, a plurality of nanowires formed on the oxide layer, and a high stress material layer formed on the oxide layer and the plurality of nanowires for improving carrier mobility in the plurality of nanowires; the contact holes are formed in the high-stress material layer by etching downwards from the top of the high-stress material layer, the contact holes are positioned at two ends of the plurality of nanowires, silicide is formed at the bottoms of the contact holes and at the contact positions of the contact holes and the nanowires, contact electrodes are formed at the contact holes, and heating electrodes are arranged outside the contact electrodes.
10. The thermoelectric device of claim 9, wherein the high stress material layer is SiN, and wherein the high stress material layer has a layer thickness of 5 microns or less.
11. The thermoelectric device of claim 9, wherein the nanowire material layer is any one of Si, ge, siGe or SiGeSn; the layer thickness of the nanowire material layer is less than or equal to 500 nanometers.
12. The thermoelectric device of claim 9, wherein the silicide is: niSi, tiSi 2 Or CoSi 2 Any one of them; the layer thickness of the silicide is less than or equal to 50 nanometers.
13. The thermoelectric device of claim 9, wherein a length of a plurality of said nanowires is 50 microns or more; the number of the nanowires is more than or equal to 1.
14. The thermoelectric device of claim 10, wherein the contact electrode and the heating electrode are any one of Ni, ti, cu, pt, cr, au, al.
15. The thermoelectric device of claim 9, wherein the oxide layer is silicon dioxide, and wherein the oxide layer has a layer thickness of less than or equal to 10 microns.
16. The thermoelectric device of claim 9 wherein the first substrate is any one of group IV, II-V, III-V or II-VI compound semiconductor materials.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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