CN110991135A - Whole set simulation test method based on power frequency quantity and total station simulation - Google Patents

Abstract

Aiming at the problem that the method for detecting the short-circuit fault in the prior art mostly adopts a phase domain analysis method or adopts an expert system to calculate the short-circuit fault of the power system, which is not suitable for being used in simulation test, the invention provides a whole set of simulation test method based on power frequency quantity and total station simulation. The method has simple flow, determines the boundary condition of the short-circuit current according to the type of the short-circuit fault, and then can know the negative sequence and the zero sequence current of the short-circuit point according to the boundary condition so as to obtain the voltage of each sequence grid node. The method has the advantages of simple flow and high calculation speed, and is suitable for being used under the condition of simulation detection.

Description

Whole set simulation test method based on power frequency quantity and total station simulation

Technical Field

The invention belongs to the field of transformer substation debugging, and particularly relates to a whole set of simulation test method based on power frequency quantity and total station simulation.

Background

The conventional transformer substation forms a whole set of debugging, operation and maintenance mechanism for a long time, the loop connection, the protection outlet and the functional pressing plate are visible and touch, and an obvious physical fracture can be formed, so that debugging, operation and maintenance maintainers form an inherent habit, but along with the application of secondary virtual loops and a large number of signal loop soft pressing plates, the secondary loops which are visible and touch in the conventional transformer substation are changed into invisible and invisible black boxes, so that the uncontrollable performance of debugging, operation and maintenance of the transformer substation is greatly improved. The prior art gradually shows its limitations, mainly in the following aspects:

1) in the test, various sampling values and switching value logics need to be calculated manually, the calculation is complex, errors are easy to occur, and the correct setting can be set after the field is often calculated and adjusted for multiple times.

2) Under the existing test condition, debugging personnel usually configure test parameters according to an algorithm in a protection specification instead of an actual fault condition, and the verification method is unreasonable.

3) The complex protection logic function test is difficult to be mastered by the debugging personnel and the test is difficult to be implemented

4) The test requirements of station area protection are difficult to meet, and the influence of faults on the total station protection cannot be simulated.

In the whole secondary circuit detection process, short-circuit fault information is the basis of short-circuit calculation, and the conventional short-circuit fault detection mostly adopts a phase domain analysis method or a method of calculating the short-circuit fault of the power system by adopting an expert system, but the method is not applicable to the test.

Disclosure of Invention

The invention provides a whole set of simulation test method based on power frequency quantity and total station simulation, aiming at the problem that in the prior art, a phase domain analysis method is mostly adopted for short-circuit fault detection or a method for calculating the short-circuit fault of a power system by adopting an expert system is not suitable for being used in simulation test.

The technical means for solving the technical problems of the invention is as follows: the whole set of simulation test method based on power frequency quantity and total station simulation generates a main wiring diagram according to the information of the number of total station transformers, a main wiring mode and the number of outgoing lines and loops, configures primary and secondary associations, sets CT/PT transformation ratio and SV and GOOSE channel mapping, and realizes total station power frequency quantity steady-state short circuit fault simulation by adopting an admittance matrix equivalent calculation method.

The total station power frequency steady-state short-circuit fault simulation method comprises the following steps:

s1, forming each sequence network node admittance matrix through the structure of a power grid and each sequence parameter;

s2, respectively solving the impedance matrix corresponding to each sequence network in the step S1, wherein the short circuit points of the positive, negative and zero sequence impedance matrix are located in the column elements Z1, Z2 and Z0;

s3, solving the short-circuit point current of the positive sequence, determining the boundary condition of the short-circuit current according to the type of the short-circuit fault, and solving the negative sequence current and the zero sequence current of the short-circuit point according to the boundary condition;

s4, solving voltage values of all branch circuits of each sequence network;

s5, solving the current value of each branch of each sequence network;

and S6, solving the voltage of each node and the branch current represented by the vector according to the symmetrical component transformation to obtain the current value of the short circuit point.

Has the advantages that: the method has simple flow, determines the boundary condition of the short-circuit current according to the type of the short-circuit fault, and then can know the negative sequence and the zero sequence current of the short-circuit point according to the boundary condition so as to obtain the voltage of each sequence grid node. The method has the advantages of simple flow and high calculation speed, and is suitable for being used under the condition of simulation detection.

Drawings

FIG. 1 is a general flowchart of a test;

FIG. 2 is a diagram of power supply parameter settings;

FIG. 3 is a load parameter setting diagram;

FIG. 4 is a diagram of main transformer parameter setting;

FIG. 5 is a topological electrical diagram of a substation;

FIG. 6 is a schematic diagram of a failure point in an interval;

fig. 7 is a short circuit calculation flow chart.

Detailed Description

The invention will be further described with reference to the accompanying drawings.

According to the method, the main wiring diagram of the transformer substation is established, the fault information is configured, the node admittance matrix is automatically generated by adopting a network topology structure, the test parameters are automatically calculated, and the steady-state short-circuit fault simulation of the total station power frequency is realized.

The biggest difference between the intelligent substation and the traditional substation is the networking of information interaction. All analog quantity sampling data are completed by a merging unit of a process layer and are provided for all IED devices of a station control layer in an SV message mode to be used, and therefore data sharing is achieved. And no special alternating current sampling unit is arranged in each IED device of the station control layer. The traditional protection device is converted into a combination of three IEDs, namely a merging unit, digital protection and an intelligent terminal, in an intelligent substation, during field test, not only is single-device test carried out on digital protection, but also a whole group of tests are carried out on the combination of the IEDs, so that the operation correctness and reliability of a data sampling unit and a secondary circuit driving unit are ensured.

The whole set of tests described in the present invention: the whole set of tests are configured aiming at loops (virtual loops and real loops), and the configuration needs to be installed on site, so that errors are easy to occur. The whole set of tests run through factory joint debugging, field debugging to production and acceptance inspection, more than 10 tests are required for each set of protection on average, and more than 100 or even hundreds of tests are required for the total-station debugging. The field debugging environment is complex, the number of debugging personnel is small, the workload is large, and the debugging personnel needs to be assisted by visual and easy tools which are easy to operate.

The invention automatically generates a main wiring diagram according to information such as the number of transformers in the whole station, a main wiring mode, the number of outgoing lines and loops and the like based on the whole group of tests of power frequency quantity and total station simulation, and can enter an editing mode to modify the main wiring diagram, wherein the steps of increasing the number of intervals, exchanging the sequence and the position of the intervals, configuring primary and secondary correlation, setting CT/PT transformation ratio and mapping SV and GOOSE channels are included. Typical fault points and fault types can be configured, steady-state short-circuit fault simulation of the total station power frequency quantity is realized by adopting an admittance matrix equivalent calculation method, and a test flow is shown in fig. 1.

At present, the whole group of tests of the transformer substation adopts a manual dosage method, and has the following defects:

1) the voltage and current settings required by the test are easy to make mistakes

For example, for simulating an out-of-area fault of transformer differential protection, the current amplitude and phase relation of each side needs to be calculated manually, the calculation is complex, errors are easy to occur, and the correct setting can be set after calculation and multiple attempts and adjustments are often made on site. In addition, under the existing test condition, debugging personnel configure test parameters according to the algorithm in the protection specification instead of the actual fault condition at present, and the verification method is unreasonable.

2) Testing of more complex protection logic functions is difficult to implement

The existing test equipment adopts a mode of completely manually setting voltage and current, for more complex protection logic, the voltage and current in various states are often calculated in advance, and a state sequence mode is adopted for testing, so that the realization of testers is difficult. For example, for the test of protection functions such as line protection reclosing, post-acceleration, bus coupler splitting, closing dead zone and the like, field testers often need to perform multiple attempts and multiple test parameter adjustment before the test is successful, which wastes time and labor. On site, a test card can not be made in half a day, and a protection device manufacturer needs to be called frequently.

The invention sets the parameters of the transformer, the power supply, the load and the power transmission line typical model, simplifies the parameter configuration of the simulation model and improves the engineering practicability of the simulation test. And (4) automatically calculating and generating the voltage and current values of each branch circuit according to the network topology structure of the main wiring at each node in the whole group of test, and setting basic parameters of each interval. And calculating the voltage and current values of each node and each branch according to a node admittance matrix method.

Calculating the voltage and current values of each node and each branch according to a node admittance matrix method, wherein a corresponding power supply is needed, and the power supply parameters are set as shown in FIG. 2; the load parameter settings are shown in fig. 3; the main transformer interval parameter setting is shown in fig. 4.

Modeling is carried out on primary equipment in the station through the network topology of the transformer substation, and the actual running state of the primary equipment in the total station is simulated. Based on the state of each switch of the main connection line, a network topology model structure of the main connection line is automatically generated, a node admittance matrix is automatically generated through the network topology structure, the voltage of each node and the current of each branch line are automatically calculated, and the voltage of each node and the current of each branch line correspond to the bus voltage and each interval current in the main connection line, as shown in fig. 5.

And setting fault points (a whole circuit group test, a whole bus-tie protection group test, a whole main transformer protection group test, a whole bus protection group test and the like), automatically calculating fault current and voltage based on a typical model (parameter modification) of the transformer substation, and realizing closed-loop simulation test. The fault points in the interval are shown in fig. 6, F1 indicates a fault point, red may be set to indicate that the fault point is active, and gray indicates that the fault point is inactive, only the active fault point will be active during the test, and the inactive fault point will not be active. Only one point of failure can be allowed to be active during the test.

The short-circuit fault information is the basis of short-circuit calculation, and on the basis of obtaining the short-circuit fault information, the voltage of each node, the branch current and the short-circuit current are automatically calculated according to the network topology structure. The short circuit calculation flow is shown in fig. 7. The total station power frequency steady-state short-circuit fault simulation method comprises the following steps:

s1, forming each sequence network node admittance matrix through the structure of a power grid and each sequence parameter;

s2, respectively solving the impedance matrix corresponding to each sequence network in the step S1, wherein the short circuit points of the positive, negative and zero sequence impedance matrix are located in the column elements Z1, Z2 and Z0;

s3, solving the short-circuit point current of the positive sequence, determining the boundary condition of the short-circuit current according to the type of the short-circuit fault, and solving the negative sequence current and the zero sequence current of the short-circuit point according to the boundary condition;

s4, solving voltage values of all branch circuits of each sequence network;

s5, solving the current value of each branch of each sequence network;

and S6, solving the voltage of each node and the branch current represented by the vector according to the symmetrical component transformation to obtain the current value of the short circuit point.

The above description is only an embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily change or replace the present invention within the technical scope of the present invention. Therefore, the protection scope of the present invention is subject to the protection scope of the claims.

Claims (2)

1. The whole set of simulation test method based on power frequency quantity and total station simulation is characterized in that a main wiring diagram is generated according to information of the number of transformers in the total station, a main wiring mode and the number of outgoing lines and loops, primary and secondary correlation is configured, CT/PT transformation ratio and mapping of SV and GOOSE channels are set, and steady-state short circuit fault simulation of the power frequency quantity in the total station is realized by adopting an admittance matrix equivalent calculation method.

2. The whole set of simulation test methods based on power frequency quantity and total station simulation of claim 1, wherein the step of the total station power frequency quantity steady-state short-circuit fault simulation is:

s1, forming each sequence network node admittance matrix through the structure of a power grid and each sequence parameter;

s2, respectively solving the impedance matrix corresponding to each sequence network in the step S1, wherein the short circuit points of the positive, negative and zero sequence impedance matrix are located in the column elements Z1, Z2 and Z0;

s3, solving the short-circuit point current of the positive sequence, determining the boundary condition of the short-circuit current according to the type of the short-circuit fault, and solving the negative sequence current and the zero sequence current of the short-circuit point according to the boundary condition;

s4, solving voltage values of all branch circuits of each sequence network;

s5, solving the current value of each branch of each sequence network;

and S6, solving the voltage of each node and the branch current represented by the vector according to the symmetrical component transformation to obtain the current value of the short circuit point.

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