CN103954925B - A kind of fault oscillograph dynamic testing method based on RTDS real-time simulation - Google Patents
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Abstract
Based on a fault oscillograph dynamic testing method for RTDS real-time simulation, the method relies on RTDS emulation platform, sets up dynamic test system, builds dynamic test system realistic model, realizes dynamic test; Described dynamic test system has built the fault model detecting oscillograph precision on power grid model basis.Dynamic test system is made up of analogue system workstation, RTDS, GTAO, GTFPI, power amplifier, circuit control protection device and fault oscillograph.Simulation work station, RTDS, power amplifier and circuit control protection device reasonably combine and achieve the digital dynamic mould test function of fault oscillograph by dynamic testing method of the present invention.The method is applicable to the test of conventional fault oscillograph and network message record analysis and fault recording integrated device simultaneously, according to the grid operating conditions of reality, can carry out the real-time check of off-line equivalence to product to be tested.
Description
Technical field
The present invention relates to a kind of fault oscillograph dynamic testing method based on RTDS real-time simulation, belong to power test technical field.
Background technology
Various electric parameters change when the automatic record electricity system failure of fault oscillograph energy and running status.According to oscillograph map analysis, nature of trouble, fault evolution process, check system parameter, trouble-shooting point can be distinguished rapidly and exactly and differentiate relay control guarantor, the aut.eq. correct operation several functions such as whether.Raising safe operation of power system and technology management level are all had great importance.
RTDS emulator is real-time, and therefore it can be directly connected on electric power system control and control protection device.By the actual equivalent model of RTDS system building and scene, and input system actual operation parameters is simulated, and these Output rusults represent the situation in real network truly.Based on RTDS system test than other method of testings more comprehensively, because we can be simulated by RTDS system and build different fault logics, simulate many severe and be difficult to the fault that occurs in very real, and this is be difficult to realize for Typical physical system.
And in the fault oscillograph test of routine, the test event of oscillograph is numerous, major part test event all adopts static method of testing, carry out static test as protected tester with relay control to fault wave recording device, the long-time big current record wave energy for test fault oscillograph often not easily realizes.
Summary of the invention
The object of the invention is, according to Problems existing in the fault oscillograph test of routine, the present invention proposes a kind of fault oscillograph method of testing based on RTDS real-time simulation, and the method is by building RTDS simulation test platform to test.
Technical scheme of the present invention is, method of testing of the present invention relies on RTDS emulation platform, sets up dynamic test system, builds dynamic test system realistic model, realizes dynamic test.Described dynamic test system has built the fault model detecting oscillograph precision on power grid model basis.
Dynamic test system of the present invention is connected and composed by analogue system workstation, RTDS real-time simulator, GTAO plate, GTFPI plate, power amplifier, circuit control protection device and fault oscillograph.Analogue system workstation is connected with RTDS by LAN (Local Area Network), the digital signal that RTDS exports is connected to the input end of power amplifier after GTAO board exports, the secondary singal that power amplifier exports is connected to circuit control protection device simultaneously, and fault oscillograph series connection is in loop.The breaker tripping and closing signal that analogue system workstation exports is connected by the tripping relay of GTFPI card circuit control protection device, and the breaker tripping and closing signal that circuit control protection device exports is connected with fault oscillograph.Dynamic test system connects as shown in Figure 1.
The secondary singal that described power amplifier exports comprises voltage signal and current signal, and the voltage and current analog signals after amplifying is connected on the sampling terminal of circuit control guarantor and fault wave recording device.If digitizing control protection device, be then first connected on the merge cells MU device of circuit after power amplifier exports, be connected to after the conversion of merge cells MU device on control guarantor and failure wave-recording apparatus.
Dynamic test system realistic model of the present invention as shown in Figure 2.
The present invention sets up dynamic test system realistic model (this model is applicable to the device to test of 110kV and above) according to dynamic test system.
Described dynamic test system realistic model comprises generator model, boosting varying model, two circuit models, fault verification model, load models etc., voltage transformer (VT) model summation current transformer model, switch models and bus model.Article two, circuit model is arranged between bus M and bus N; Bus M side connects generator model, load model and boosting varying model; Generator model is by the first boosting varying model connection bus M side, and load model is by the second boosting varying model connection bus M side; Bus N side arranges and connects equivalent infinitely great power-supply system; Be two circuit models between bus M and bus N; Circuit model 1 comprises Brk1 isolating switch, 1TA current transformer, 2TA current transformer, Brk2 isolating switch.Circuit model 2 comprises Brk3 isolating switch and Brk4 isolating switch.Wherein M side bus model comprises 1TV voltage transformer (VT) and adjacent outlet, and N side bus model comprises 2TV voltage transformer (VT) and adjacent outlet.
In order to check the accuracy of the recorder data of fault oscillograph before and after fault in each segment record and precision, dynamic test system is on the basis that power grid model is built, the present invention also specialized designs has built dissimilar fault model, wherein fault model is divided into simple fault model and complex fault model.Complex fault model comprises developing fault, conversion hysteria fault, oscillatory fault.Wherein, build in Fig. 3 be exactly simple fault realize logic, build in Fig. 4 be development and evolved fault realize logic.
After the logic of two kinds of fault models forms jointly, dynamic mode can draw up various dissimilar fault, this is just essentially different with fault simulation in static test.In conventional static test, simulated failure is generally all arranged according to the intrinsic fault logic of tester and program, is unfavorable for flexible change for the fault of complexity and the time controling of fault.And dynamic testing method effectively can make up this deficiency, as long as according to designing the fault logic built in the present invention, can simulate and control required fault type and fault-time flexibly.Conventional test device often underaction when simulating the short trouble in nonmetal character and oscillatory process.And this dynamic testing method, utilize the mode of slide block simply to set the control of short trouble in nonmetal character short circuit and oscillatory process, simulate the short trouble in nonmetal character in various degree and oscillatory process by the size arranging slide block intermediate variable value.
According to dynamic test system realistic model, dynamic test can be carried out.
Dynamic test of the present invention comprises data recording fashion test, the test of device recording capacity, the large test of short-circuit current registering capacity, fault localization test etc.
The invention has the beneficial effects as follows, simulation work station, RTDS, power amplifier and circuit control protection device reasonably combine and achieve the digital dynamic mould test function of fault oscillograph by this dynamic testing method.This dynamic testing method is applicable to the test of conventional fault oscillograph and network message record analysis and fault recording integrated device simultaneously.The method according to the grid operating conditions of reality, can carry out the real-time check of off-line equivalence to product to be tested.In testing process, use this dynamic testing method check produced problem to be indiscoverable in conventional static test process, the dynamic perfromance for detection failure oscillograph has applicability widely.
Accompanying drawing explanation
Fig. 1 is dynamic test system connection diagram;
Fig. 2 is dynamic test realistic model schematic diagram;
Fig. 3 be simple fault in dynamic test emulation RTDS model realize logical diagram;
Fig. 4 is that development in dynamic test emulation RTDS model and evolved fault realize logical diagram;
Figure number: 1 is emulator workstation; 2 is real-time simulators; 3 is GTFPI plates; 4 is GTAO plates; 5 is power amplifiers; 6 is LAN (Local Area Network); 7 is tested device; 8 is I side line road control protection devices; 9 is I side fault fluid parameter; 10 is J side fault fluid parameter; 11 is J side line road control protection devices; 12 are RTDS is core bus; 13 is RACK2; 14 is RACK1; 15 is generator models; 16 is load modules; 17 is first boosting varying models; 18 is second boosting varying models; 19 is infinitely great power-supply systems; 20 is first line models; 21 is second circuit models.
Embodiment
The specific embodiment of the invention as shown in the figure.
The present embodiment, by setting up dynamic test system, builds dynamic test system realistic model to realize dynamic test.
The present embodiment dynamic test system as shown in Figure 1.Dynamic test system is controlled protection device 11, I side fault oscillograph 9 and J side fault fluid parameter 10 formed by analogue system workstation 1, RTDS real-time simulator 2, GTAO analog output card 4, GTFPI high-voltage digital output interface plate 3, power amplifier 5, I side line road control protection device 8, J side line road.Analogue system workstation 1 is connected with RTDS real-time simulator 2 by LAN (Local Area Network) 6, the digital signal that RTDS real-time simulator 2 exports is connected to the input end of power amplifier 5 after GTAO plate 4 exports, and the secondary singal that power amplifier 5 exports is connected respectively to I side line road control protection device 8 and J side line road control protection device 11; Fault oscillograph series connection is in loop, and fault oscillograph 9 is controlled protection device 8 with I side line road and connected, and fault oscillograph 10 is controlled protection device 11 with J side line road and connected.The breaker tripping and closing signal that analogue system workstation 1 exports is connected by the tripping relay of GTFPI plate 3 by J side line road control protection device 11, and the breaker tripping and closing signal that J side line road control protection device 11 exports is connected with fault oscillograph 10.
The dynamic test system realistic model of the present embodiment as shown in the figure.
The present embodiment test macro realistic model comprises the content such as generator model, boosting varying model, two circuit models, fault verification model, load models etc., voltage transformer (VT) model summation current transformer model, switch models, bus model.Article two, circuit model is arranged between bus M and bus N; Bus M side connects generator model, load model and boosting varying model; Generator model is by the first boosting varying model connection bus M side, and load model is by the second boosting varying model connection bus M side; Bus N side arranges and connects equivalent infinitely great power-supply system; Be two circuit models between bus M and bus N; First line model 20 comprises Brk1 isolating switch, 1TA current transformer, 2TA current transformer, Brk2 isolating switch.Second circuit model 21 comprises Brk3 isolating switch and Brk4 isolating switch.Wherein M side bus model comprises 1TV voltage transformer (VT) and adjacent outlet, and N side bus model comprises 2TV voltage transformer (VT) and adjacent outlet.
In test process, be provided with large and small two kinds of methods of operation of whole system, the capacity of short circuit of its correspondence is set to 1000MVA and 10000MVA.The unit length line parameter circuit value of first line model 20 and the second circuit model 21 adopts the actual parameter in carrying out practically.This test emulation model, optimum configurations is simple and clear, is applicable to different electric pressures.In this test process, model is substantially by test circuit with first line model 20, with circuit control protection device for relying on, by the tail end needing the fault oscillograph of test to seal in circuit control protection device, form the analogue system of a simulation, device is carried out to the real-time simulation test of off-line.In test process, for the accuracy of the fault localization function checking fault oscillograph arranges several short dot (being as the criterion with M side) altogether:
K1: outside district;
K2: total track length about 10%, 10.0 kms;
K3, K6: total track length about 50%, 50.0 kms;
K4: total track length about 90%, 90.0 kms;
K5: outside district.
Connection in the present embodiment dynamic testing process is as follows:
(1) alternating voltage input signal: detected fault oscillograph is arranged on M side and the N side of controlled guarantor's circuit respectively, the voltage signal that the control of M side is protected is provided by M side bus voltage mutual inductor 1TV, and the voltage signal that the control of N side is protected is provided by N side bus voltage mutual inductor 2TV.Voltage transformer (VT) no-load voltage ratio can be arranged as required.
(2) alternating current input signal: the current signal that the control of M side is protected is provided by the secondary current of 1TA, the current signal that the control of N side is protected is provided by the secondary current of 2TA.Voltage transformer (VT) no-load voltage ratio can be arranged as required.
(3) control signal input: M side and N side mimic-disconnecting switch often opened both sides circuit control protection device in auxiliary contact access model and the corresponding position of fault oscillograph.
In order to check the accuracy of the recorder data of fault oscillograph before and after fault in each segment record and precision, dynamic test is on the basis that power grid model is built, the present embodiment has built dissimilar fault model, wherein fault model is divided into simple fault model and complex fault model.Complex fault model comprises developing fault, conversion hysteria fault, oscillatory fault etc.Build shown in Fig. 3 be exactly simple fault realize logic, build shown in Fig. 4 be development and evolved fault realize logic.
After two kinds of logics form jointly, can simulate various dissimilar fault, this is just essentially different with fault simulation in static test.In conventional static test, simulated failure is generally all arranged according to the intrinsic fault logic of tester and program, is unfavorable for flexible change for the fault of complexity and the time controling of fault.And dynamic testing method effectively can make up this deficiency, as long as according to designing the fault logic built in the present invention, can simulate and control required fault type and fault-time flexibly.Conventional test device often underaction when simulating the short trouble in nonmetal character and oscillatory process.And this dynamic testing method, utilize the mode of slide block simply to set the control of short trouble in nonmetal character short circuit and oscillatory process, simulate the short trouble in nonmetal character in various degree and oscillatory process by the size arranging slide block intermediate variable value.
The present embodiment dynamic test comprises data recording fashion test, the test of device recording capacity, the large test of short-circuit current registering capacity, fault localization test etc.
Data recording fashion is tested:
(1) in fig. 2, in the single-phase permanent fault of K3 point analog line, its order is: 0.0 second single-phase fault, and---0.1 second excision fault---coincides with fault in 1.0 seconds---, and 1.1s fault is excised again.
(2) the data writing time of claimed apparatus, recording mode and sampling rate should meet as follows:
The A period: the status data before system large disturbances starts, export raw readings waveform and effective value, writing time >=0.04s, sampling rate is generally not less than 5kHz.
The B period: the status data at initial stage after system large disturbances, can directly export raw readings waveform, can be observed 5 subharmonic, simultaneously also the effective value of each cycle exportable and direct current component value, writing time >=0.1s, sampling rate is generally not less than 5kHz.
The C period: the interim status data after system large disturbances, export continuous print effective value, writing time >=1.0s, the writing time of record record ripple and sampling rate.
The D period: system dynamic course data, every 0.1s exports an effective value, writing time >=20s, the writing time of record record ripple and sampling rate.
The E period: the dynamic data of system growth process, every 1s exports an effective value, writing time > 10min.
Total record ripple time; Be greater than 3 seconds; Time zero error of coordinate
1 millisecond, the writing time of record record ripple and sampling rate.
Device recording capacity is tested:
(1) in 10min, in succession there is twice permanent fault in circuit, and then system starts growth process vibration, after vibration is calmed down, circuit in succession three permanent faults occurs again, each fault comprises following process: fault generation → failure removal → coincide with permanent fault → again excise fault;
(2) in 10min, twice permanent fault occurs circuit in succession, and then system starts growth process vibration, in oscillatory process, circuit in succession three permanent faults occurs again, and each failure process is with (1)
(3) in 20s, circuit occurs five permanent faults in succession, immediately a 10min growth process vibration, each failure process is with (1)
(4) above process is carried out continuously, the whole fault of claimed apparatus energy complete documentation and oscillatory process data, and data content is correct, and recording mode meets the requirement of DL/T553-94.Check whether tested device has stable state (all-weather) writing function.
Large short-circuit current registering capacity test:
(1) at the double simulation three-phase shortcircuit of K1 point, each duration of short-circuit is 0.04s, and twice short circuit interval time is 1s, controls switching angle, makes the aperiodic component of certain phase short-circuit current reach maximum.
(2) above-mentioned test carries out twice, and during test, short-circuit current effective value is respectively 20 times and 10 times of rated current, and the current waveform of claimed apparatus record is undistorted, and current instantaneous value measuring error is not more than 10%.
Fault localization is tested:
(1) K1, K2, K3 point simulation Single Phase Metal ground connection in fig. 2, two-phase metallic short circuit, single-phase through 10 Ω transition resistance ground connection and line to line fault again through 10 Ω transition resistance ground connection.
(2) K2, K3 point simulation Single Phase Metal ground connection in fig. 2, two-phase metallic short circuit, single-phase through 10 Ω transition resistance ground connection and line to line fault again through 10 Ω transition resistance earth fault time, the range error of claimed apparatus is not more than 5%, without sentencing mistake mutually.K1 point simulation Single Phase Metal ground connection, two-phase metallic short circuit, single-phase through 10 Ω transition resistance ground connection and line to line fault again in 10 Ω transition resistance ground connection during fault, the range error of claimed apparatus is not more than 2km, without sentencing mistake mutually.
Simulation work station, RTDS, power amplifier and circuit control protection device reasonably combine and achieve the digital dynamic mould test function of fault oscillograph by the present embodiment dynamic testing method.This dynamic testing method is applicable to the test of conventional fault oscillograph and network message record analysis and fault recording integrated device simultaneously.The method according to the grid operating conditions of reality, can carry out the real-time check of off-line equivalence to product to be tested.In testing process, use this dynamic testing method check produced problem to be indiscoverable in conventional static test process, the dynamic perfromance for detection failure oscillograph has applicability widely.
Claims (4)
1. based on a fault oscillograph dynamic testing method for RTDS real-time simulation, it is characterized in that, described method relies on RTDS emulation platform, sets up dynamic test system, builds dynamic test system realistic model, realizes dynamic test; Described dynamic test system has built the fault model detecting oscillograph precision on power grid model basis;
Described dynamic test system is connected and composed by analogue system workstation, RTDS real-time simulator, GTAO board, GTFPI plate, power amplifier, circuit control protection device and fault oscillograph; Analogue system workstation is connected with RTDS by LAN (Local Area Network), the digital signal that RTDS exports is connected to the input end of power amplifier after GTAO board exports, the secondary singal that power amplifier exports is connected to circuit control protection device simultaneously, and fault oscillograph series connection is in loop; The breaker tripping and closing signal that analogue system workstation exports is connected by the tripping relay of GTFPI card circuit control protection device, and the breaker tripping and closing signal that circuit control protection device exports is connected with fault oscillograph.
2. a kind of fault oscillograph dynamic testing method based on RTDS real-time simulation according to claim 1, it is characterized in that, described dynamic test system realistic model comprises generator model, boosting varying model, two circuit models, fault verification model, load model, voltage transformer (VT) model summation current transformer model, switch models and bus models; Article two, circuit model is arranged between bus M and bus N; Bus M side connects generator model, load model and boosting varying model; Generator model is by the first boosting varying model connection bus M side, and load model is by the second boosting varying model connection bus M side; Bus N side arranges and connects equivalent infinitely great power-supply system; Be two circuit models between bus M and bus N; Circuit model 1 comprises Brk1 isolating switch, 1TA current transformer, 2TA current transformer, Brk2 isolating switch; Circuit model 2 comprises Brk3 isolating switch and Brk4 isolating switch; M side bus model comprises 1TV voltage transformer (VT) and adjacent outlet, and N side bus model comprises 2TV voltage transformer (VT) and adjacent outlet.
3. a kind of fault oscillograph dynamic testing method based on RTDS real-time simulation according to claim 1, it is characterized in that, described fault model is divided into simple fault model and complex fault model; After the logic of two kinds of fault models forms jointly, dynamic mode can draw up various dissimilar fault, can the mode of slide block be utilized simply to set the control of short trouble in nonmetal character short circuit and oscillatory process, simulate the short trouble in nonmetal character in various degree and oscillatory process by the size arranging slide block intermediate variable value.
4. a kind of fault oscillograph dynamic testing method based on RTDS real-time simulation according to claim 1, it is characterized in that, the secondary singal that described power amplifier exports comprises voltage signal and current signal, and the voltage and current analog signals after amplifying is connected on the sampling terminal of circuit control guarantor and fault wave recording device; If digitizing control protection device, be then first connected on the merge cells MU device of circuit after power amplifier exports, be connected to after the conversion of merge cells MU device on control guarantor and failure wave-recording apparatus.
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| CN106226721B (en) * | 2016-09-22 | 2018-11-09 | 许昌许继软件技术有限公司 | A kind of fault oscillograph starting performance test method and system |
| CN106707218A (en) * | 2017-03-14 | 2017-05-24 | 贵州电网有限责任公司电力科学研究院 | Grounding line selection device test platform and method based on ADPSS fault recording and playback |
| CN107219488A (en) * | 2017-08-03 | 2017-09-29 | 许昌开普检测技术有限公司 | A kind of digitlization real-time simulation platform suitable for fault detector automatic detection |
| CN110672945A (en) * | 2019-09-28 | 2020-01-10 | 上海电力大学 | Line protection automatic test system based on real-time digital simulation system |
| CN111610390A (en) * | 2020-04-28 | 2020-09-01 | 国网河北省电力有限公司电力科学研究院 | Intelligent fault recorder testing method |
| CN111679140A (en) * | 2020-06-01 | 2020-09-18 | 广西电网有限责任公司电力科学研究院 | Feeder automation test system based on RTDS real-time digital simulator |
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| CN112487745A (en) * | 2020-11-18 | 2021-03-12 | 国网辽宁省电力有限公司朝阳供电公司 | Design method of fault positioning hardware-in-the-loop simulation system |
| CN113049915B (en) * | 2021-03-17 | 2022-06-17 | 福建奥通迈胜电力科技有限公司 | Fault simulation system for recording type fault indicator |
| CN114185324B (en) * | 2021-10-25 | 2024-04-02 | 华能澜沧江水电股份有限公司 | Abnormal point detection method and device for automatic power generation control program and computer equipment |
| CN115542227B (en) * | 2022-10-25 | 2023-07-18 | 浙江华电器材检测研究院有限公司 | Software simulation verification method, system, device and medium for true test |
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| JPH09189747A (en) * | 1996-01-10 | 1997-07-22 | Mitsubishi Electric Corp | Inspection system for malfunction detection means |
| CN101566677A (en) * | 2009-05-26 | 2009-10-28 | 中国电力科学研究院 | Test result evaluation method of fault recorder |
| CN201707410U (en) * | 2010-05-26 | 2011-01-12 | 天津市电力公司 | Digital dynamic simulation testing system of a simple bus difference protection device based on RTDS |
| CN102435970A (en) * | 2011-09-14 | 2012-05-02 | 广西电网公司电力科学研究院 | Test scheme for line selection function of small-current ground system single-phase ground fault line selection device |
| CN203276027U (en) * | 2013-06-04 | 2013-11-06 | 国家电网公司 | Digital dynamic closed-loop test system of electricity smooth and steady supply device |
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