CN110989966B

CN110989966B - Audio data processing method and device and electronic device

Info

Publication number: CN110989966B
Application number: CN201911206946.2A
Authority: CN
Inventors: 杨海波
Original assignee: Shanghai Mxchip Information Technology Co Ltd
Current assignee: Shanghai Mxchip Information Technology Co Ltd
Priority date: 2019-11-29
Filing date: 2019-11-29
Publication date: 2023-02-17
Anticipated expiration: 2039-11-29
Also published as: CN110989966A

Abstract

The invention discloses an audio data processing method and device and an electronic device. The method comprises the following steps: acquiring original audio data from a server; decoding the original audio data into pulse code modulation data; replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, wherein the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process; and sending the processed audio data to a second chip so that the second chip decodes the processed audio data into an analog audio signal for playing. The invention solves the technical problem that in the audio playing mode adopted in the related technology, if the slave equipment cannot fill PCM data in time, the master equipment can generate noise during playing.

Description

Audio data processing method and device and electronic device

Technical Field

The invention relates to the field of computers, in particular to a method and a device for processing audio data and an electronic device.

Background

An Inter-IC Sound (I2S) bus is a bus standard established for transmitting audio data between digital audio devices. The bus is specially used for data transmission between audio devices and is widely applied to various multimedia systems. The bus adopts a design of transmitting a clock signal and a data signal along independent wires, and the data and the clock signal are separated, so that distortion caused by time difference is avoided, and the cost of additionally purchasing professional equipment for resisting audio jitter is saved.

The I2S bus is an audio transmission bus that connects two multimedia systems. A standard I2S protocol may typically include the following three signal lines:

(1) Serial Clock (SCLK) signal line, SCLK frequency =2 sampling frequency sampling bit depth.

(2) And a channel select (WS) signal line for selecting whether to transmit left channel data or right channel data, where WS is 1 for transmitting left channel data and WS is 0 for transmitting right channel data.

(3) A Serial Data (SD) signal line, which is audio data expressed with two's complement. An audio sender may send Pulse Code Modulation (PCM) data to an audio receiver through an SD signal line.

In a general case, two signal lines SCLK and WS are signals generated by a Master (Master), and SD is a signal for transmitting audio data from an audio transmitter to an audio receiver. Taking a conventional sound as an example, the sound is connected to an audio codec (codec) chip (which corresponds to an audio decoding unit) through an I2S bus by a Central Processing Unit (CPU). The CPU is responsible for generating PCM data and sending the PCM data to the audio codec chip through an I2S bus. The audio codec chip can decode the received PCM data into analog audio signals and play the analog audio signals through an audio amplifier and a loudspeaker.

At present, a child story machine provided in the related art needs to be connected to a cloud server in a wireless fidelity (Wi-Fi) manner to complete audio playing and collecting functions, thereby implementing a man-machine conversation function and an audio playing function. In order to reduce the hardware cost of the product, a low-end Microprocessor (MCU) can be adopted and is connected to an audio codec chip through an I2S bus.

Fig. 1 is a schematic diagram of an audio data transmission structure according to the related art, in which, as shown in fig. 1, an audio codec chip is set as a Master of I2S and an MCU is set as a Slave (Slave) of I2S. During the playing of audio data using the standard I2S protocol, a situation of voice pause often occurs. The reason why the sound is stuck is that: in the process of playing audio data, the MCU needs to download the audio data of the MP3 from the cloud server in the WiFi manner, then obtain PCM data by decoding, and then transmit the PCM data to the audio codec chip through the I2S bus. It can thus be determined that the MCU needs to continuously perform an audio data download operation, an audio data decoding operation, and also needs to transmit PCM data through the I2S bus. If the performance of the MCU chip is limited, the PCM data on the MCU is not prepared when the audio codec chip initiates a PCM data request. At this time, the MCU lacks PCM data that can be transmitted to the audio codec chip, and thus the SD signal line is always at a low level, whereas the audio codec chip considers that PCM data represented by 0 is received. Although PCM data can be transmitted to the audio codec chip when the PCM data on the MCU is ready, some PCM data represented by 0 is occasionally introduced in the middle, and thus the played sound occasionally has a "kis kiss" noise.

In view of the above problems, no effective solution has been proposed.

Disclosure of Invention

At least some embodiments of the present invention provide a method, an apparatus, and an electronic apparatus for processing audio data, so as to at least solve the technical problem that in an audio playing mode adopted in the related art, if a slave device cannot fill PCM data in time, a master device may generate noise during playing.

According to an embodiment of the present invention, there is provided a method for processing audio data, the method being applied to a first chip, the method including:

acquiring original audio data from a server; decoding the original audio data into pulse code modulation data; replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, wherein the first level is lower than the second level and higher than the third level, and the first audio data is audio data generating noise in an audio playing process; and sending the processed audio data to a second chip so that the second chip decodes the processed audio data into an analog audio signal for playing.

Optionally, replacing the first audio data in the pulse code modulation data with the second audio data and the third audio data comprises: acquiring first audio data from pulse code modulation data; the second audio data and the third audio data are alternately converted in sequence according to the generation order of the first audio data.

Optionally, before sending the processed audio data to the second chip, the method further includes: and receiving a serial clock signal from the second chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from the first frequency to the second frequency.

Optionally, sending the processed audio data to the second chip includes: and sending the processed audio data to the second chip according to the second frequency.

According to an embodiment of the present invention, there is provided another audio data processing method applied to a second chip connected to a first chip through an integrated circuit built-in audio bus, the method including:

receiving processed audio data from a first chip, wherein the processed audio data is obtained by decoding original audio data into pulse code modulation data by the first chip, replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level, the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process; and decoding the processed audio data into an analog audio signal for playing.

Optionally, before decoding the processed audio data into an analog audio signal for playing, the method further includes: and discarding all the first audio data received by the integrated circuit built-in audio bus.

Optionally, before decoding the processed audio data into an analog audio signal for playing, the method further includes: and sending a serial clock signal to the first chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from the first frequency to the second frequency.

Optionally, before decoding the processed audio data into an analog audio signal for playing, the method further includes: and setting a buffer area according to the first frequency and the second frequency, wherein the buffer area is used for buffering the audio data which is not decoded into an analog audio signal and played when the first chip sends the processed audio data according to the second frequency.

There is further provided, according to an embodiment of the present invention, an apparatus for processing audio data, the apparatus being applied to a first chip, the apparatus including:

the acquisition module is used for acquiring original audio data from the server; the decoding module is used for decoding the original audio data into pulse code modulation data; the processing module is used for replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, wherein the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process; and the sending module is used for sending the processed audio data to the second chip so that the second chip decodes the processed audio data into an analog audio signal for playing.

Optionally, the processing module comprises: an acquisition unit configured to acquire first audio data from pulse code modulation data; and the processing unit is used for alternately converting the first audio data into second audio data and third audio data in turn according to the generation sequence of the first audio data.

Optionally, the apparatus further comprises: and the receiving module is used for receiving the serial clock signal from the second chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from the first frequency to the second frequency.

Optionally, the sending module is configured to send the processed audio data to the second chip according to the second frequency.

According to an embodiment of the present invention, there is provided another audio data processing apparatus applied to a second chip connected to a first chip through an integrated circuit built-in audio bus, the apparatus including:

the receiving module is used for receiving processed audio data from the first chip, wherein the processed audio data is obtained by decoding original audio data into pulse code modulation data by the first chip and replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level, the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process; and the processing module is used for decoding the processed audio data into an analog audio signal for playing.

Optionally, the apparatus further comprises: and the discarding module is used for discarding all the first audio data received by the built-in audio bus of the integrated circuit.

Optionally, the apparatus further comprises: the sending module is used for sending a serial clock signal to the first chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from a first frequency to a second frequency.

Optionally, the apparatus further comprises: the setting module is used for setting a buffer area according to the first frequency and the second frequency, wherein the buffer area is used for buffering the audio data which is not decoded into an analog audio signal and played when the first chip sends the processed audio data according to the second frequency.

There is further provided, according to an embodiment of the present invention, an electronic apparatus including a memory and a processor, the processor including: a first chip and a second chip, the memory having stored therein a computer program, the first chip being configured to run the computer program to perform the method of processing audio data in any of the above, the second chip being configured to run the computer program to perform the method of processing another audio data in any of the above.

In at least some embodiments of the present invention, in a manner of obtaining original audio data from a server, decoding the original audio data into pulse code modulation data, and replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, the processed audio data is sent to a second chip, so that the second chip decodes the processed audio data into an analog audio signal for playing, and the purpose of improving audio playing quality and being not easily perceived by removing audio data that is easily generated with noise is achieved, thereby achieving technical effects of improving error correction capability of transmitted audio data and reducing packet loss rate of transmitted audio data, and further solving a technical problem that, in an audio playing mode adopted in related technologies, if a slave device cannot fill PCM data in time, a master device may generate noise during playing.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention and do not constitute a limitation of the invention. In the drawings:

fig. 1 is a schematic view of an audio data transmission structure according to the related art;

FIG. 2 is a flow chart of a method of processing audio data according to one embodiment of the present invention;

fig. 3 is a flowchart of another audio data processing method according to an embodiment of the present invention;

fig. 4 is a block diagram of a configuration of an apparatus for processing audio data according to an embodiment of the present invention;

fig. 5 is a block diagram of a configuration of an apparatus for processing audio data according to an alternative embodiment of the present invention;

fig. 6 is a block diagram of a configuration of an apparatus for processing audio data according to an embodiment of the present invention;

fig. 7 is a block diagram of another audio data processing apparatus according to an alternative embodiment of the present invention.

Detailed Description

In order to make those skilled in the art better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in other sequences than those illustrated or described herein. Moreover, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In accordance with one embodiment of the present invention, there is provided an embodiment of a method for processing audio data, it is noted that the steps illustrated in the flowchart of the drawings may be performed in a computer system such as a set of computer-executable instructions and that, although a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that presented herein.

The method embodiment may be performed in a story machine or similar computing device. For example, operating on a story machine, the story machine may include one or more processors and memory for storing data. The processor may include a first chip and a second chip. The first chip may include, but is not limited to, a Central Processing Unit (CPU), a Digital Signal Processing (DSP) chip, a Microprocessor (MCU), or a programmable logic device (FPGA) or other processing device. The second chip may include, but is not limited to, an audio decoding unit such as an audio codec chip. The first chip and the second chip are connected through an I2S bus.

Optionally, the story machine may further comprise a transmission device for communication function, an input-output device and a display device. It will be appreciated by persons skilled in the art that the above description is illustrative only and is not intended to limit the structure of the story machine. For example, the story machine may also include more or fewer components than described above, or have a different configuration than described above.

The memory may be used to store computer programs, for example, software programs and modules of application software, such as computer programs corresponding to the audio data processing method in the embodiment of the present invention, and the processor executes various functional applications and data processing, i.e., implements the above-mentioned audio data processing method, by running the computer programs stored in the memory. The memory may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory may further include memory located remotely from the processor, and these remote memories may be connected to the story machine over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission device is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the story machine. In one example, the transmission device includes a Network adapter (NIC) that can be connected to other Network devices through a base station so as to communicate with the internet. In one example, the transmission device may be a Radio Frequency (RF) module, which is used for communicating with the internet in a wireless manner.

The display device may be, for example, a touch screen type Liquid Crystal Display (LCD) and a touch display (also referred to as a "touch screen" or "touch display screen"). The liquid crystal display may enable a user to interact with a user interface of the story machine. In some embodiments, the story machine has a Graphical User Interface (GUI) with which a user may interact human-machine by touching finger contacts and/or gestures on the touch-sensitive surface, where the human-machine interaction functionality optionally includes the following interactions: executable instructions for playing digital music and/or playing digital stories, etc., for performing the above-described human-machine interaction functions are configured/stored in one or more processor-executable computer program products or readable storage media.

In this embodiment, a method for processing audio data running on the story machine is provided, and fig. 2 is a flowchart of a method for processing audio data according to an embodiment of the present invention, as shown in fig. 2, the method is applied to a first chip, and the method includes the following steps:

step S22, acquiring original audio data from a server;

step S24, decoding the original audio data into pulse code modulation data;

step S26, replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, wherein the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in the audio playing process;

and step S28, sending the processed audio data to the second chip so that the second chip decodes the processed audio data into an analog audio signal for playing.

Through the steps, the mode that the original audio data are obtained from the server, the original audio data are decoded into the pulse code modulation data, the first audio data of the first level in the pulse code modulation data are replaced by the second audio data of the second level and the third audio data of the third level to obtain the processed audio data is adopted, the processed audio data are sent to the second chip, the second chip decodes the processed audio data into the analog audio signals to be played, the purpose that the audio playing quality is improved and the audio playing quality is not easy to perceive is achieved by removing the audio data which are easy to generate noise, the technical effects that the error correction capability of the transmitted audio data is improved, and the packet loss rate of the transmitted audio data is reduced are achieved, and the technical problem that in an audio playing mode adopted in the related technology, if the slave equipment cannot fill PCM data in time, the master equipment can generate noise during playing is solved.

In an optional embodiment, the first chip may be an MCU, and the second chip may be an audio codec chip. In the process of playing audio data by using a standard I2S protocol, the MCU needs to download the audio data of the MP3 from the cloud server in a WiFi manner, decode the audio data to obtain PCM data (which is hexadecimal data), and transmit the PCM data to the audio codec chip through the I2S bus. To solve the noise problem, it is necessary to be able to identify PCM data that the MCU cannot fill in time and discard this portion of audio data. Since the extra data generated by such late padding is usually represented as 0 (i.e., the first audio data at the first level), during the sending of the PCM data by the MCU, 0 in the original PCM data may be sequentially replaced with 1 (i.e., the second audio data at the second level) and-1 (i.e., the third audio data at the third level), respectively, so as to determine that the PCM data transmitted via the I2S bus does not contain 0, and the PCM data received by the audio codec chip and represented by 0 may be regarded as erroneous data, and thus may be directly discarded. Since the PCM data represented by 0 is very close to the PCM data represented by alternating 1 and-1, the audio playback effect is not significantly affected. Meanwhile, since PCM data represented by 0 are all discarded, the occurrence of a gars' noise can be effectively avoided.

Alternatively, in step S26, replacing the first audio data in the pulse code modulation data with the second audio data and the third audio data may include performing the steps of:

step S261, acquiring first audio data from the pulse code modulation data;

step S262, the second audio data and the third audio data are alternately converted in sequence according to the generation order of the first audio data.

In order to ensure that audio data represented by 0 does not appear in the original PCM data, it is necessary to acquire audio data represented by 0 from the PCM data and then sequentially and alternately convert the audio data represented by 1 and the audio data represented by-1 in the order of generation of the audio data represented by 0. For example: if 000000 \8230isfound in the original PCM data, the first 0 can be replaced by 1, the second 0 can be replaced by-1, the third 0 can be replaced by 1, the fourth 0 can be replaced by-1, and so on until all the replacements are finished, thus obtaining the processed audio data of 1-11-11-1 \8230. This ensures that the audio energy remains generally constant and is not perceptible to the human ear because of the small differences between 0 and 1 and between 0 and-1.

It should be noted that the alternatives given by way of example above are not intended to unduly limit the invention, and that other equivalents are intended to be encompassed within the scope of the embodiments of the invention. For example: the first 0 can be replaced by-1, the second 0 can be replaced by 1, the third 0 can be replaced by-1, the fourth 0 can be replaced by 1, and the like, until all the replacements are finished, the processed audio data of-11-11-11 \8230canbe obtained.

Optionally, before sending the processed audio data to the second chip in step S28, the following steps may be further included:

step S20, receiving a serial clock signal from the second chip, wherein the serial clock signal is used to control the first chip to increase the serial clock frequency from the first frequency to the second frequency.

In an optional embodiment, a certain data buffering capacity can be added to the audio codec chip, the serial clock signal of the I2S bus is set to be about greater than the sampling frequency, and the problem of blank audio data generated due to the fact that the MCU cannot fill PCM data in time is solved by setting an additional buffer. Therefore, the audio codec chip may control the first chip to increase the serial clock frequency from the first frequency (SCLK frequency =2 × sampling frequency × sampling bit depth) to the second frequency through the serial clock signal. I.e., the second frequency is greater than the frequency of SCLK.

Optionally, in step S28, sending the processed audio data to the second chip may include performing the steps of:

step S281, sending the processed audio data to the second chip according to the second frequency.

When the MCU sends the processed audio data to the audio codec chip according to the first frequency, the processed audio data sent by the MCU can be decoded into an analog audio signal by the audio codec chip for playing, so that if the MCU cannot fill the PCM data in time, the audio codec chip can consider that the MCU sends blank audio data (namely, audio data represented by 0). For this reason, the audio codec chip increases the serial clock frequency from the first frequency to the second frequency by controlling the MCU, and the data amount of the processed audio data transmitted from the MCU to the audio codec chip will exceed the decoding processing capability of the audio codec chip. At this time, the partial processed audio data beyond the decoding processing capability of the audio codec chip can be stored in the buffer memory arranged in the audio codec chip, and further, under the condition that the MCU cannot fill the PCM data in time, the audio codec chip can still decode the partial processed audio data in the buffer memory into an analog audio signal for playing while discarding the blank part of the audio data.

In this embodiment, another method for processing audio data operating in a story machine is provided, and fig. 3 is a flowchart of another method for processing audio data according to an embodiment of the present invention, as shown in fig. 3, the method is applied to a second chip, and the method includes the following steps:

step S30, receiving processed audio data from a first chip, wherein the processed audio data is obtained by decoding original audio data into pulse code modulation data by the first chip, and replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level, the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process;

and step S34, decoding the processed audio data into an analog audio signal for playing.

Optionally, before decoding the processed audio data into an analog audio signal for playing in step S34, the following steps may be further included:

and step S31, discarding all the first audio data received by the integrated circuit built-in audio bus.

The audio data denoted by 0 received by the audio codec chip can be generally divided into the following two parts: first, audio data represented by 0 included in original PCM data; secondly, if the MCU can not fill PCM data in time, the audio codec chip can think that the MCU sends blank audio data. Therefore, although the audio data represented by 1 and the audio data represented by-1 are alternately converted in sequence in the order of generation of the audio data represented by 0, the audio data represented by 0 is not included in the processed PCM data any more, but the audio codec chip still receives a blank portion of the audio data if the MCU cannot fill the PCM data in time. At this time, the audio codec chip needs to directly lose the blank audio data, thereby further solving the noise problem.

step S32, sending a serial clock signal to the first chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from a first frequency to a second frequency;

step S33, setting a buffer area according to the first frequency and the second frequency, wherein the buffer area is used for buffering the audio data which is not decoded into the analog audio signal and played when the first chip sends the processed audio data according to the second frequency.

In an optional embodiment, certain data buffering capacity can be added to the audio codec chip, the serial clock signal of the I2S bus is set to be approximately greater than the sampling frequency, and the problem that the MCU cannot fill PCM data in time to generate blank audio data is solved by setting an additional buffer. Therefore, the audio codec chip may control the first chip to increase the serial clock frequency from the first frequency (SCLK frequency =2 × sampling frequency × sampling bit depth) to the second frequency by the serial clock signal. I.e., the second frequency is greater than the frequency of SCLK. For example: if a 5k extra buffer is provided in the audio codec chip, the second frequency will be increased by 10% relative to the first frequency.

When the MCU sends the processed audio data to the audio codec chip according to the first frequency, the processed audio data sent by the MCU can be decoded into an analog audio signal by the audio codec chip for playing, so that if the MCU cannot fill the PCM data in time, the audio codec chip can consider that the MCU sends blank audio data (namely, audio data represented by 0). For this reason, the audio codec chip increases the serial clock frequency from the first frequency to the second frequency by controlling the MCU, and the data amount of the processed audio data transmitted from the MCU to the audio codec chip will exceed the decoding processing capability of the audio codec chip. At this time, the partial processed audio data beyond the decoding processing capability of the audio codec chip can be stored in the buffer memory arranged in the audio codec chip, and further, under the condition that the MCU cannot fill the PCM data in time, the audio codec chip can still decode the partial processed audio data in the buffer memory into analog audio signals for playing while discarding the blank audio data.

Through the description of the foregoing embodiments, it is clear to those skilled in the art that the method according to the foregoing embodiments may be implemented by software plus a necessary general hardware platform, and certainly may also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention or portions thereof contributing to the prior art may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (which may be a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.

In this embodiment, an audio data processing apparatus is further provided, and the apparatus is used to implement the foregoing embodiments and preferred embodiments, and details are not repeated for what has been described. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.

Fig. 4 is a block diagram of an audio data processing apparatus according to an embodiment of the present invention, as shown in fig. 4, the apparatus being applied to a first chip, the apparatus including: an obtaining module 10, configured to obtain original audio data from a server; a decoding module 11, configured to decode original audio data into pulse code modulation data; the processing module 12 is configured to replace first audio data at a first level in the pulse code modulation data with second audio data at a second level and third audio data at a third level to obtain processed audio data, where the first level is lower than the second level and higher than the third level, and the first audio data is audio data that generates noise during an audio playing process; and the sending module 13 is configured to send the processed audio data to the second chip, so that the second chip decodes the processed audio data into an analog audio signal to play.

Optionally, the processing module 12 comprises: an acquisition unit (not shown in the figure) for acquiring first audio data from the pulse code modulation data; and a processing unit (not shown in the figure) for alternately converting into the second audio data and the third audio data in order in the order of generation of the first audio data.

Alternatively, fig. 5 is a block diagram of an apparatus for processing audio data according to an alternative embodiment of the present invention, and as shown in fig. 5, the apparatus includes, in addition to all the modules shown in fig. 4: and the receiving module 14 is configured to receive a serial clock signal from the second chip, where the serial clock signal is used to control the first chip to increase the serial clock frequency from the first frequency to the second frequency.

Optionally, the sending module 13 is configured to send the processed audio data to the second chip according to the second frequency.

In this embodiment, another audio data processing apparatus is further provided, and the apparatus is used to implement the foregoing embodiments and preferred embodiments, and details of which have been already described are not repeated. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.

Fig. 6 is a block diagram of a configuration of an audio data processing apparatus according to an embodiment of the present invention, as shown in fig. 6, applied to a second chip connected to a first chip through an integrated circuit built-in audio bus, the apparatus including: a receiving module 20, configured to receive processed audio data from a first chip, where the processed audio data is obtained by the first chip decoding original audio data into pulse code modulation data, and replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level, where the first level is lower than the second level and higher than the third level, and the first audio data is audio data that generates noise in an audio playing process; and the processing module 21 is configured to decode the processed audio data into an analog audio signal for playing.

Optionally, fig. 7 is a block diagram of another audio data processing apparatus according to an alternative embodiment of the present invention, and as shown in fig. 7, the apparatus includes, in addition to all the modules shown in fig. 6: and a discarding module 22, configured to discard all the first audio data received through the integrated circuit built-in audio bus.

Optionally, as shown in fig. 7, the apparatus includes, in addition to all the modules shown in fig. 6: the sending module 23 is configured to send a serial clock signal to the first chip, where the serial clock signal is used to control the first chip to increase the serial clock frequency from the first frequency to the second frequency.

Optionally, as shown in fig. 7, the apparatus includes, in addition to all the modules shown in fig. 6: the setting module 24 is configured to set a buffer according to the first frequency and the second frequency, where the buffer is used to buffer audio data that has not been decoded into an analog audio signal and played when the first chip sends the processed audio data according to the second frequency.

It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.

Embodiments of the present invention also provide a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the above method embodiments when executed.

Alternatively, in the present embodiment, the storage medium may be configured to store a computer program for executing the steps of:

s1, acquiring original audio data from a server;

s2, decoding the original audio data into pulse code modulation data;

s3, replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, wherein the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in the audio playing process;

and S4, sending the processed audio data to a second chip so that the second chip decodes the processed audio data into an analog audio signal for playing.

Optionally, in this embodiment, the storage medium may be further configured to store a computer program for executing the following steps:

s1, receiving processed audio data from a first chip, wherein the processed audio data is obtained by decoding original audio data into pulse code modulation data through the first chip, replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level, the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process;

and S2, decoding the processed audio data into an analog audio signal for playing.

Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing computer programs, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.

Embodiments of the present invention also provide an electronic device comprising a memory having a computer program stored therein and a processor arranged to run the computer program to perform the steps of any of the above method embodiments.

Optionally, the electronic apparatus may further include a transmission device and an input/output device, wherein the transmission device is connected to the processor, and the input/output device is connected to the processor.

Optionally, in this embodiment, the processor may be configured to execute the following steps by a computer program:

s1, acquiring original audio data from a server;

s2, decoding the original audio data into pulse code modulation data;

Optionally, in this embodiment, the processor may be further configured to execute the following steps by a computer program:

Optionally, for a specific example in this embodiment, reference may be made to the examples described in the above embodiment and optional implementation, and this embodiment is not described herein again.

The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.

In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed technical content can be implemented in other manners. The above-described apparatus embodiments are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or may not be executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention, which is substantially or partly contributed by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and amendments can be made without departing from the principle of the present invention, and these modifications and amendments should also be considered as the protection scope of the present invention.

Claims

1. A method for processing audio data, the method being applied to a first chip, the method comprising:

acquiring original audio data from a server;

decoding the original audio data into pulse code modulation data;

replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, wherein the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process;

and sending the processed audio data to a second chip so that the second chip decodes the processed audio data into an analog audio signal for playing.

2. The method of claim 1, wherein replacing the first audio data in the pulse code modulation data with the second audio data and the third audio data comprises:

acquiring the first audio data from the pulse code modulation data;

and alternately converting the first audio data into the second audio data and the third audio data in sequence according to the generation sequence of the first audio data.

3. The method of claim 1, further comprising, prior to sending the processed audio data to the second chip:

and receiving a serial clock signal from a second chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from a first frequency to a second frequency.

4. The method of claim 3, wherein sending the processed audio data to the second chip comprises:

and sending the processed audio data to the second chip according to the second frequency.

5. A method for processing audio data, the method being applied to a second chip connected to a first chip via an integrated circuit built-in audio bus, the method comprising:

receiving processed audio data from the first chip, wherein the processed audio data is obtained by decoding original audio data into pulse code modulation data by the first chip, and replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level, the first level is lower than the second level, and the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process;

and decoding the processed audio data into an analog audio signal for playing.

6. The method of claim 5, further comprising, prior to decoding the processed audio data into an analog audio signal for playback:

and discarding all the first audio data received through the integrated circuit built-in audio bus.

7. The method of claim 5, further comprising, prior to decoding the processed audio data into an analog audio signal for playback:

and sending a serial clock signal to the first chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from a first frequency to a second frequency.

8. The method of claim 7, further comprising, prior to decoding the processed audio data into an analog audio signal for playback:

and setting a buffer area according to the first frequency and the second frequency, wherein the buffer area is used for buffering audio data which is not decoded into an analog audio signal and played when the first chip sends the processed audio data according to the second frequency.

9. An apparatus for processing audio data, the apparatus being applied to a first chip, the apparatus comprising:

the acquisition module is used for acquiring original audio data from the server;

a decoding module, configured to decode the original audio data into pulse code modulation data;

the processing module is used for replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level to obtain processed audio data, wherein the first level is lower than the second level, the first level is higher than the third level, and the first audio data is audio data generating noise in an audio playing process;

and the sending module is used for sending the processed audio data to a second chip so that the second chip decodes the processed audio data into an analog audio signal for playing.

10. The apparatus of claim 9, wherein the processing module comprises:

an acquisition unit configured to acquire the first audio data from the pulse code modulation data;

and the processing unit is used for sequentially and alternately converting the first audio data into the second audio data and the third audio data according to the generation sequence of the first audio data.

11. The apparatus of claim 9, further comprising:

the receiving module is used for receiving a serial clock signal from a second chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from a first frequency to a second frequency.

12. The apparatus of claim 11, wherein the sending module is configured to send the processed audio data to the second chip at the second frequency.

13. An apparatus for processing audio data, the apparatus being applied to a second chip connected to a first chip via an integrated circuit built-in audio bus, the apparatus comprising:

a receiving module, configured to receive processed audio data from the first chip, where the processed audio data is obtained by decoding, by the first chip, original audio data into pulse code modulation data, and replacing first audio data of a first level in the pulse code modulation data with second audio data of a second level and third audio data of a third level, where the first level is lower than the second level and higher than the third level, and the first audio data is audio data that generates noise in an audio playing process;

and the processing module is used for decoding the processed audio data into an analog audio signal for playing.

14. The apparatus of claim 13, further comprising:

and the discarding module is used for discarding all the first audio data received by the built-in audio bus of the integrated circuit.

15. The apparatus of claim 13, further comprising:

the sending module is used for sending a serial clock signal to the first chip, wherein the serial clock signal is used for controlling the first chip to increase the serial clock frequency from a first frequency to a second frequency.

16. The apparatus of claim 15, further comprising:

and the setting module is used for setting a buffer area according to the first frequency and the second frequency, wherein the buffer area is used for buffering audio data which is not decoded into an analog audio signal and played when the first chip sends the processed audio data according to the second frequency.

17. An electronic device comprising a memory and a processor, the processor comprising: first and second chips, characterized in that a computer program is stored in the memory, the first chip being arranged to run the computer program to perform the method of processing audio data as claimed in any of the claims 1 to 4, the second chip being arranged to run the computer program to perform the method of processing audio data as claimed in any of the claims 5 to 8.