CN110970497A - IGBT power device - Google Patents
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- CN110970497A CN110970497A CN201811147957.3A CN201811147957A CN110970497A CN 110970497 A CN110970497 A CN 110970497A CN 201811147957 A CN201811147957 A CN 201811147957A CN 110970497 A CN110970497 A CN 110970497A
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- 210000000746 body region Anatomy 0.000 claims abstract description 44
- 239000004065 semiconductor Substances 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 34
- 238000002955 isolation Methods 0.000 claims description 25
- 239000010410 layer Substances 0.000 description 69
- 239000011229 interlayer Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0804—Emitter regions of bipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The invention belongs to the technical field of IGBT power devices, and particularly discloses an IGBT power device, which comprises: a semiconductor substrate; at least one group of adjacent first gate trenches and second gate trenches in the semiconductor substrate; the body region is positioned between the first gate groove and the second gate groove; an emitter region located in the body region; the gate dielectric layer and the control gate are respectively positioned in the first gate groove and the second gate groove; and the emitter contact hole extends to the position above the first gate groove, and control gates in the body region, the emitter region and the first gate groove are all connected with an emitter voltage outside through an emitter metal layer in the emitter contact hole. The invention can reduce the space between adjacent gate grooves in the IGBT power device, thereby reducing the size of the chip of the IGBT power device.
Description
Technical Field
The invention belongs to the technical field of IGBT power devices, and particularly relates to an IGBT power device capable of reducing the space between adjacent gate trenches.
Background
Fig. 1 is a schematic cross-sectional structure diagram of a prior art IGBT power device, and as shown in fig. 1, the prior art IGBT power device includes: the semiconductor device comprises a semiconductor substrate 100, a p-type collector region 10 located at the bottom of the semiconductor substrate 100, an n-type field stop region 90 located in the semiconductor substrate 100 and located above the p-type collector region 10, a plurality of gate trenches located in the semiconductor substrate 100, a p-type body region 16 located between adjacent gate trenches, an n-type emitter region 17 located in the p-type body region 16, an n-type drift region 11 of the IGBT power device located between the p-type body region 16 and the n-type field stop region 90, a gate dielectric layer 12, a control gate 13, an isolation dielectric layer 14 and a shield gate 15 located in the gate trenches, wherein the control gate 13 is generally located at the position of the side wall of the upper portion of the gate trenches and controls the opening and closing of a current channel between the n-type emitter region 17 and the n-type drift region 11 through external gate voltage. The shielding grid 15 is located in the grid groove and is isolated from the semiconductor substrate 100 and the control grid 13 through the isolation dielectric layer 14, the shielding grid 15 is connected with the n-type emitter region 17 through the emitter metal layer 19, and therefore the shielding grid 15 can form a transverse electric field in the n-type drift region 11 through the external emitter voltage, and the effect of improving the withstand voltage is achieved. The interlayer insulating layer 18 serves to isolate the emitter metal layer 19 from the gate metal layer, which is not shown in fig. 1, based on the positional relationship of the cross-section.
In the IGBT power device shown in fig. 1 in the related art, the emitter metal layer 19 is in contact with the n-type emitter region 17 and the p-type body region 16 at the middle position of the p-type body region 16, the emitter metal layer 19 is embedded in the p-type body region 16, the n-type emitter region 17 is provided on both sides of the emitter metal layer 19 in the p-type body region 16, and the pitch between adjacent gate trenches is difficult to be reduced due to the limitation of the photolithography process conditions.
Disclosure of Invention
In view of the above, an object of the present invention is to provide an IGBT power device, so as to solve the problem that the pitch between adjacent gate trenches in the IGBT power device in the prior art is difficult to shrink.
To achieve the above object, the present invention provides an IGBT power device, including:
a semiconductor substrate;
the p-type collector region is positioned at the bottom of the semiconductor substrate;
at least one group of adjacent first gate trenches and second gate trenches in the semiconductor substrate;
a p-type body region located between the first gate trench and the second gate trench;
an n-type emitter region in the p-type body region;
the gate dielectric layer and the control gate are respectively positioned in the first gate groove and the second gate groove;
and the control grid in the p-type body region, the n-type emitter region and the first grid groove is externally connected with an emitter voltage through an emitter metal layer in the emitter contact hole.
Optionally, in the IGBT power device of the present invention, the first gate trenches and the second gate trenches are alternately arranged at intervals in sequence.
Optionally, in the IGBT power device of the present invention, the p-type body regions located at two sides of the first gate trench share one emitter contact hole.
Optionally, in the IGBT power device of the present invention, the emitter metal layer is embedded in the p-type body region.
Optionally, the IGBT power device of the present invention further includes an isolation dielectric layer and a shield gate in the first gate trench, the shield gate in the first gate trench is isolated from the semiconductor substrate and the control gate in the first gate trench by the isolation dielectric layer, and the shield gate in the first gate trench is externally connected to an emitter voltage through the emitter metal layer in the emitter contact hole.
Optionally, in the IGBT power device of the present invention, the control gate in the first gate trench is located at a sidewall position of an upper portion of the first gate trench, and the shielding gate in the first gate trench covers a lower portion of the first gate trench and extends upward to an upper portion of the first gate trench.
Optionally, the IGBT power device of the present invention further includes an isolation dielectric layer and a shielding gate located in the second gate trench, the shielding gate in the second gate trench is isolated from the semiconductor substrate and the control gate in the second gate trench by the isolation dielectric layer, the shielding gate in the second gate trench is externally connected to an emitter voltage, and the control gate in the second gate trench is externally connected to a gate voltage.
Optionally, in the IGBT power device of the present invention, an opening width of the first gate trench is smaller than an opening width of the second gate trench.
Optionally, in the IGBT power device according to the present invention, the control gate in the second gate trench is located at a sidewall position of an upper portion of the second gate trench, and the shielding gate in the second gate trench covers a lower portion of the second gate trench and extends upward to an upper portion of the second gate trench.
Optionally, the IGBT power device of the present invention further includes an n-type field stop region located in the semiconductor substrate and located above the p-type collector region.
The invention provides an IGBT power device, which comprises: an emitter contact hole over the p-type body region between adjacent first and second gate trenches extends over the first gate trench, so that the p-type body region, the n-type emitter region and the control gate in the first gate trench can simultaneously connect an emitter voltage via the emitter metal layer in the emitter contact hole, so that the formation of an n-type emitter region between the emitter metal layer and the first gate trench in the p-type body region between the first gate trench and the second gate trench can be avoided, and the n-type emitter region interposed between the emitter metal layer and the second gate trench is formed only in the p-type body region between the first gate trench and the second gate trench, which can reduce the limitation of the photolithography process conditions, the distance between the adjacent first gate grooves and the second gate grooves can be further reduced, so that the size of an IGBT power device chip can be reduced.
Drawings
In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, a brief description is given below of the drawings used in describing the embodiments. It should be clear that the described figures are only views of some of the embodiments of the invention to be described, not all, and that for a person skilled in the art, other figures can be derived from these figures without inventive effort.
FIG. 1 is a schematic cross-sectional view of one embodiment of an IGBT power device of the prior art;
fig. 2 is a schematic cross-sectional structure diagram of a first embodiment of an IGBT power device provided by the present invention;
fig. 3 is a schematic cross-sectional structure diagram of a second embodiment of an IGBT power device according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be described in detail below with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, not all embodiments, and all other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without inventive efforts fall within the scope of the present invention.
It is to be understood that the terms "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof. Meanwhile, in order to clearly illustrate the embodiments of the present invention, the schematic diagrams listed in the drawings of the specification enlarge the thicknesses of the layers and regions of the present invention, and the sizes of the listed figures do not represent actual sizes; the drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure. The examples listed in the specification should not be limited to the specific shapes of the regions shown in the drawings of the specification, but include the resulting shapes such as deviations due to production and the like.
Fig. 2 is a schematic cross-sectional structure diagram of a first embodiment of an IGBT power device according to the present invention, and as shown in fig. 2, the IGBT power device according to the present invention includes a semiconductor substrate 400, where the semiconductor substrate 400 generally has n-type doping and is generally made of silicon. A p-type collector region 40 located at the bottom of the semiconductor substrate 400, an n-type field stop region 80 located in the semiconductor substrate 400 and above the p-type collector region 40, at least one set of adjacent first gate trenches 401 and second gate trenches 402 located in the semiconductor substrate 400. Preferably, the IGBT power device according to the present invention includes a plurality of sets of first gate trenches 401 and second gate trenches 402 that are adjacent to each other, and the first gate trenches 401 and the second gate trenches 402 are alternately arranged at intervals in sequence, and fig. 2 only illustrates an example of one set of first gate trenches 401 and second gate trenches 402 that are adjacent to each other.
A p-type body region 44 in the semiconductor substrate 400 between the first gate trench 401 and the second gate trench 402, and an n-type emitter region 45 in the p-type body region 44. The portion of the semiconductor substrate between p-type body region 44 and n-type field stop region 80 is divided into n-type drift region 41 of the IGBT power device.
The gate dielectric layer 42 and the control gate 43 are respectively located in the first gate trench 401 and the second gate trench 402, that is, the gate dielectric layer 42 and the control gate 43 are formed in both the first gate trench 401 and the second gate trench 402. The material of the gate dielectric layer 42 is typically silicon oxide, and the material of the control gate 43 is typically doped polysilicon.
An emitter contact hole 404 is formed in the interlayer insulating layer 46 above the p-type body region 44, the emitter contact hole 404 is formed in the interlayer insulating layer 46, and the material of the interlayer insulating layer 46 is typically silicon glass, borophosphosilicate glass or phosphosilicate glass. The emitter contact hole 404 located in the interlayer insulating layer 46 extends over the first gate trench 401 so that the p-type body region 44, the n-type emitter region 45, and the control gate 43 in the first gate trench 401 each externally connect the emitter voltage through the emitter metal layer 47 in the emitter contact hole 404. Preferably, the emitter metal layer 47 may be embedded in the p-type body region 44, as shown in fig. 2.
The control gate 43 located in the second gate trench 402 is externally connected to a gate voltage by a gate metal layer, which is not shown in fig. 2, and the interlayer insulating layer 46 serves to isolate the emitter metal layer 47 from the gate metal layer, and the control gate 43 in the second gate trench 402 controls on and off of a current channel between the n-type emitter region 45 and the n-type drift region 41 by the gate voltage, based on the sectional positional relationship of the IGBT power device shown in fig. 2.
In the IGBT power device according to the present invention shown in fig. 2, one emitter contact hole 404 located above the p-type body region 44 between the adjacent first gate trench 401 and second gate trench 402 extends to above the first gate trench 401, so that the p-type body region 44, the n-type emitter region 45, and the control gate 43 in the first gate trench 401 can simultaneously externally receive an emitter voltage through the emitter metal layer 47 in the emitter contact hole 401, whereby it is possible to avoid forming an n-type emitter region between the emitter metal layer 47 and the first gate trench 401 in the p-type body region 44 between the first gate trench 401 and the second gate trench 402, and to form an n-type emitter region 45 between the emitter metal layer 47 and the second gate trench 402 only in the p-type body region 44 between the first gate trench 401 and the second gate trench 402, which can reduce the limitation of the photolithography process conditions, can further reduce the interval between the adjacent first gate trench 401 and second gate trench 402, and further, the size of the IGBT power device chip can be reduced.
Fig. 3 is a schematic cross-sectional structure diagram of a second embodiment of an IGBT power device according to the present invention. As shown in fig. 3, an IGBT power device according to an embodiment of the present invention includes a semiconductor substrate 200, and the material of the semiconductor substrate 200 is typically silicon and has n-type doping. A p-type collector region 20 located at the bottom of the semiconductor substrate 200, and an n-type field stop region 60 located in the semiconductor substrate 200 and above the p-type collector region 20.
Optionally, in the IGBT power device of the present invention, an n-type collector region may also be formed at the bottom of the semiconductor substrate 200, and the n-type collector region and the p-type collector region are alternately arranged at intervals in sequence, which is a general structure in the prior art and is not specifically shown in the embodiments of the present invention.
The plurality of gate trenches are located in the semiconductor substrate 200, and the plurality of gate trenches should include at least one group of adjacent first gate trenches and second gate trenches, only three groups of adjacent first gate trenches 201 and second gate trenches 202 are exemplarily shown in fig. 3, and the first gate trenches 201 and the second gate trenches 202 are alternately arranged at intervals in sequence.
The p-type body region 26 located between the adjacent first and second gate trenches 201 and 202, the n-type emitter region 27 located in the p-type body region 26, and the semiconductor substrate portion located between the p-type body region 26 and the n-type field stop region 60 are divided into the n-type drift region 21 of the IGBT power device.
And the gate dielectric layer 22, the control gate 23, the isolation dielectric layer 24 and the shielding gate 25 are positioned in each first gate trench 201 and each second gate trench 202, the control gate 23 is isolated from the semiconductor substrate 200 through the gate dielectric layer 22, and the shielding gate 25 is isolated from the control gate 23 and the semiconductor substrate 200 through the isolation dielectric layer 24. Typically, the gate dielectric layer 22 and the isolation dielectric layer 24 are made of silicon oxide, and the control gate 23 and the shielding gate 25 are made of doped polysilicon.
In the first gate trench 201: the control gate 23 is located at the sidewall position of the upper portion of the first gate trench 201, the shielding gate 25 covers the lower portion of the first gate trench 201 and extends upward to the upper portion of the gate trench 201, and the shielding gate 25 is isolated from the semiconductor substrate 200 and the control gate 23 by the isolation dielectric layer 24. The thickness of the isolation dielectric layer 24 between the shielding gate 25 and the semiconductor substrate 200 may be the same as the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the control gate 23, or may be greater than the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the control gate 23, and fig. 3 only shows the structure in which the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the semiconductor substrate 200 is the same as the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the control gate 23.
An emitter contact hole 203 is formed in the interlayer insulating layer 28 over the p-type body region 26 between the first gate trench 201 and the second gate trench 202, the emitter contact hole 203 extending over the first gate trench 201. Since the first gate trenches 201 and the second gate trenches 202 are alternately arranged at intervals in sequence, the p-type body regions 26 on both sides of the first gate trenches 201 can share one emitter contact hole 203, that is, the width of the emitter contact hole 203 is greater than the opening width of the first gate trenches 201, and thus the control gate 23, the shielding gate 25, and the p-type body regions 26 and the n-type emitter regions 27 on both sides of the first gate trenches 201 in the first gate trenches 201 are all externally connected with an emitter voltage through the emitter metal layer 29 in the emitter contact hole 203.
In the second gate trench 202: the control gate 23 is located at a sidewall position of an upper portion of the second gate trench 202, the shielding gate 25 covers a lower portion of the second gate trench 202 and extends upward to the upper portion of the gate trench 202, and the shielding gate 25 is isolated from the semiconductor substrate 200 and the control gate 23 by the isolation dielectric layer 24. The thickness of the isolation dielectric layer between the shielding gate 25 and the semiconductor substrate 200 may be the same as the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the control gate 23, or may be greater than the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the control gate 23, and fig. 3 only shows the structure in which the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the semiconductor substrate 200 is the same as the thickness of the isolation dielectric layer 24 between the shielding gate 25 and the control gate 23.
The shield gate 25 in the second gate trench 202 is externally connected to an emitter voltage through the emitter metal layer 29, and the control gate 23 in the second gate trench 202 is externally connected to a gate voltage through the gate metal layer, so that the control gate 23 in the second gate trench 202 controls on and off of a current channel between the n-type emitter region 27 and the n-type drift region 21 through the gate voltage. The gate metal layer is not shown in fig. 3 based on the cross-sectional positional relationship of the IGBT power device shown in fig. 3. The material of the interlayer insulating layer 28 is typically silicon glass, borophosphosilicate glass or phosphosilicate glass, and the interlayer insulating layer 28 is used to isolate the emitter metal layer 29 from the gate metal layer.
In an IGBT power device of the invention as shown in fig. 3, preferably, an emitter metal layer 29 is embedded in the p-type body region 26. Alternatively, the emitter metal layer 29 may not be embedded in the p-type body region 26, but a contact region with high doping concentration is formed in the p-type body region 26, and the emitter metal layer 29 is in contact connection with the p-type body region 26 through the contact region with high doping concentration, which is a structure frequently used in the prior art and is not specifically shown in the embodiment of the present invention.
In the IGBT power device shown in fig. 3, in the first gate trench 201, the emitter metal layer 29 is directly connected to the shield gate 25 and the control gate 23 in a contact manner below one emitter contact hole 203, so that it is possible to avoid forming separate contact hole structures above the shield gate 25 and the control gate 23, which can reduce the limitation of the photolithography process conditions, reduce the widths of the control gate 23 and the shield gate 25 in the first gate trench 201, make the opening width of the first gate trench 201 smaller than the opening width of the second gate trench 202, and further reduce the area of the IGBT power device chip.
In the IGBT power device shown in fig. 3, the control gate 23 and the shielding gate 25 in the first gate trench 201 and the second gate trench 202 may also be in an upper and lower structure, which is a structure commonly used in the prior art and will not be described in detail in the embodiment of the present invention.
The above embodiments and examples are specific supports for the technical idea of the IGBT power device proposed by the present invention, and the protection scope of the present invention cannot be limited thereby, and any equivalent changes or equivalent changes made on the basis of the technical scheme according to the technical idea proposed by the present invention still belong to the protection scope of the technical scheme of the present invention.
While embodiments of the invention have been described above, it is not limited to the applications set forth in the description and the embodiments, which are fully applicable in various fields of endeavor to which the invention pertains, and further modifications may readily be made by those skilled in the art, it being understood that the invention is not limited to the details shown and described herein without departing from the general concept defined by the appended claims and their equivalents.
Claims (10)
1. An IGBT power device, characterized by comprising:
a semiconductor substrate;
the p-type collector region is positioned at the bottom of the semiconductor substrate;
at least one group of adjacent first gate trenches and second gate trenches in the semiconductor substrate;
a p-type body region located between the first gate trench and the second gate trench;
an n-type emitter region in the p-type body region;
the gate dielectric layer and the control gate are respectively positioned in the first gate groove and the second gate groove;
and the control grid in the p-type body region, the n-type emitter region and the first grid groove is externally connected with an emitter voltage through an emitter metal layer in the emitter contact hole.
2. The IGBT power device of claim 1, wherein the first gate trenches and the second gate trenches are alternately arranged at intervals in sequence.
3. The IGBT power device of claim 2, wherein the p-type body regions on both sides of the first gate trench share an emitter contact hole.
4. The IGBT power device of claim 1, wherein the emitter metal layer is embedded within the p-type body region.
5. The IGBT power device of claim 1, further comprising an isolation dielectric layer and a shield gate in the first gate trench, the shield gate in the first gate trench being isolated from the semiconductor substrate and the control gate in the first gate trench by the isolation dielectric layer, the shield gate in the first gate trench being externally connected to an emitter voltage through the emitter metal layer in the emitter contact hole.
6. The IGBT power device of claim 5, wherein the control gate in the first gate trench is located at a sidewall position of an upper portion of the first gate trench, and the shield gate in the first gate trench covers a lower portion of the first gate trench and extends up to the upper portion of the first gate trench.
7. The IGBT power device of claim 1, further comprising an isolation dielectric layer and a shield gate in the second gate trench, wherein the shield gate in the second gate trench is isolated from the semiconductor substrate and the control gate in the second gate trench by the isolation dielectric layer, the shield gate in the second gate trench is externally connected to an emitter voltage, and the control gate in the second gate trench is externally connected to a gate voltage.
8. The IGBT power device according to claim 7, wherein an opening width of the first gate trench is smaller than an opening width of the second gate trench.
9. The IGBT power device according to claim 7, wherein the control gate in the second gate trench is located at a sidewall position of an upper portion of the second gate trench, and the shield gate in the second gate trench covers a lower portion of the second gate trench and extends up to the upper portion of the second gate trench.
10. The IGBT power device of claim 1, further comprising an n-type field stop region in the semiconductor substrate and above the p-type collector region.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811147957.3A CN110970497A (en) | 2018-09-29 | 2018-09-29 | IGBT power device |
| PCT/CN2019/108740 WO2020063919A1 (en) | 2018-09-29 | 2019-09-27 | Semiconductor power device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811147957.3A CN110970497A (en) | 2018-09-29 | 2018-09-29 | IGBT power device |
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| CN110970497A true CN110970497A (en) | 2020-04-07 |
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| CN201811147957.3A Pending CN110970497A (en) | 2018-09-29 | 2018-09-29 | IGBT power device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114975602A (en) * | 2022-07-29 | 2022-08-30 | 深圳芯能半导体技术有限公司 | High-reliability IGBT chip and manufacturing method thereof |
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| US20090096019A1 (en) * | 2007-02-08 | 2009-04-16 | Dev Alok Girdhar | Mosgated power semiconductor device with source field electrode |
| CN103681853A (en) * | 2012-09-18 | 2014-03-26 | 株式会社东芝 | Semiconductor device and manufacturing method of the same |
| CN108346579A (en) * | 2013-08-09 | 2018-07-31 | 英飞凌科技股份有限公司 | Semiconductor devices with cell trench structure and contact point and its manufacturing method |
| US20160300945A1 (en) * | 2013-11-27 | 2016-10-13 | Infineon Technologies Ag | Semiconductor Device with Cell Trench Structures and a Contact Structure |
| CN107527948A (en) * | 2017-07-28 | 2017-12-29 | 上海华虹宏力半导体制造有限公司 | Shield grid groove MOSFET and its manufacture method |
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| CN114975602A (en) * | 2022-07-29 | 2022-08-30 | 深圳芯能半导体技术有限公司 | High-reliability IGBT chip and manufacturing method thereof |
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