CN110965025A - Preparation method of CdS/Si nano film heterojunction - Google Patents
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Abstract
The invention belongs to the technical field of heterojunction preparation, and particularly relates to a preparation method of a CdS/Si nano-film heterojunction, which comprises the steps of firstly taking an ITO conductive film as a substrate, and depositing Si on the ITO conductive film by utilizing a magnetron sputtering technology to prepare ITO/Si with a nano structure; then depositing CdS on the nano-structure ITO/Si by utilizing a magnetron sputtering technology to prepare the nano-structure ITO/Si/CdS; and finally, depositing Ag on the ITO/Si/CdS nanostructure by utilizing a magnetron sputtering technology to prepare the nano ITO/Si/CdS/Ag heterojunction. The invention is simple and efficient, and is easy to regulate and control the structure and the size of each component of the heterojunction.
Description
Technical Field
The invention belongs to the technical field of heterojunction preparation, and particularly relates to a preparation method of a CdS/Si nano film heterojunction.
Background
The heterojunction is an important component of a semiconductor device, and scientists have conducted a great deal of research on the heterojunction, and the silicon-based CdS heterojunction is an important research direction. With the development of socio-economic, higher requirements are put on the size of semiconductor devices in order to realize different functions and demands. Scientists have employed various means to reduce the size of heterojunctions, such as nanotechnology to deposit CdS nanofilms, nanoparticles, etc. on single, polycrystalline, and porous silicon substrates to produce silicon-based CdS heterojunctions. However, at present monocrystalline silicon, polycrystalline silicon and porous silicon substrates, for technical reasons, the thickness of the prepared heterojunctions is still not sufficient for special requirements. If the film silicon is used for replacing monocrystalline silicon, polycrystalline silicon and a porous silicon substrate, the thickness of the silicon-based CdS heterojunction can be greatly reduced, and the integration of devices is facilitated. The silicon film is usually obtained by plasma enhanced chemical vapor deposition, rapid annealing crystallization, solid phase crystallization, excimer laser crystallization, metal induced crystallization and other methods, but the temperature in the methods is too high to have high requirements on the substrate, or the preparation parameters are too high, so that the cost of the device is greatly increased, and the method is not beneficial to industrialization.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention aims to provide the preparation method of the CdS/Si nano film heterojunction, which is simple and efficient and is easy to regulate and control the structure and the size of each component of the heterojunction.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention provides a preparation method of a CdS/Si nano film heterojunction, which comprises the following steps:
step 1, using an ITO conductive film as a substrate, and depositing Si on the ITO conductive film by utilizing a magnetron sputtering technology to prepare ITO/Si with a nano structure;
and 3, depositing Ag on the nano-structure ITO/Si/CdS by utilizing a magnetron sputtering technology to prepare the nano-ITO/Si/CdS/Ag heterojunction.
Further, the specific process of step 1 is as follows:
step 101, fixing an ITO conductive film on a sample support of a magnetron sputtering chamber, vacuumizing the magnetron sputtering chamber to 10 < -6 > Pa, and then filling argon into the magnetron sputtering chamber to keep the vacuum degree of the magnetron sputtering chamber at 10 < -1 > Pa-50 Pa;
step 102, adjusting the distance between a Si target and an ITO conductive film to be 5cm, and setting the sputtering power to be 30-120W;
103, pre-sputtering for 60s, opening a baffle of the Si target, starting sputtering for 180-1200 s, and preparing the ITO/Si with the nano structure;
and step 104, after the sputtering time is up, closing a sputtering power supply, opening a heating power supply, heating the ITO/Si sample to 300 ℃ for 20-50 min, and keeping the temperature for 50min under the pressure of 1 Pa.
Further, the sputtering time is 180-1200 s, and the thickness of Si deposited on the ITO conductive film is 300 nm-2 μm.
Further, the specific process of step 2 is as follows:
step 201, keeping the pressure in a magnetron sputtering chamber at 1Pa, changing a Si target material into a CdS target material, and setting the sputtering power to be 60W;
step 202, opening a baffle of the CdS target, starting sputtering for 60-1800 s, and preparing ITO/Si/CdS with a nano structure;
and step 203, after the sputtering time is up, the sputtering power supply is closed.
Further, the sputtering time is 60-1800 s, and the thickness of CdS deposited on the ITO/Si is 120 nm-3.6 microns.
Further, the specific process of step 3 is as follows:
301, keeping the pressure in the magnetron sputtering chamber at 1Pa, changing the CdS target material into the Ag target material, and setting the sputtering power at 30W;
step 302, opening a baffle of the Ag target, starting sputtering for 60s, and preparing an Ag electrode;
and 303, after the sputtering time is up, closing all power supplies, and naturally cooling the ITO/Si/CdS/Ag sample to room temperature.
Compared with the prior art, the invention has the following advantages:
according to the preparation method of the CdS/Si nano film heterojunction, the Si film and the CdS film are sequentially prepared on the ITO conductive film by utilizing the magnetron sputtering technology, so that the CdS/Si nano film heterojunction is constructed, the thicknesses of the Si film and the CdS film are efficiently controlled by changing the sputtering time, the interface of the CdS/Si heterojunction is regulated, and the size of the silicon-based CdS/Si heterojunction is effectively reduced.
The method has the advantages of simple manufacturing process, low value of required instruments and equipment, low material consumption, low production cost of the heterojunction and effective regulation and control of the structure and the size of each component of the heterojunction, and can be carried out at low temperature.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a flow chart of a method for preparing a CdS/Si nano-film heterojunction according to a first embodiment of the invention;
FIG. 2 is a schematic structural diagram of a CdS/Si nano-film heterojunction in accordance with a first embodiment of the present invention;
FIG. 3 is an XRD spectrum of an amorphous silicon thin film deposited for 10min according to the second embodiment of the present invention;
FIG. 4 is an AFM spectrum of a 10min amorphous silicon film deposited according to example two of the present invention;
FIG. 5 is an XRD spectrum of a CdS/Si nano-film heterojunction with silicon deposition for 10min and CdS deposition for 5min according to the second embodiment of the present invention;
FIG. 6 is a CdS/Si nano-film heterojunction rectifying characteristic diagram of CdS/Si deposited for 10min and 5min of silicon deposition in the second embodiment of the present invention;
FIG. 7 is an XRD pattern of a 20min amorphous silicon film deposited according to a third embodiment of the present invention;
FIG. 8 is an AFM spectrum of a 20min amorphous silicon film deposited according to example three of the present invention;
FIG. 9 is an XRD spectrum of a CdS/Si nano-film heterojunction with silicon deposition for 20min and CdS deposition for 5min according to the third embodiment of the present invention;
FIG. 10 is a CdS/Si nano-film heterojunction rectifying characteristic diagram of 20min and 5min CdS deposited silicon in the third embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative efforts shall fall within the protection scope of the present invention.
Example one
As shown in fig. 1, in the preparation method of the CdS/Si nano-film heterojunction according to the embodiment, firstly, an ITO conductive film is used as a substrate, and Si is deposited on the ITO conductive film by using a magnetron sputtering technology to prepare a nano-structure ITO/Si; then depositing CdS on the nano-structure ITO/Si by utilizing a magnetron sputtering technology to prepare the nano-structure ITO/Si/CdS; and finally, depositing Ag on the ITO/Si/CdS nanostructure by utilizing a magnetron sputtering technology to prepare the nano ITO/Si/CdS/Ag heterojunction. The method specifically comprises the following steps:
s101, fixing an ITO conductive film on a sample support of a magnetron sputtering chamber, and vacuumizing the magnetron sputtering chamber to 10 DEG-6Pa, then filling argon into the magnetron sputtering chamber, and keeping the vacuum degree of the magnetron sputtering chamber at 10-1Pa～50Pa；
Step S102, adjusting the distance between the Si target and the ITO conductive film to be 5cm, and setting the sputtering power to be 30-120W;
step S103, pre-sputtering for 60S, opening a baffle of the Si target, starting sputtering for 180S-1200S, and depositing Si on the ITO conductive film to a thickness of 300 nm-2 microns to prepare ITO/Si with a nano structure;
step S104, after the sputtering time is up, closing a sputtering power supply, opening a heating power supply, heating the ITO/Si sample to 300 ℃ for 20-50 min, and keeping the temperature for 50min under the pressure of 1 Pa;
s105, keeping the pressure in the magnetron sputtering chamber at 1Pa, changing the Si target material into the CdS target material, and setting the sputtering power to be 60W;
s106, opening a baffle of the CdS target, starting sputtering for 60-1800S, and depositing CdS on ITO/Si to the thickness of 120 nm-3.6 mu m to prepare ITO/Si/CdS with a nano structure;
step S107, after the sputtering time is up, the sputtering power supply is closed;
s108, keeping the pressure in the magnetron sputtering chamber at 1Pa, changing the CdS target material into an Ag target material, and setting the sputtering power to be 30W;
step S109, opening a baffle of the Ag target, starting sputtering for 60S, and preparing an Ag electrode;
and S110, after the sputtering time is up, closing all power supplies, and naturally cooling the ITO/Si/CdS/Ag sample to room temperature, wherein the structure is shown in figure 2.
Example two
The preparation method of the CdS/Si nano-film heterojunction comprises the following steps:
step S201, fixing the ITO conductive film on a sample support of a magnetron sputtering chamber, and vacuumizing the magnetron sputtering chamber to 10 DEG-6Pa, then filling argon into the magnetron sputtering chamber, and keeping the vacuum degree of the magnetron sputtering chamber at 1 Pa;
step S202, adjusting the distance between the Si target and the ITO conductive film to be 5cm, and setting the sputtering power to be 60W;
step S203, pre-sputtering for 60S, opening a baffle of the Si target, starting sputtering for 10min, and depositing Si with the thickness of about 1 μm on the ITO conductive film to prepare the ITO/Si with the nano structure;
step S204, after the sputtering time is up, the sputtering power supply is closed, the heating power supply is turned on, the ITO/Si sample is heated to 300 ℃ for 30min and is kept for 50min under the pressure of 1Pa, the structure of the Si film is shown in figure 3, and the appearance of the Si film is shown in figure 4;
s205, keeping the pressure in the magnetron sputtering chamber at 1Pa, changing the Si target material into the CdS target material, and setting the sputtering power to be 60W;
s206, opening a baffle of the CdS target, starting sputtering for 5min, depositing CdS on ITO/Si with the thickness of about 600nm, and preparing ITO/Si/CdS of a nano structure, wherein the prepared CdS/Si nano film heterojunction structure is shown in FIG. 5;
step S207, after the sputtering time is up, the sputtering power supply is closed;
s208, keeping the pressure of 1Pa in the magnetron sputtering chamber, changing the CdS target material into an Ag target material, and setting the sputtering power to be 30W;
step S209, opening a baffle of the Ag target, starting sputtering for 60S, and preparing an Ag electrode;
step S210, after the sputtering time is up, all power supplies are closed, and the ITO/Si/CdS/Ag sample is naturally cooled to room temperature, wherein the structure is shown in figure 2;
in step S211, a forward bias is applied to test the rectification characteristic thereof, as shown in fig. 6.
EXAMPLE III
S301, fixing the ITO conductive film on a sample support of a magnetron sputtering chamber, and vacuumizing the magnetron sputtering chamber to 10 DEG-6Pa, then filling argon into the magnetron sputtering chamber, and keeping the vacuum degree of the magnetron sputtering chamber at 1 Pa;
step S302, adjusting the distance between the Si target and the ITO conductive film to be 5cm, and setting the sputtering power to be 60W;
step S303, pre-sputtering for 60S, opening a baffle of the Si target, starting sputtering for 20min, and depositing Si with the thickness of about 2 microns on the ITO conductive film to prepare the ITO/Si with the nano structure;
step S304, after the sputtering time is up, the sputtering power supply is closed, the heating power supply is turned on, the ITO/Si sample is heated to 300 ℃ for 30min and is kept for 50min under the pressure of 1Pa, the structure of the Si film is shown in figure 7, and the appearance of the Si film is shown in figure 8;
s305, keeping the pressure in the magnetron sputtering chamber at 1Pa, changing the Si target material into the CdS target material, and setting the sputtering power to be 60W;
s306, opening a baffle of the CdS target, starting sputtering for 5min, depositing CdS on ITO/Si with the thickness of about 600nm, and preparing ITO/Si/CdS of a nano structure, wherein the prepared CdS/Si nano film heterojunction structure is shown in FIG. 9;
step S307, after the sputtering time is up, the sputtering power supply is closed;
s308, keeping the pressure in the magnetron sputtering chamber at 1Pa, changing the CdS target into an Ag target, and setting the sputtering power to be 30W;
step S309, opening a baffle of the Ag target, starting sputtering for 60S, and preparing an Ag electrode;
step S310, after the sputtering time is up, all power supplies are closed, the ITO/Si/CdS/Ag sample is naturally cooled to the room temperature, and the structure is shown in figure 2;
in step S311, a forward bias is applied to test the rectification characteristic, as shown in fig. 10.
As can be seen from the comparison between the second embodiment and the third embodiment, the morphological characteristics of the Si film can be effectively controlled along with the change of the sputtering time, so that the rectification characteristic of the CdS/Si nano film heterojunction is influenced. The invention has the advantages of less consumed materials, low preparation temperature, easy preparation of large-area films and easy control of the structure of the heterojunction, and can transplant the CdS/Si nano film heterojunction to various substrates.
It should be noted that, in the present specification, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (6)
1. A preparation method of a CdS/Si nano film heterojunction is characterized by comprising the following steps:
step 1, using an ITO conductive film as a substrate, and depositing Si on the ITO conductive film by utilizing a magnetron sputtering technology to prepare ITO/Si with a nano structure;
step 2, depositing CdS on the nano-structure ITO/Si by utilizing a magnetron sputtering technology to prepare the nano-structure ITO/Si/CdS;
and 3, depositing Ag on the nano-structure ITO/Si/CdS by utilizing a magnetron sputtering technology to prepare the nano-ITO/Si/CdS/Ag heterojunction.
2. The method for preparing the CdS/Si nano-film heterojunction as defined in claim 1, wherein the specific process of the step 1 is as follows:
step 101, fixing an ITO conductive film on a sample support of a magnetron sputtering chamber, and vacuumizing the magnetron sputtering chamber to 10 DEG- 6Pa, then filling argon into the magnetron sputtering chamber, and keeping the vacuum degree of the magnetron sputtering chamber at 10-1Pa～50Pa；
Step 102, adjusting the distance between a Si target and an ITO conductive film to be 5cm, and setting the sputtering power to be 30-120W;
103, pre-sputtering for 60s, opening a baffle of the Si target, starting sputtering for 180-1200 s, and preparing the ITO/Si with the nano structure;
and step 104, after the sputtering time is up, closing a sputtering power supply, opening a heating power supply, heating the ITO/Si sample to 300 ℃ for 20-50 min, and keeping the temperature for 50min under the pressure of 1 Pa.
3. The method of preparing a CdS/Si nano-film heterojunction as defined in claim 2, wherein the sputtering time is 180-1200 s, and the thickness of Si deposited on the ITO conductive film is 300 nm-2 μm.
4. The method for preparing the CdS/Si nano-film heterojunction as defined in claim 2, wherein the specific process of the step 2 is as follows:
step 201, keeping the pressure in a magnetron sputtering chamber at 1Pa, changing a Si target material into a CdS target material, and setting the sputtering power to be 60W;
step 202, opening a baffle of the CdS target, starting sputtering for 60-1800 s, and preparing ITO/Si/CdS with a nano structure;
and step 203, after the sputtering time is up, the sputtering power supply is closed.
5. The method for preparing CdS/Si nano-film heterojunction as defined in claim 4, wherein the sputtering time is 60-1800 s, and the thickness of CdS deposited on ITO/Si is 120 nm-3.6 μm.
6. The method for preparing CdS/Si nano-film heterojunction as defined in claim 4, wherein the specific process of step 3 is as follows:
301, keeping the pressure in the magnetron sputtering chamber at 1Pa, changing the CdS target material into the Ag target material, and setting the sputtering power at 30W;
step 302, opening a baffle of the Ag target, starting sputtering for 60s, and preparing an Ag electrode;
and 303, after the sputtering time is up, closing all power supplies, and naturally cooling the ITO/Si/CdS/Ag sample to room temperature.
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| 丛家铭等: "不同方法及衬底类型对CdS多晶薄膜性能的影响", 《红外与毫米波学报》 * |
| 赵影文等: "CdS/p-Si异质结太阳电池的制备与数值模拟", 《太阳能学报》 * |
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