CN110943822A - A Multi-scroll Chaos Signal Generator Based on Sine Control - Google Patents

A Multi-scroll Chaos Signal Generator Based on Sine Control Download PDF

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CN110943822A
CN110943822A CN202010000387.6A CN202010000387A CN110943822A CN 110943822 A CN110943822 A CN 110943822A CN 202010000387 A CN202010000387 A CN 202010000387A CN 110943822 A CN110943822 A CN 110943822A
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CN110943822B (en
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刘扬
张朝霞
林壮
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Foshan University
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    • H04—ELECTRIC COMMUNICATION TECHNIQUE
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Abstract

本发明公开了一种基于正弦控制的多涡卷混沌信号发生器，包括：基本混沌信号产生电路N1、正弦函数产生电路N2、用于产生切换控制函数的序列发生器N3、节点f和乘法器MUL4；基本混沌信号产生电路N1的节点x与正弦函数产生电路N2的输入端连接；所述基本混沌信号产生电路N1的节点z与序列发生器N3的输入端连接，所述正弦函数产生电路N2的输出端与乘法器MUL4的第一输入端连接，所述序列发生器N3的输出端与乘法器MUL4的第二输入端连接，所述乘法器MUL4的输出端通过节点f与基本混沌信号产生电路N1的输入端连接。本发明主要用于混沌通信技术领域。

Figure 202010000387

The invention discloses a multi-scroll chaotic signal generator based on sinusoidal control, comprising: a basic chaotic signal generating circuit N1, a sinusoidal function generating circuit N2, a sequencer N3 for generating a switching control function, a node f and a multiplier MUL 4 ; the node x of the basic chaotic signal generation circuit N1 is connected with the input end of the sine function generation circuit N2; the node z of the basic chaotic signal generation circuit N1 is connected with the input end of the sequencer N3, the sine function generation circuit The output of N2 is connected to the first input of the multiplier MUL 4 , the output of the sequencer N3 is connected to the second input of the multiplier MUL 4 , the output of the multiplier MUL 4 is connected to the The input terminal of the basic chaotic signal generating circuit N1 is connected. The invention is mainly used in the technical field of chaotic communication.

Figure 202010000387

Description

Multi-scroll chaotic signal generator based on sinusoidal control
Technical Field
The invention relates to the technical field of chaotic communication, in particular to a multi-scroll chaotic signal generator based on sinusoidal control.
Background
Since the first chaotic system was discovered by Lorenz in the 60's of the 20 th century, the chaotic system has attracted wide attention in the fields of image encryption, information security and the like because of its characteristics of strong sensitivity, dependence, unpredictability and the like on initial conditions and parameters. The chaos is a deterministic random-like process in a nonlinear power system and has ergodicity, mixing and exponential divergence. The low-dimensional chaotic system has the problems of insufficient key space, low complexity of chaotic sequences, poor anti-deciphering capacity of the system, low safety and the like due to low system dimension.
Disclosure of Invention
The present invention is directed to a sinusoidal control based multi-scroll chaotic signal generator, which solves one or more of the problems of the prior art and provides at least one of the advantages.
The solution of the invention for solving the technical problem is as follows: a multi-scroll chaotic signal generator based on sinusoidal control, comprising: basic chaotic signal generating circuit N1, sine function generating circuit N2, sequence generator N3 for generating switching control function, node f and multiplier MUL4(ii) a A node x of the basic chaotic signal generating circuit N1 is connected with the input end of the sine function generating circuit N2; the node z of the basic chaotic signal generating circuit N1 is connected with the input end of a sequence generator N3, and the output end of the sine function generating circuit N2 is connected with a multiplier MUL4Is connected to the first input of the sequence generator N3, the output of the sequence generator N3 being connected to the multiplier MUL4Is connected to the second input terminal of the multiplier MUL, the multiplier MUL4Is connected to the input terminal of the basic chaotic signal generating circuit N1 through a node f.
Further, the sine function generating circuit N2 includes: operational amplifier OP10Operational amplifier OP11Resistance R20Resistance R21Resistance R22Resistance R23And a sine function generating chip configured to have an amplitude ten times larger;
the resistor R20Is connected to node x, the resistor R20Respectively with a resistor R21Left end, operational amplifier OP10Is connected to the negative input terminal of the resistor R21Respectively with an operational amplifier OP10Output terminal of (1), resistor R22Is connected to the left end of the resistor R22Respectively with a resistor R23Left end, operational amplifier OP11Is negativeInput terminal connection, the resistor R23Respectively with an operational amplifier OP11Is connected with the input end of the sine function generating chip, and the output end of the sine function generating chip is connected with the multiplier MUL4Is connected to the first input terminal.
Further, the basic chaotic signal generating circuit N1 includes: operational amplifier OP1Operational amplifier OP2Operational amplifier OP3Operational amplifier OP4Operational amplifier OP5Operational amplifier OP6Operational amplifier OP7Operational amplifier OP8Operational amplifier OP9Resistance R1Resistance R2Resistance R3Resistance R4Resistance R5Resistance R6Resistance R7Resistance R8Resistance R9Resistance R10Resistance R11Resistance R12Resistance R13Resistance R14Resistance R15Resistance R16Resistance R17Resistance R18Resistance R19Capacitor C1Capacitor C2Node x, node-x, node y, node-y, node z, node-z and multiplier MUL1；
The operational amplifier OP1Respectively with the resistor R1Right end of (1), resistance R2Right end of (1), resistance R3Is connected to the left end of the resistor R3Respectively with an operational amplifier OP1Output terminal of (1), resistor R4Is connected to the left end of the resistor R4Respectively with an operational amplifier OP2Negative input terminal of (1), capacitor C1Is connected to the left end of the capacitor C1Is respectively connected with the node-x and the resistor R5Is connected to the left end of the resistor R5Respectively with an operational amplifier OP3Negative input terminal of (3), resistor R6Is connected to the left end of the resistor R6Respectively with an operational amplifier OP3Is connected to node x, the resistor R1Is connected to node-y, the resistor R2At the left end ofNode-z connected;
the operational amplifier OP4Respectively with the resistor R7Right end of (1), resistance R8Right end of (1), resistance R9Is connected to the left end of the resistor R9Respectively with an operational amplifier OP4Output terminal of (1), resistor R10Is connected to the left end of the resistor R10Respectively with an operational amplifier OP5Negative input terminal of (1), capacitor C2Is connected to the left end of the capacitor C2With node-y and resistor R, respectively11Is connected to the left end of the resistor R11Respectively with an operational amplifier OP6Negative input terminal of (3), resistor R12Is connected to the left end of the resistor R12Respectively with an operational amplifier OP6Is connected to node y, the resistor R7Is connected to node-z, the resistor R8The left end of (a) is connected with a node y;
the operational amplifier OP7Respectively with the resistor R13Right end of (1), resistance R14Right end of (1), resistance R15Right end of (1), resistance R16Is connected to the left end of the resistor R16Respectively with an operational amplifier OP7Output terminal of (1), resistor R17Is connected to the left end of the resistor R17Respectively with an operational amplifier OP8Negative input terminal of (1), capacitor C3Is connected to the left end of the capacitor C3Is respectively connected with the node-z and the resistor R18Is connected to the left end of the resistor R18Respectively with an operational amplifier OP9Negative input terminal of (3), resistor R19Is connected to the left end of the resistor R19Respectively with an operational amplifier OP9Is connected to node z, the resistor R13Is connected with a node y, and the resistor R14Left end of and multiplier MUL1Is connected to the output of the multiplier MUL, the multiplier MUL1Is connected to node-y, said multiplier MUL1Is connected to node z, said resistor R15The left end of (a) is connected with a node f;
the operational amplifier OP1Positive input terminal of, operational amplifier OP2Positive input terminal of, operational amplifier OP3Positive input terminal of, operational amplifier OP4Positive input terminal of, operational amplifier OP5Positive input terminal of, operational amplifier OP6Positive input terminal of, operational amplifier OP7Positive input terminal of, operational amplifier OP8And the operational amplifier OP9The positive input ends of which are respectively connected to the ground.
Further, the sequencer N3 includes: operational amplifier OP16Operational amplifier OP17Operational amplifier OP18Operational amplifier OP19Operational amplifier OP20Resistance R36Resistance R37Resistance R38Resistance R39Resistance R40Resistance R41Resistance R42Resistance R43Node U1And node U2；
The operational amplifier OP16Is connected to node z, said operational amplifier OP16Positive input end and node U of1Connected, said operational amplifier OP16Output terminal and resistor R36Is connected to the left end of the resistor R36Respectively with a resistor R37Left end, operational amplifier OP17Is connected to the negative input terminal of the resistor R37Respectively with an operational amplifier OP17Output terminal of (1), resistor R38Is connected to the left end of the resistor R38Respectively with a resistor R39Left end, operational amplifier OP20Is connected to the negative input terminal of the resistor R39Respectively with an operational amplifier OP20Output terminal of (2), multiplier MUL4Is connected to the second input terminal of the first,
the operational amplifier OP18Is connected to node z, said operational amplifier OP18Positive input end and node U of2Connected, said operational amplifier OP18Output terminal and resistor R40Is connected to the left end of the resistor R40Respectively with a resistor R41Left end, operational amplifier OP19Is connected to the negative input terminal of the resistor R41Respectively with an operational amplifier OP19Output terminal of (1), resistor R42Is connected to the left end of the resistor R42Respectively with a resistor R43Upper end, operational amplifier OP20Are connected with the positive input end of the main body;
the operational amplifier OP17Positive input terminal of, operational amplifier OP19Positive input terminal and resistor R43Are respectively connected to the ground.
Further, the resistors adopted by the basic chaotic signal generating circuit N1, the sine function generating circuit N2 and the sequencer N3 are all precision adjustable resistors or precision adjustable potentiometers.
Further, the model of the sine function generating chip is AD 639.
The invention has the beneficial effects that: the invention can generate more scrolls, has higher complexity of the chaotic sequence, larger key space and stronger system anti-deciphering capacity, and has better potential application value in the fields of secret communication, chaotic control and the like.
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In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the described drawings are only a part of the embodiments of the invention, not all embodiments, and that a person skilled in the art will be able to derive other designs and drawings from these drawings without the exercise of inventive effort.
FIG. 1 is a schematic diagram of the circuit connections between the sine function generating circuit N2 and the sequencer N3;
fig. 2 is a circuit connection schematic diagram of the basic chaotic signal generating circuit N1.
Detailed Description
Reference will now be made in detail to the present preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as up, down, front, rear, left, right, etc., is the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of the description of the present invention, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the invention, if words such as "a number" or the like are used, the meaning is one or more, the meaning of a plurality is two or more, more than, less than, more than, etc. are understood as not including the number, and more than, less than, more than, etc. are understood as including the number.
In the description of the present invention, unless otherwise explicitly defined, terms such as setup, installation, connection, and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the terms in the present invention in combination with the detailed contents of the technical solutions.
Embodiment 1, referring to fig. 1 and 2, a sinusoidal control based multi-scroll chaotic signal generator includes: basic chaotic signal generating circuit N1, sine function generating circuit N2, sequence generator N3 for generating switching control function, node f and multiplier MUL4。
Wherein the basic chaotic signal generating circuit N1 includes: operational amplifier OP1Operational amplifier OP2Operational amplifier OP3Operational amplifier OP4Operational amplifier OP5Operational amplifier OP6Operational amplifier OP7Operational amplifier OP8Operational amplifier OP9Resistance R1Resistance R2Resistance R3Resistance R4Resistance R5Resistance R6Resistance R7Resistance R8Electricity, electricityResistance R9Resistance R10Resistance R11Resistance R12Resistance R13Resistance R14Resistance R15Resistance R16Resistance R17Resistance R18Resistance R19Capacitor C1Capacitor C2Node x, node-x, node y, node-y, node z, node-z and multiplier MUL1(ii) a The operational amplifier OP1Respectively with the resistor R1Right end of (1), resistance R2Right end of (1), resistance R3Is connected to the left end of the resistor R3Respectively with an operational amplifier OP1Output terminal of (1), resistor R4Is connected to the left end of the resistor R4Respectively with an operational amplifier OP2Negative input terminal of (1), capacitor C1Is connected to the left end of the capacitor C1Is respectively connected with the node-x and the resistor R5Is connected to the left end of the resistor R5Respectively with an operational amplifier OP3Negative input terminal of (3), resistor R6Is connected to the left end of the resistor R6Respectively with an operational amplifier OP3Is connected to node x, the resistor R1Is connected to node-y, the resistor R2Is connected to node-z; the operational amplifier OP4Respectively with the resistor R7Right end of (1), resistance R8Right end of (1), resistance R9Is connected to the left end of the resistor R9Respectively with an operational amplifier OP4Output terminal of (1), resistor R10Is connected to the left end of the resistor R10Respectively with an operational amplifier OP5Negative input terminal of (1), capacitor C2Is connected to the left end of the capacitor C2With node-y and resistor R, respectively11Is connected to the left end of the resistor R11Respectively with an operational amplifier OP6Negative input terminal of (3), resistor R12Is connected to the left end of the resistor R12Respectively with an operational amplifier OP6Is connected to node y, the resistor R7Is connected to node-z, the resistor R8At the left end ofConnecting the nodes y; the operational amplifier OP7Respectively with the resistor R13Right end of (1), resistance R14Right end of (1), resistance R15Right end of (1), resistance R16Is connected to the left end of the resistor R16Respectively with an operational amplifier OP7Output terminal of (1), resistor R17Is connected to the left end of the resistor R17Respectively with an operational amplifier OP8Negative input terminal of (1), capacitor C3Is connected to the left end of the capacitor C3Is respectively connected with the node-z and the resistor R18Is connected to the left end of the resistor R18Respectively with an operational amplifier OP9Negative input terminal of (3), resistor R19Is connected to the left end of the resistor R19Respectively with an operational amplifier OP9Is connected to node z, the resistor R13Is connected with a node y, and the resistor R14Left end of and multiplier MUL1Is connected to the output of the multiplier MUL, the multiplier MUL1Is connected to node-y, said multiplier MUL1Is connected to node z, said resistor R15The left end of (a) is connected with a node f; the operational amplifier OP1Positive input terminal of, operational amplifier OP2Positive input terminal of, operational amplifier OP3Positive input terminal of, operational amplifier OP4Positive input terminal of, operational amplifier OP5Positive input terminal of, operational amplifier OP6Positive input terminal of, operational amplifier OP7Positive input terminal of, operational amplifier OP8And the operational amplifier OP9The positive input ends of which are respectively connected to the ground.
The sine function generating circuit N2 includes: operational amplifier OP10Operational amplifier OP11Resistance R20Resistance R21Resistance R22Resistance R23And a sine function generating chip configured to have an amplitude ten times larger; the resistor R20Is connected to node x, the resistor R20Respectively with a resistor R21Left end, operational amplifier OP10Negative output ofInput terminal connection, the resistor R21Respectively with an operational amplifier OP10Output terminal of (1), resistor R22Is connected to the left end of the resistor R22Respectively with a resistor R23Left end, operational amplifier OP11Is connected to the negative input terminal of the resistor R23Respectively with an operational amplifier OP11Is connected with the input end of the sine function generating chip, and the output end of the sine function generating chip is connected with the multiplier MUL4Is connected to the first input terminal.
The sequencer N3 includes: operational amplifier OP16Operational amplifier OP17Operational amplifier OP18Operational amplifier OP19Operational amplifier OP20Resistance R36Resistance R37Resistance R38Resistance R39Resistance R40Resistance R41Resistance R42Resistance R43Node U1And node U2(ii) a The operational amplifier OP16Is connected to node z, said operational amplifier OP16Positive input end and node U of1Connected, said operational amplifier OP16Output terminal and resistor R36Is connected to the left end of the resistor R36Respectively with a resistor R37Left end, operational amplifier OP17Is connected to the negative input terminal of the resistor R37Respectively with an operational amplifier OP17Output terminal of (1), resistor R38Is connected to the left end of the resistor R38Respectively with a resistor R39Left end, operational amplifier OP20Is connected to the negative input terminal of the resistor R39Respectively with an operational amplifier OP20Output terminal of (2), multiplier MUL4Is connected with the second input end; the operational amplifier OP18Is connected to node z, said operational amplifier OP18Positive input end and node U of2Connected, said operational amplifier OP18Output terminal and resistor R40Is connected to the left end of the resistor R40Respectively with a resistor R41The left end of,Operational amplifier OP19Is connected to the negative input terminal of the resistor R41Respectively with an operational amplifier OP19Output terminal of (1), resistor R42Is connected to the left end of the resistor R42Respectively with a resistor R43Upper end, operational amplifier OP20Are connected with the positive input end of the main body; the operational amplifier OP17Positive input terminal of, operational amplifier OP19Positive input terminal and resistor R43Are respectively connected to the ground.
The state equation of the multi-scroll chaotic signal generator based on cosine control is as follows:
gate＝0.5[sgn(z-U2)-sgn(z-U1)]
f＝[cos(4wx)gate]
Figure BDA0002352934440000101
Figure BDA0002352934440000102
Figure BDA0002352934440000103
in the above formula, f is represented as a signal at node f, a11＝3，b11＝0.8，b12＝8，c11＝3，c12＝0.2，c13＝0.32，
Figure BDA0002352934440000104
d is a symbol of]Expressed as an integer, R2Expressed as resistance R2In k Ω, U1Represents a node U1Level value of U2Represents a node U2Level value of (d).
U1And U2The expression of (a) is:
T＝2π/(wk)
U1＝(N+0.25)*T，
U2＝-(M+0.75)*T
in the above formula, w is 4, k is 5, M and N are variables, and the adjustment resistor R is a resistor having a resistance of 42To change the value of d to produce different wrap numbers.
Selection of circuit elements and supply voltage of the invention: all operational amplifiers in fig. 1 and 2 are model TL 082. All multipliers in fig. 1 and 2 have the model number of AD 633. In order to facilitate circuit experiments and ensure the accuracy of the resistance value, all the resistors in fig. 1 and 2 adopt a precision resistor or a precision adjustable potentiometer. Table 1 shows resistance parameters in the basic chaotic signal generating circuit N1, the sine function generating circuit N2, and the sequencer N3, specifically:
R1 33.3 R2 variable resistance value R3 100
R4 50 R5 10 R6 10
R7 14.3 R8 125 R9 100
R10 50 R11 10 R12 10
R13 50 R14 50 R15 312.5
R16 100 R17 50 R18 10
R19 10 R20 2 R21 10
R22 10 R23 10 R24 9
R25 9 R26 9 R27 9
R28 9 R29 9 R30 9
R31 9 R32 10 R33 8
R34 10 R35 100 R36 13.5
R37 0.5 R38 9 R39 9
R40 13.5 R41 0.5 R42 9
R43 9
Table 1;
in table 1, the unit of resistance is k Ω.
Table 2 shows node V1And node V2The parameter values of (1) are specifically:
V1 5 V2 1.25
table 2;
in table 2, the unit of the parameter value is V.
Table 3 shows the values of the parameters for the capacitance in nF.
C1 33 C2 33 C3 33
Table 3;
table 4 shows the relationship between the number of scrolls and the parameter d obtained by the multi-scroll chaotic signal generator, which is specifically:
Figure BDA0002352934440000121
table 4;
as can be seen from table 4, the multi-scroll chaotic signal generator of the present invention can generate a variable and considerable amount of multi-scroll signals by changing the resistor R2 (i.e., changing the parameter d). The encryption capability is improved.
While the preferred embodiments of the present invention have been described in detail, it will be understood by those skilled in the art that the invention is not limited to the details of the embodiments shown, but is capable of various modifications and substitutions without departing from the spirit of the invention.

Claims (6)

1.一种基于正弦控制的多涡卷混沌信号发生器，其特征在于，包括：基本混沌信号产生电路N1、正弦函数产生电路N2、用于产生切换控制函数的序列发生器N3、节点f和乘法器MUL4；基本混沌信号产生电路N1的节点x与正弦函数产生电路N2的输入端连接；所述基本混沌信号产生电路N1的节点z与序列发生器N3的输入端连接，所述正弦函数产生电路N2的输出端与乘法器MUL4的第一输入端连接，所述序列发生器N3的输出端与乘法器MUL4的第二输入端连接，所述乘法器MUL4的输出端通过节点f与基本混沌信号产生电路N1的输入端连接。1. a multi-scroll chaotic signal generator based on sinusoidal control, is characterized in that, comprising: basic chaotic signal generation circuit N1, sine function generation circuit N2, sequencer N3 for generating switching control function, node f and Multiplier MUL 4 ; the node x of the basic chaotic signal generation circuit N1 is connected with the input end of the sine function generation circuit N2; the node z of the basic chaotic signal generation circuit N1 is connected with the input end of the sequencer N3, the sine function The output of the generating circuit N2 is connected to the first input of the multiplier MUL 4 , the output of the sequencer N3 is connected to the second input of the multiplier MUL 4 , and the output of the multiplier MUL 4 passes through the node f is connected to the input terminal of the basic chaotic signal generating circuit N1. 2.根据权利要求1所述的一种基于正弦控制的多涡卷混沌信号发生器，其特征在于：所述正弦函数产生电路N2包括：运算放大器OP10、运算放大器OP11、电阻R20、电阻R21、电阻R22、电阻R23和正弦函数发生芯片,所述正弦函数发生芯片被配置为十倍的振幅；2. A multi-scroll chaotic signal generator based on sinusoidal control according to claim 1, wherein the sinusoidal function generating circuit N2 comprises: an operational amplifier OP 10 , an operational amplifier OP 11 , a resistor R 20 , a resistor R 21 , a resistor R 22 , a resistor R 23 and a sine function generating chip, the sine function generating chip being configured to have ten times the amplitude; 所述电阻R20的左端与节点x连接，所述电阻R20的右端分别与电阻R21的左端、运算放大器OP10的负输入端连接，所述电阻R21的右端分别与运算放大器OP10的输出端、电阻R22的左端连接，所述电阻R22的右端分别与电阻R23的左端、运算放大器OP11的负输入端连接，所述电阻R23的右端分别与运算放大器OP11的输出端、正弦函数发生芯片的输入端连接，所述正弦函数发生芯片的输出端与乘法器MUL4的第一输入端连接。The left end of the resistor R 20 is connected to node x, the right end of the resistor R 20 is connected to the left end of the resistor R 21 and the negative input end of the operational amplifier OP 10 respectively, and the right end of the resistor R 21 is respectively connected to the operational amplifier OP 10 The output end of the resistor R 22 is connected to the left end of the resistor R 22 , the right end of the resistor R 22 is respectively connected to the left end of the resistor R 23 and the negative input end of the operational amplifier OP 11 , and the right end of the resistor R 23 is respectively connected to the operational amplifier OP 11 . The output end and the input end of the sine function generating chip are connected, and the output end of the sine function generating chip is connected with the first input end of the multiplier MUL 4 . 3.根据权利要求2所述的一种基于正弦控制的多涡卷混沌信号发生器，其特征在于：所述基本混沌信号产生电路N1包括：运算放大器OP1、运算放大器OP2、运算放大器OP3、运算放大器OP4、运算放大器OP5、运算放大器OP6、运算放大器OP7、运算放大器OP8、运算放大器OP9、电阻R1、电阻R2、电阻R3、电阻R4、电阻R5、电阻R6、电阻R7、电阻R8、电阻R9、电阻R10、电阻R11、电阻R12、电阻R13、电阻R14、电阻R15、电阻R16、电阻R17、电阻R18、电阻R19、电容C1、电容C2、节点x、节点-x、节点y、节点-y、节点z、节点-z和乘法器MUL1；3. A multi-scroll chaotic signal generator based on sinusoidal control according to claim 2, wherein the basic chaotic signal generating circuit N1 comprises: an operational amplifier OP 1 , an operational amplifier OP 2 , and an operational amplifier OP 3. Operational amplifier OP4 , Operational amplifier OP5 , Operational amplifier OP6 , Operational amplifier OP7 , Operational amplifier OP8 , Operational amplifier OP9 , Resistor R1, Resistor R2, Resistor R3 , Resistor R4 , Resistor R 5. Resistor R6 , Resistor R7 , Resistor R8 , Resistor R9 , Resistor R10 , Resistor R11 , Resistor R12 , Resistor R13 , Resistor R14 , Resistor R15 , Resistor R16 , Resistor R17 , resistor R 18 , resistor R 19 , capacitor C 1 , capacitor C 2 , node x, node-x, node y, node-y, node z, node-z and multiplier MUL 1 ; 所述运算放大器OP1的负输入端分别与电阻R1的右端、电阻R2的右端、电阻R3的左端连接，所述电阻R3的右端分别与运算放大器OP1的输出端、电阻R4的左端连接，所述电阻R4的右端分别与运算放大器OP2的负输入端、电容C1的左端连接，所述电容C1的右端分别与节点-x、电阻R5的左端连接，所述电阻R5的右端分别与运算放大器OP3的负输入端、电阻R6的左端连接，所述电阻R6的右端分别与运算放大器OP3的输出端、节点x连接，所述电阻R1的左端与节点-y连接，所述电阻R2的左端与节点-z连接；The negative input terminal of the operational amplifier OP 1 is respectively connected to the right end of the resistor R 1 , the right end of the resistor R 2 , and the left end of the resistor R 3 , and the right end of the resistor R 3 is respectively connected to the output terminal of the operational amplifier OP 1 and the resistor R . 4 is connected to the left end, the right end of the resistor R 4 is respectively connected to the negative input end of the operational amplifier OP 2 and the left end of the capacitor C 1 , and the right end of the capacitor C 1 is respectively connected to the node -x and the left end of the resistor R 5 , The right end of the resistor R 5 is respectively connected to the negative input end of the operational amplifier OP 3 and the left end of the resistor R 6 , the right end of the resistor R 6 is respectively connected to the output end of the operational amplifier OP 3 and the node x, the resistor R The left end of 1 is connected to node - y, and the left end of the resistor R2 is connected to node-z; 所述运算放大器OP4的负输入端分别与电阻R7的右端、电阻R8的右端、电阻R9的左端连接，所述电阻R9的右端分别与运算放大器OP4的输出端、电阻R10的左端连接，所述电阻R10的右端分别与运算放大器OP5的负输入端、电容C2的左端连接，所述电容C2的右端分别与节点-y、电阻R11的左端连接，所述电阻R11的右端分别与运算放大器OP6的负输入端、电阻R12的左端连接，所述电阻R12的右端分别与运算放大器OP6的输出端、节点y连接，所述电阻R7的左端与节点-z连接，所述电阻R8的左端与节点y连接；The negative input terminal of the operational amplifier OP 4 is respectively connected to the right end of the resistor R 7 , the right end of the resistor R 8 , and the left end of the resistor R 9 , and the right end of the resistor R 9 is respectively connected to the output terminal of the operational amplifier OP 4 , the resistor R The left end of 10 is connected to the left end of the resistor R 10 , the right end of the resistor R 10 is connected to the negative input end of the operational amplifier OP 5 and the left end of the capacitor C 2 respectively, and the right end of the capacitor C 2 is connected to the node -y and the left end of the resistor R 11 respectively, The right end of the resistor R 11 is respectively connected to the negative input end of the operational amplifier OP 6 and the left end of the resistor R 12 , the right end of the resistor R 12 is respectively connected to the output end of the operational amplifier OP 6 and the node y, the resistor R The left end of 7 is connected to node -z, and the left end of the resistor R 8 is connected to node y; 所述运算放大器OP7的负输入端分别与电阻R13的右端、电阻R14的右端、电阻R15的右端、电阻R16的左端连接，所述电阻R16的右端分别与运算放大器OP7的输出端、电阻R17的左端连接，所述电阻R17的右端分别与运算放大器OP8的负输入端、电容C3的左端连接，所述电容C3的右端分别与节点-z、电阻R18的左端连接，所述电阻R18的右端分别与运算放大器OP9的负输入端、电阻R19的左端连接，所述电阻R19的右端分别与运算放大器OP9的输出端、节点z连接，所述电阻R13的左端与节点y连接，所述电阻R14的左端与乘法器MUL1的输出端连接，所述乘法器MUL1的第一输入端与节点-y连接，所述乘法器MUL1的第二输入端与节点z连接，所述电阻R15的左端与节点f连接；The negative input terminal of the operational amplifier OP 7 is respectively connected to the right end of the resistor R 13 , the right end of the resistor R 14 , the right end of the resistor R 15 , and the left end of the resistor R 16 , and the right end of the resistor R 16 is respectively connected to the operational amplifier OP 7 The output end of the resistor R 17 is connected to the left end of the resistor R 17 , and the right end of the resistor R 17 is connected to the negative input end of the operational amplifier OP 8 and the left end of the capacitor C 3 respectively. The left end of the resistor R 18 is connected to the left end of the resistor R 18 , the right end of the resistor R 18 is connected to the negative input end of the operational amplifier OP 9 and the left end of the resistor R 19 , and the right end of the resistor R 19 is respectively connected to the output end of the operational amplifier OP 9 and the node z connection, the left end of the resistor R 13 is connected to the node y, the left end of the resistor R 14 is connected to the output end of the multiplier MUL 1 , the first input end of the multiplier MUL 1 is connected to the node -y, the The second input terminal of the multiplier MUL 1 is connected to the node z, and the left end of the resistor R 15 is connected to the node f; 所述运算放大器OP1的正输入端、运算放大器OP2的正输入端、运算放大器OP3的正输入端、运算放大器OP4的正输入端、运算放大器OP5的正输入端、运算放大器OP6的正输入端、运算放大器OP7的正输入端、运算放大器OP8的正输入端和运算放大器OP9的正输入端分别对地连接。 The positive input terminal of the operational amplifier OP1, the positive input terminal of the operational amplifier OP2, the positive input terminal of the operational amplifier OP3 , the positive input terminal of the operational amplifier OP4 , the positive input terminal of the operational amplifier OP5 , the operational amplifier OP The positive input terminal of 6 , the positive input terminal of the operational amplifier OP 7 , the positive input terminal of the operational amplifier OP 8 and the positive input terminal of the operational amplifier OP 9 are respectively connected to the ground. 4.根据权利要求3所述的一种基于正弦控制的多涡卷混沌信号发生器，其特征在于：所述序列发生器N3包括：运算放大器OP16、运算放大器OP17、运算放大器OP18、运算放大器OP19、运算放大器OP20、电阻R36、电阻R37、电阻R38、电阻R39、电阻R40、电阻R41、电阻R42、电阻R43、节点U1和节点U2；4. The multi-scroll chaotic signal generator based on sinusoidal control according to claim 3, wherein the sequence generator N3 comprises: an operational amplifier OP 16 , an operational amplifier OP 17 , an operational amplifier OP 18 , operational amplifier OP 19 , operational amplifier OP 20 , resistor R 36 , resistor R 37 , resistor R 38 , resistor R 39 , resistor R 40 , resistor R 41 , resistor R 42 , resistor R 43 , node U 1 and node U 2 ; 所述运算放大器OP16的负输入端与节点z连接，所述运算放大器OP16的正输入端与节点U1连接，所述运算放大器OP16的输出端与电阻R36的左端连接，所述电阻R36的右端分别与电阻R37的左端、运算放大器OP17的负输入端连接，所述电阻R37的右端分别与运算放大器OP17的输出端、电阻R38的左端连接，所述电阻R38的右端分别与电阻R39的左端、运算放大器OP20的负输入端连接，所述电阻R39的右端分别与运算放大器OP20的输出端、乘法器MUL4的第二输入端连接，The negative input terminal of the operational amplifier OP 16 is connected to the node z, the positive input terminal of the operational amplifier OP 16 is connected to the node U 1 , the output terminal of the operational amplifier OP 16 is connected to the left terminal of the resistor R 36 , the The right end of the resistor R 36 is respectively connected to the left end of the resistor R 37 and the negative input end of the operational amplifier OP 17 , the right end of the resistor R 37 is respectively connected to the output end of the operational amplifier OP 17 and the left end of the resistor R 38 , the resistor The right end of R 38 is respectively connected to the left end of the resistor R 39 and the negative input end of the operational amplifier OP 20 , and the right end of the resistor R 39 is respectively connected to the output end of the operational amplifier OP 20 and the second input end of the multiplier MUL 4 , 所述运算放大器OP18的负输入端与节点z连接，所述运算放大器OP18的正输入端与节点U2连接，所述运算放大器OP18的输出端与电阻R40的左端连接，所述电阻R40的右端分别与电阻R41的左端、运算放大器OP19的负输入端连接，所述电阻R41的右端分别与运算放大器OP19的输出端、电阻R42的左端连接，所述电阻R42的右端分别与电阻R43的上端、运算放大器OP20的正输入端连接；The negative input terminal of the operational amplifier OP 18 is connected to the node z, the positive input terminal of the operational amplifier OP 18 is connected to the node U 2 , the output terminal of the operational amplifier OP 18 is connected to the left end of the resistor R 40 , and the The right end of the resistor R 40 is connected to the left end of the resistor R 41 and the negative input end of the operational amplifier OP 19 respectively, and the right end of the resistor R 41 is connected to the output end of the operational amplifier OP 19 and the left end of the resistor R 42 respectively. The right end of R 42 is respectively connected with the upper end of the resistor R 43 and the positive input end of the operational amplifier OP 20 ; 所述运算放大器OP17的正输入端、运算放大器OP19的正输入端和电阻R43的下端分别对地连接。The positive input terminal of the operational amplifier OP 17 , the positive input terminal of the operational amplifier OP 19 and the lower terminal of the resistor R 43 are respectively connected to the ground. 5.根据权利要求1-4任一项所述的一种基于正弦控制的多涡卷混沌信号发生器，其特征在于：所述基本混沌信号产生电路N1、正弦函数产生电路N2和序列发生器N3所采用的电阻均为精密可调电阻或者为精密可调电位器。5. a kind of multi-scroll chaotic signal generator based on sinusoidal control according to any one of claims 1-4, it is characterized in that: described basic chaotic signal generating circuit N1, sine function generating circuit N2 and sequencer The resistors used by N3 are all precision adjustable resistors or precision adjustable potentiometers. 6.根据权利要求2所述的一种基于正弦控制的多涡卷混沌信号发生器，其特征在于：所述正弦函数发生芯片的型号为AD639。6. A multi-scroll chaotic signal generator based on sinusoidal control according to claim 2, wherein the model of the sinusoidal function generating chip is AD639.
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