CN110932737B - SCA waveform assembly combination and deployment method - Google Patents
SCA waveform assembly combination and deployment method Download PDFInfo
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- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
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Abstract
The invention discloses a method for combining and deploying an SCA waveform assembly, which comprises the following steps: (10) waveform component combination variable value determination: the method comprises the following steps that a main control module obtains waveform components needing to be combined from a waveform component library and determines actual numerical values for combined variables of the waveform components; (20) waveform component combined variable value distribution: the main control module distributes the waveform components to the processor and sends the combined variable values of the corresponding waveform components to the agent module; (30) waveform component combinatorial variable configuration: each waveform component obtains its own combined variable value from the agent module and configures to the actual combined variable within the waveform component program. The SCA waveform component combination method has the advantages of good universality and high efficiency.
Description
Technical Field
The invention belongs to the technical field of wireless communication, in particular to an SCA waveform component combination method with good universality and high efficiency.
Background
A Software Communication Architecture (SCA) has been widely used as an important Architecture in the field of Software radio, and in order to improve portability of waveform components, a SCA hardware abstraction layer (hereinafter, referred to as "hardware abstraction layer") standard is proposed. The hardware abstraction layer is middle-layer software which shields the communication details of bottom-layer hardware from the bottom and provides a standard interface from the top, the waveform component can realize data interaction between the components by calling the hardware abstraction standard interface, two addresses are defined in the hardware abstraction layer, and the two addresses are respectively a logical address LD (logical destination) and a physical address PD (physical destination), wherein the LD represents the address of the waveform component; PD represents the processor address at which the waveform component is running. Before a waveform component sends data, mapping of an LD-PD needs to be completed first, so that a hardware abstraction layer can route a message with an LD field to a processor PD and finally reach the LD component, in other words, the hardware abstraction layer reduces the coupling degree between the waveform components and improves the modularization degree of the waveform component, and then, can we splice different waveform components together in a combination manner to form a new waveform application? The answer is positive, but in practical engineering, many problems are faced, such as the selection of waveform components, the planning of waveform components LD and LD-PD mapping.
Through the above description, it can be determined that the waveform components are combined by means of parameters such as LD and LD-PD mapping relationships, and therefore, in the present invention, we define "current waveform component LD, target waveform component LD, and LD-PD mapping relationship" as the combined variables of the waveform components, and then the problem of combining the waveform components is converted into the problem of managing the combined variables. Generally, a waveform application is composed of a plurality of waveform components, the design and implementation of the waveform components are often completed by the same research and development team, the values of combination variables are uniformly planned and fixedly compiled into a waveform component program in a static mode (non-dynamic configuration), and then the waveform component is difficult to be combined with waveform components developed by other research and development teams for use. The waveform component is expected to be developed towards the direction of high modularization and combinability, the waveform component is not limited to certain waveform application but is independently developed, and like building blocks, different building blocks are selected according to different waveform application requirements to quickly build required waveforms, so that the development speed of the waveforms can be increased, and the repeated development of the waveform component is avoided. The "bricks" are independent before use and do not know which "brick" to combine next, so that the combination variables of the waveform elements are in an uninitialized state when not used, and are uniformly programmed and assigned values only when used in combination with other waveform elements.
In summary, two problems have to be solved if a combined use of waveform elements is desired: one is to establish a waveform component library, and descriptions of functions, combination variables and the like of all the waveform components which are put in the library must be standardized; the other is the unified planning and configuration of the combined variables of the waveform components.
Currently, waveform components are classified into GPP waveform components, DSP waveform components, and FPGA waveform components according to the type of processor being run. For a GPP waveform component, it is essentially a task running on an operating system, and the process of deploying the GPP waveform component is a process of starting a task on the operating system, and the values of the combination variables can be brought in during the process of starting the task, so the configuration of the combination variables of the GPP waveform component is relatively simple. However, for the DSP and FPGA waveform components, the deployment thereof starts from the processor executing the 1 st machine instruction after the operation, and the values of the combination variables cannot be brought in during the starting process, so the configuration of the combination variables of the DSP and FPGA waveform components will be complicated.
The Chinese invention patent 'waveform component dynamic address configuration system and method based on SCA' (application number: 201510895053.9, published: 2016-04-20) discloses a waveform component dynamic address configuration system and method based on SCA. The method comprises a master control module and a plurality of slave modules running on the DSP and the FPGA, wherein after a waveform component is deployed, the slave modules running on the DSP and the FPGA firstly acquire a physical address PD of a processor where the current processor is located, then wait for the master control module to inquire, when the master control module inquires, the slave agent module reports the mapping relation between a local waveform component LD and the local processor PD to the master control module, the master control module collects the mapping relation of all LD-PDs and then sends the LD-PD mapping relation to each slave module, and the slave modules update an LD-PD mapping table in the waveform component by using the information. The invention can ensure that the waveform component has correct LD and PD mapping relation even if the waveform component changes the deployment processor, solves the problem of flexible deployment of the waveform component to a certain extent, but has certain limitation, and concretely comprises the following steps:
1. the invention solves the problem that the mapping relation of LD-PD is wrong because a processor deployed by a certain waveform component in a waveform application is changed, and can not completely solve the problem encountered in the process of waveform component combination deployment;
this is because the waveform components involved in the "SCA-based waveform component dynamic address configuration system and method" (application No. 201510895053.9,) are all from the waveform component in the same waveform application, not from the waveform components in different waveform applications, and it solves the problem that the LD-PD mapping relationship is wrong due to the change of the processor deployed by the waveform component in one waveform application, and only updates the LD-PD mapping relationship, in this context, the LD of each waveform component and the LD of the target waveform component are both defined at the beginning of the waveform design and compiled in the waveform component, and are unchangeable, and the only changeable is the LD-PD mapping relationship, but the waveform component combination department defined by us refers to the process of developing and using waveform components of different manufacturers, the mapping relations of the LD, the target component LD and the LD-PD of each waveform component to be combined need to be re-planned and configured, so that the method in the prior patent can not solve the problem in the waveform component combination department;
2. the method of the present invention is not highly generalized, because it puts a functional requirement on the hardware platform, that is, the physical address PD of the processor must be available from the agent module, and this functional requirement seems simple, but not easily done by every hardware platform, for example: in order to use an SRIO bus, a DSP or FPGA processor with the SRIO port is generally cascaded through a local bus, the DSP or FPGA serves as a CPU peripheral, data receiving and sending of the CPU are all relayed through the cascaded processor DSP or FPGA, then a slave module running on the CPU is difficult to directly obtain an SRIO address of the DSP or FPGA, and if the SRIO address is obtained, a SIRO address interaction module must be developed between the CPU and the DSP or FPGA, so that the adaptability of the existing patented method to a hardware platform is not good enough;
3. the LD-PD mapping relation configuration in the invention comprises two processes of inquiry and issuing, and the LD-PD mapping relation is preferably not obtained by a field inquiry mode but completed before the waveform component combination and issue, and once the waveform component is issued to a corresponding processor, the LD-PD mapping relation is directly issued to each waveform component, thereby reducing the time for the waveform component to issue.
In summary, the prior art has the following problems: the capacity is insufficient, and the combination and deployment of any waveform component cannot be realized; the method has special requirements on functions of a hardware platform and is not good enough in universality; the waveform component has large delay and low efficiency.
Disclosure of Invention
The invention aims to provide a method for combining and deploying an SCA waveform component, which has good universality and high efficiency.
The technical solution for realizing the purpose of the invention is as follows:
a method for assembling and deploying an SCA waveform assembly comprises the following steps:
(10) waveform component combination variable value determination: the method comprises the following steps that a main control module obtains waveform components needing to be combined from a waveform component library and determines actual numerical values for combined variables of the waveform components;
(20) waveform component combined variable value distribution: the main control module distributes the waveform components to the processor and sends the combined variable values of the corresponding waveform components to the agent module;
(30) waveform component combinatorial variable configuration: each waveform component obtains its own combined variable value from the agent module and configures to the actual combined variable within the waveform component program.
Compared with the prior art, the invention has the following remarkable advantages:
1. the universality is good: the coupling degree among the waveform components is reduced, so that the LD of the waveform components, the LD of the target waveform component and the LD-PD mapping relation can be configured, the waveform components from different developers can be combined and deployed, and the combinability of the waveform components is improved;
2. the adaptability is strong: in the waveform component combination deployment method, the proxy module is a component based on a hardware abstraction layer, and the configuration message sent to the proxy module by the main control module is transmitted based on the standard message format of the hardware abstraction layer, so the waveform component combination deployment method is based on the hardware abstraction layer, is completely independent of a hardware platform, does not provide special requirements for the functions of the hardware platform, and is applicable to all hardware platforms with a software communication system structure;
3. the efficiency is high: in the waveform component combination deployment method, the main control module directly issues the planned configuration information to each agent module, and the negotiation interaction process with the agent modules does not exist, so that the waveform component combination deployment time is shortened.
The invention is described in further detail below with reference to the figures and the detailed description.
Drawings
FIG. 1 is a flowchart of a method for assembling and deploying an SCA waveform component according to the present invention.
Fig. 2 is a flowchart of the waveform component combined variable value determination step of fig. 1.
Fig. 3 is a block diagram of an agent module implementation.
Fig. 4 is a configuration message format example.
Fig. 5 is a flowchart of ReadConfig function execution.
FIG. 6 is a data flow diagram of a waveform component in an embodiment.
Fig. 7 is a configuration message of a processor of which PD is 0x21 in the embodiment.
Fig. 8 is a configuration message of a processor in which the PD is 0x22 in the embodiment.
Fig. 9 is a configuration message of a processor of which PD is 0x23 in the embodiment.
Fig. 10 is a description of the ReadConfig function of table 1.
FIG. 11 is a description of the attributes of waveform component A in the embodiment of Table 2.
FIG. 12 is a description of the attributes of waveform component B in the embodiment of Table 3.
FIG. 13 is a description of the attributes of waveform component C in the embodiment of Table 4.
Detailed Description
As shown in FIG. 1, the SCA waveform component combination method of the present invention comprises the following steps:
(10) waveform component combination variable value determination: the method comprises the following steps that a main control module obtains waveform components needing to be combined from a waveform component library and determines actual numerical values for combined variables of the waveform components;
in the (10) determining the combined variable value of the waveform component, the master control module is a master control component running on a hardware abstraction layer, and runs on a processor responsible for managing the hardware platform.
In the (10) determining the combined variable values of the waveform components, the waveform component library is a storage system for storing the waveform components, wherein the waveform components exist in the form of binary files, and each binary file is provided with a description file;
the description file is used for describing waveform component attributes and combination variables contained in the binary file;
the waveform component attributes comprise a current waveform component ID, a current waveform component function and index, a deployment processor condition and a target waveform component function;
the waveform component IDs are used for distinguishing different waveform components in a binary file, the IDs are numbered continuously from 1, and each waveform component has a unique ID number;
the target waveform component is a waveform component for receiving data sent by the current waveform component;
in other words, the target waveform component is the waveform component downstream of the data.
The combination variables comprise current waveform components LD, target waveform components LD and LD-PD mapping relations;
the LD-PD mapping relationship refers to a mapping relationship between a target waveform component LD of a current waveform component and a processor PD to which the target waveform component belongs.
Specifically, as shown in fig. 2, the (10) waveform component combination variable value determining step includes:
(11) a waveform acquisition component: according to the requirements on the functions and indexes of the waveform components, the main control module searches and combines a plurality of waveform components which can form a complete waveform application and are required in the waveform component library based on the description file;
(12) determining the waveform component LD: the main control module distributes a unique LD address for each waveform component;
(13) determine the target waveform component LD: the main control module determines a target waveform component of each waveform component by taking each waveform component as a current waveform component according to the flow direction of data, and determines a target waveform component LD value of each waveform component;
(14) determining a deployed physical processor: the main control module determines a processor to which the waveform component belongs according to the requirement of the waveform component in the description file for belonging to the processor, and simultaneously acquires a physical address PD of the processor according to a hardware platform manual;
(15) determining an LD-PD mapping relation: the main control module maps the target waveform component LD of each waveform component and the processor PD to which the target waveform component belongs mutually, and forms an LD-PD mapping relation for each waveform component.
(20) Waveform component combined variable value distribution: after the master control module distributes the waveform components to the processor, the master control module sends the combined variable values of the corresponding waveform components to the agent module;
in the step of distributing the waveform component combined variable values (20), the proxy module is a proxy component in which LD is 0, which runs on a hardware abstraction layer, receives the configuration message sent by the main control module from the lower side and stores the configuration message in the memory, and provides a read interface function ReadConfig on the upper side, and an implementation block diagram of the proxy module is shown in fig. 3;
the configuration message includes the combined variable values of all waveform components hosted on one processor, as shown in FIG. 4;
the input parameter of the read interface function ReadConfig is a waveform component ID, the output parameter is a combined variable value, the function description is shown in Table 1, the operation process is shown in FIG. 5, and the method comprises the following steps:
a) detecting whether the shared space valid field is valid;
b) valid, then return the combined variable value
c) And if not, returning to the step a).
Specifically, the (20) waveform component combined variable value distributing step includes:
(21) the main control module distributes all waveform components to corresponding processors;
(22) the main control module constructs a configuration message for the processor of each deployment waveform component;
(23) the main control module checks whether all the configuration messages are sent completely or not; if yes, the main control module program exits; if not, the main control module extracts a configuration message;
(24) the main control module registers an LD-PD mapping relation to a hardware abstraction layer, wherein LD is 0, and PD is a processor corresponding to the currently extracted configuration message;
(25) the main control module constructs a hardware abstraction layer message, wherein LD of the hardware abstraction layer message is 0, and payload is the currently extracted configuration message;
(26) the main control module sends out the hardware abstraction layer message containing the configuration message through the hardware abstraction layer interface; and returns to step (23).
(30) Waveform component combinatorial variable configuration: each waveform component obtains its own combined variable value from the agent module and configures to the actual combined variable within the waveform component program.
The (30) waveform component combination variable configuring step includes:
(31) the waveform component reads the configuration message: starting to operate a waveform component which is deployed on a corresponding processor, and calling a ReadConfig function to read a configuration message from a proxy module;
(32) the waveform component parses the configuration message: the waveform component analyzes the configuration message and obtains a combined variable value;
(33) the waveform component initializes the combination variables: the waveform component assigns the combined variable value to the actual combined variable within the waveform component program.
The principle of the invention is as follows:
the invention aims to improve the combinability of the waveform component, so that the waveform component can be repeatedly used and repeated research and development are avoided. The SCA waveform components are combined by depending on parameters such as LD and LD-PD mapping relations, so that the current waveform component LD, the target waveform component LD and the LD-PD mapping relation are defined as the combined variables of the waveform components, and the problem of combination and deployment of the SCA waveform components is converted into the problem of management of the combined variables. The invention designs a method for deploying SCA waveform component combination, which mainly comprises a main control module and a proxy module, wherein the main control module is a main control component running on a hardware abstraction layer and is deployed on a processor responsible for managing a hardware platform, the proxy module is a proxy component running on the hardware abstraction layer and is run on the processor capable of deploying the waveform component, and a realization block diagram is shown in figure 3. The data interaction between the main control module and the agent module is realized based on a hardware abstraction layer interface. The main control module is responsible for retrieving the waveform components to be combined from the waveform component library, determining the combined variable values of the waveform components, then distributing the waveform components to corresponding processors, finally, the main control module distributes the combined variable values to the processors of all the distributed waveform components, and the agent module on the processors stores the combined variable values after receiving the combined variable values and waits for the waveform components to read. The waveform component starts to run after being deployed, the combined variable value can be obtained from the agent module by calling the read interface function, then the combined variable value is assigned to the actual combined variable in the program, and at the moment, the waveform component combined deployment is finished, and a waveform application with completed functions can be formed. The core idea of the invention comprises three parts:
1. waveform component combination variable value determination
In order to ensure the benefit of the research party and the stability of the version of the waveform component, the waveform component should be published externally in a binary form and uniformly stored in a waveform component library, and in order to enable the master control module to know the detailed attributes of each waveform component, each waveform component also needs to be provided with a description file with a standardized description language, and the description file should describe the waveform component attributes and combination variables contained in the binary file.
Waveform component attributes include current waveform component ID, current waveform component function and index, deployment processor condition and target waveform component function, and the like. In addition, it should be noted that a binary file may contain a plurality of waveform components, for example, a DSP or FPGA binary file contains all programs running on the processor, and if a plurality of waveform components are running on the DSP or FPGA processor, a DSP or FPGA binary file contains a plurality of waveform components. When the master control module sends the combined variable values to the processors, in order to enable different waveform components to obtain the combined variable values belonging to the different waveform components, each waveform component must have a unique ID number on the current processor, and for the convenience of management of the ID numbers, the ID numbers are numbered consecutively from 1.
The master control module retrieves the waveform components to be combined from the waveform component library and then starts to determine the combined variable value of each waveform component: firstly, a unique LD address is distributed to each waveform component, then, according to the flow direction of data, each waveform component is taken as a current waveform component, the LD value of a target waveform component of each waveform component is determined, finally, the main control module determines a processor to which the waveform component belongs and obtains the physical address PD of the processor according to a hardware platform manual, and at the moment, the LD-PD mapping relation of the waveform component can be determined.
2. Waveform component combined variable value distribution
After the combined variable value is determined, the main control module firstly transmits the waveform component deployment wave to the corresponding processor, then constructs a configuration message for each processor, the configuration message comprises the combined variable value of the waveform component running on the processor, finally, the main control module transmits the corresponding configuration message to the processors of all the deployment waveform components, and the agent module running on the processor can receive the configuration message.
3. Waveform component combinatorial variable configuration
Each waveform component begins to run after being distributed to a processor, firstly, a read interface function is called to obtain a combined variable value from an agent module, then the combined variable value is assigned to an actual combined variable in a program, and at the moment, the waveform component combined distribution is finished, so that a waveform application with completed functions can be formed
In order to make the objects, technical solutions and advantages of the present invention more clear, the present application is further described in detail below with reference to the accompanying drawings, the attached tables and the embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
In one embodiment, assuming that a new waveform application needs to be combined using waveform component a, waveform component B, and waveform component C, the combining process is as follows:
1. waveform component combination variable value determination:
(11) a waveform acquisition component: the main control module retrieves a waveform component A from a waveform component library, then according to the description file information of the waveform component A, as shown in table 2, a target waveform component of the waveform component A can be determined to comprise a waveform component B and a waveform component C, then continues to retrieve the waveform component B and the waveform component C from the waveform component library, and according to the description file information of the waveform component B and the waveform component C, as shown in tables 3 and 4, it can be judged that the two waveform components have no target waveform component, and at this time, the retrieval of the waveform component is finished;
(12) determining the waveform component LD: the LD values distributed by the master control module to the waveform component A, the waveform component B and the waveform component C are 0x1, 0x2 and 0x 3;
(13) determine the target waveform component LD: according to the data flow direction, the logical connection relationship of the waveform components is determined, and as shown in FIG. 6, the target waveform components LD of the waveform component A are 0x2 and 0x3
(14) Determining a deployed physical processor: the main control module determines a processor to be deployed by a waveform component according to the requirement of the processor to be deployed by the waveform component in the description file, and simultaneously acquires a physical address PD of the processor according to a hardware platform manual, wherein the physical addresses of the processors deployed by the waveform component A, the waveform component B and the waveform component C are respectively 0x21, 0x22 and 0x 23; (ii) a
(15) Determining an LD-PD mapping relation: the mapping relations of the LD-PD of the waveform component A are that the LD 0x2 is mapped with the PD 0x22, and the LD 0x3 is mapped with the PD 0x23, and since the waveform component B and the waveform component C have no target waveform component, all the waveform components have no LD-PD mapping relation.
2. Combined variable value distribution of waveform components:
(21) the master control module respectively deploys the waveform component A, the waveform component B and the waveform component C to processors with PD of 0x21, 0x22 and 0x 23;
(22) the master control module constructs a configuration message for each processor with PDs of 0x21, 0x22, and 0x23, the configuration message including the combined variable values of the waveform components running on the processor, as shown in fig. 7, 8, and 9;
(23) the main control module extracts configuration information of a processor with a PD of 0x21, then registers an LD-PD mapping relation to a hardware abstraction layer, wherein the LD is 0, the PD is 0x21, then the hardware abstraction layer information is constructed, the LD of the hardware abstraction layer information is 0, payload is the configuration information which is currently prepared to be sent, and finally the hardware abstraction layer information containing the configuration information is sent out;
(24) the main control module extracts configuration information of a processor with a PD of 0x22, then registers an LD-PD mapping relation to a hardware abstraction layer, wherein the LD is 0, the PD is 0x22, then the hardware abstraction layer information is constructed, the LD of the hardware abstraction layer information is 0, payload is the configuration information which is currently prepared to be sent, and finally the hardware abstraction layer information containing the configuration information is sent out;
(25) the main control module extracts configuration information of a processor with a PD of 0x23, then registers an LD-PD mapping relation to a hardware abstraction layer, wherein the LD is 0, the PD is 0x23, then the hardware abstraction layer information is constructed, the LD of the hardware abstraction layer information is 0, payload is the configuration information which is currently prepared to be sent, and finally the hardware abstraction layer information containing the configuration information is sent out;
3. waveform component combinatorial variable configuration
(31) The waveform component A, the waveform component B and the waveform component C are deployed to corresponding processors and then run, a ReadConfig function is called to read configuration information from the proxy module, when the proxy module receives the configuration information sent by the main control module, the ReadConfig function returns the configuration information of the waveform component, otherwise, the ReadConfig function is in a blocking state and waits for the arrival of the configuration information;
(32) the waveform component a obtains the combined variable value by reading and parsing the configuration message: the mapping relation of the self LD of 0x1, the target component LD _1 of 0x2, the target component LD _2 of 0x3 and the LD-PD comprises 0x2-0x22 and 0x3-0x23, and then the waveform component A assigns the values of the combined variables to actual combined variables in the program;
(33) the waveform component B obtains the combined variable value by reading and parsing the configuration message: LD is 0x2, and then the waveform component B assigns the value of the combined variable to the actual combined variable in the program;
(34) the waveform component C reads and parses the configuration message and obtains the combined variable values: self LD is 0x3 and then the waveform component C assigns the combined variable value to the actual combined variable in the program.
Claims (4)
1. A method for assembling and deploying an SCA waveform assembly comprises the following steps:
(10) waveform component combination variable value determination: the method comprises the following steps that a main control module obtains waveform components needing to be combined from a waveform component library and determines actual numerical values for combined variables of the waveform components;
(20) waveform component combined variable value distribution: after the master control module distributes the waveform components to the processor, the master control module sends the combined variable values of the corresponding waveform components to the agent module;
(30) waveform component combinatorial variable configuration: each waveform component obtains a respective combined variable value from the agent module and configures the combined variable value to an actual combined variable in the waveform component program;
in the step of (10) determining the combined variable values of the waveform components, the master control module is a master control component running on a hardware abstraction layer and is deployed on a processor responsible for managing a hardware platform;
the method is characterized in that:
in the (10) determining the combined variable values of the waveform components, the waveform component library is a storage system for storing the waveform components, wherein the waveform components exist in the form of binary files, and each binary file is provided with a description file;
the description file is used for describing waveform component attributes and combination variables contained in the binary file;
the waveform component attributes comprise a current waveform component ID, a current waveform component function and index, a deployment processor condition and a target waveform component function;
the target waveform component is a waveform component for receiving data sent by the current waveform component;
the combination variables comprise current waveform components LD, target waveform components LD and LD-PD mapping relations;
the (10) waveform component combination variable value determining step includes:
(11) a waveform acquisition component: according to the requirements on the functions and indexes of the waveform components, the main control module searches and combines a plurality of waveform components which can form a complete waveform application and are required in the waveform component library based on the description file;
(12) determining the waveform component LD: the main control module distributes a unique LD address for each waveform component;
(13) determine the target waveform component LD: the main control module determines a target waveform component of each waveform component by taking each waveform component as a current waveform component according to the flow direction of data, and determines a target waveform component LD value of each waveform component;
(14) determining a deployed physical processor: the main control module determines a processor to which the waveform component belongs according to the requirement of the waveform component in the description file for belonging to the processor, and simultaneously acquires a physical address PD of the processor according to a hardware platform manual;
(15) determining an LD-PD mapping relation: the main control module maps the target waveform component LD of each waveform component and the processor PD to which the target waveform component belongs mutually, and forms an LD-PD mapping relation for each waveform component.
2. The method of claim 1, wherein the waveform assembly is assembled by:
in the step of distributing the waveform component combined variable values (20), the proxy module is a proxy component with LD of 0 running on a hardware abstraction layer, and a proxy module runs on a processor of each of the deployed waveform components, receives a configuration message sent by the main control module from the lower side, stores the configuration message in a memory, and provides a read interface function readcon from the upper side;
the configuration message includes values of combined variables of all waveform components hosted on a processor;
the input parameter of the read interface function ReadConfig is a waveform component ID, the output parameter is a combined variable value, and the operation steps comprise:
a) detecting whether the shared space valid field is valid;
b) if the variable value is valid, returning the combined variable value;
c) and if not, returning to the step a).
3. The waveform component combinatorial deployment method of claim 1, wherein the step of (20) distributing the combined variable values of the waveform components comprises:
(21) the main control module distributes all waveform components to corresponding processors;
(22) the main control module constructs a configuration message for the processor of each deployment waveform component;
(23) the main control module checks whether all the configuration messages are sent completely or not; if yes, the main control module program exits; if not, the main control module extracts a configuration message;
(24) the main control module registers an LD-PD mapping relation to a hardware abstraction layer, wherein LD is 0, and PD is a processor corresponding to the currently extracted configuration message;
(25) the main control module constructs a hardware abstraction layer message, wherein LD of the hardware abstraction layer message is 0, and payload is the currently extracted configuration message;
(26) the main control module sends out the hardware abstraction layer message containing the configuration message through the hardware abstraction layer interface; and returns to step (23).
4. The method of waveform component assembly deployment according to claim 1, wherein the (30) waveform component assembly variable configuration step comprises:
(31) the waveform component reads the configuration message: starting to operate a waveform component which is deployed on a corresponding processor, and calling a ReadConfig function to read a configuration message from a proxy module;
(32) the waveform component parses the configuration message: the waveform component analyzes the configuration message and obtains a combined variable value;
(33) the waveform component initializes the combination variables: the waveform component assigns the combined variable value to the actual combined variable within the waveform component program.
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