CN110932563A - LLC resonant converter - Google Patents

LLC resonant converter Download PDF

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Publication number
CN110932563A
CN110932563A CN201911397672.XA CN201911397672A CN110932563A CN 110932563 A CN110932563 A CN 110932563A CN 201911397672 A CN201911397672 A CN 201911397672A CN 110932563 A CN110932563 A CN 110932563A
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China
Prior art keywords
frequency
wave signal
square wave
circuit
pmos transistor
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Chinese (zh)
Inventor
陈洪
唐青松
罗方利
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WUHAN POWFUTURE POWER SOURCE TECHNOLOGY Co Ltd
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WUHAN POWFUTURE POWER SOURCE TECHNOLOGY Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention relates to the technical field of direct current conversion, and provides an LLC resonant converter, which comprises: the digital waveform generating circuit drives the LLC resonant circuit to work in a first working frequency range lower than the LC eigen-resonant frequency in a first frequency reduction period until a first direct current output voltage output by the AC/DC conversion circuit reaches a first preset voltage value, the LLC resonant circuit is driven to stably work at a stable frequency in a constant frequency period, then the LLC resonant circuit is driven to work in a second working frequency range which is gradually decreased from the stable frequency to the LC intrinsic resonant frequency in a second frequency reduction period after the constant frequency period, and the working frequency of the LLC resonant circuit is gradually decreased to the LC intrinsic resonant frequency in a staged mode, so that the LLC resonant circuit is free from quality factor constraint in the process of inhibiting the current impact on the digital waveform generating circuit, and the problem that the LLC resonant conversion circuit in the existing LLC resonant converter is limited by the quality factor when inhibiting the current impact on the digital waveform generating circuit is solved.

Description

LLC resonant converter
Technical Field
The invention relates to the technical field of direct current conversion, in particular to an LLC resonant converter.
Background
In the related art, as shown in fig. 1, the LLC resonant converter includes a digital waveform generating circuit, an LLC resonant converting circuit, and an AC/DC converting circuit coupled to the digital waveform generating circuit through the LLC resonant converting circuit, the digital signal generator can generate a square wave signal, the LLC resonant converter can resonate to generate an alternating voltage when the square wave signal is applied by the digital signal generator, and the AC/DC converting circuit converts the alternating voltage into a direct voltage when the alternating voltage is applied by the LLC resonant converting circuit.
Under the condition that the working frequency of the square wave signal is equal to the LC intrinsic resonance frequency of the LLC resonance conversion circuit, in the LLC resonance conversion circuit, a resonance capacitor CrAnd a resonant inductor LrThe series resonance impedance is zero, the voltage gain of LLC resonance conversion circuit is equal to 1, and load and quality factor Q make LLC resonance converter obtain maximum voltage transformation performance, if the digital signal generator directly applies the square wave signal whose working frequency is equal to LC intrinsic resonance frequency to LLC resonance conversion circuit, filter capacitor C in AC/DC conversion circuitfThe voltage is slowly boosted, the LLC resonant conversion circuit can impact the current of the digital waveform generation circuit, and the reliability of the LLC resonant conversion circuit and the safety of the digital waveform generation circuit are reduced.
In order to effectively inhibit the LLC resonant conversion circuit from generating current impact on the digital signal generator, on the basis of ensuring that the LLC resonant conversion circuit has a higher quality factor Q, the digital signal generator can gradually reduce the frequency of a square wave signal applied to the LLC resonant conversion circuit, in the frequency reduction process, the square wave signal gradually approaches LC eigen resonance frequency from working frequency higher than the LC eigen resonance frequency, and the voltage gain of the LLC resonant converter gradually approaches 1.
However, the quality factor Q is inversely related to the voltage gain, and when the quality factor Q is higher, the voltage gain is lower, so that the transformation performance and reliability of the LLC resonant converter with higher quality factor Q in the process of suppressing the current impact on the digital waveform generating circuit are suppressed, and the LLC resonant converter with lower quality factor Q is difficult to effectively suppress the current impact on the digital waveform generating circuit.
Disclosure of Invention
The invention provides an LLC resonant converter aiming at the problem that an LLC resonant conversion circuit in the existing LLC resonant converter is restricted by a quality factor when inhibiting the current impact generated on a digital waveform generating circuit, comprising: the input end of the AC/DC conversion circuit is electrically connected with the output end of the digital waveform generating circuit through the LLC resonant circuit, and the output end of the AC/DC conversion circuit is electrically connected with the input end of the digital waveform generating circuit;
the digital waveform generating circuit is used for modulating a first positive voltage frequency-reduction square wave signal in a first frequency-reduction period and applying the first positive voltage frequency-reduction square wave signal to the LLC resonant circuit, wherein the first positive voltage frequency-reduction square wave signal comprises a first working frequency range which is decreased from an initial frequency to a stable frequency and is lower than the LC intrinsic resonant frequency of the LLC resonant circuit;
an LLC resonant circuit for converting the first positive voltage down-converted square wave signal into a first alternating voltage and applying the first alternating voltage to the AC/DC conversion circuit;
an AC/DC conversion circuit for converting the first alternating-current voltage into a first direct-current output voltage and applying the first direct-current output voltage to the digital waveform generation circuit;
the digital waveform generating circuit is used for modulating a first positive and negative voltage constant-frequency square wave signal in a constant-frequency time period after the first direct current output voltage reaches a first preset voltage value, and applying the first positive and negative voltage constant-frequency square wave signal to the LLC resonant circuit, wherein the first positive and negative voltage constant-frequency square wave signal comprises stable frequency and cycle number, and the product of the cycle number and the stable frequency is equal to the time length of the constant-frequency time period;
and the digital waveform generating circuit is used for modulating positive and negative voltage frequency-dropping square wave signals in a second frequency-dropping time period after the constant-frequency time period, and applying the positive and negative voltage frequency-dropping square wave signals to the LLC resonant circuit, wherein the positive and negative voltage frequency-dropping square wave signals comprise a second working frequency range which is decreased from the stable frequency to the LC intrinsic resonant frequency.
The LLC resonant converter provided by the invention has the beneficial effects that: the digital waveform generating circuit drives the LLC resonant circuit to work in a first working frequency range lower than the LC eigen-resonant frequency in a first frequency reduction period until a first direct current output voltage output by the AC/DC conversion circuit reaches a first preset voltage value, the LLC resonant circuit is driven to stably work at a stable frequency in a constant frequency period, then the LLC resonant circuit is driven to work in a second working frequency range which is gradually decreased from the stable frequency to the LC intrinsic resonant frequency in a second frequency reduction period after the constant frequency period, and the working frequency of the LLC resonant circuit is gradually decreased to the LC intrinsic resonant frequency in a staged mode, so that the LLC resonant circuit is free from quality factor constraint in the process of inhibiting the current impact on the digital waveform generating circuit, and the problem that the LLC resonant conversion circuit in the existing LLC resonant converter is limited by the quality factor when inhibiting the current impact on the digital waveform generating circuit is solved.
Drawings
Fig. 1 is a circuit schematic diagram of an LLC resonant converter provided in the prior art;
fig. 2 is a schematic circuit diagram of an LLC resonant converter according to the present invention.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 2, the LLC resonant converter provided by the present invention includes a digital waveform generating circuit, an LLC resonant circuit, and an AC/DC converting circuit, wherein an input terminal of the AC/DC converting circuit is electrically connected to an output terminal of the digital waveform generating circuit through the LLC resonant circuit, and an output terminal of the AC/DC converting circuit is electrically connected to an input terminal of the digital waveform generating circuit.
A digital waveform generating circuit, configured to modulate a first positive voltage down-converted square wave signal during a first down-conversion period, and apply the first positive voltage down-converted square wave signal to the LLC resonant circuit, where the first positive voltage down-converted square wave signal includes a first operating frequency range decreasing from an initial frequency to a stationary frequency and lower than an LC eigen-resonant frequency of the LLC resonant circuit, and a ratio between the initial frequency and the LC eigen-resonant frequency is in a range of 2 to 4, for example: the ratio between the initial frequency and the LC eigenresonance frequency is 3.
The LLC resonant circuit is used for converting the first positive voltage down-converted square wave signal into a first alternating voltage and applying the first alternating voltage to the AC/DC conversion circuit.
And the AC/DC conversion circuit is used for converting the first alternating current voltage into a first direct current output voltage and feeding back the first direct current output voltage to the digital waveform generation circuit.
The digital waveform generating circuit is used for modulating a first positive and negative voltage constant-frequency square wave signal in a constant-frequency time period after the first direct current output voltage reaches a first preset voltage value, and applying the first positive and negative voltage constant-frequency square wave signal to the LLC resonant circuit, wherein the first positive and negative voltage constant-frequency square wave signal comprises stable frequency and the number of cycles, and the product of the number of cycles and the stable frequency is equal to the duration of the constant-frequency time period.
And the digital waveform generating circuit is used for modulating positive and negative voltage frequency-dropping square wave signals in a second frequency-dropping time period after the constant-frequency time period, and applying the positive and negative voltage frequency-dropping square wave signals to the LLC resonant circuit, wherein the positive and negative voltage frequency-dropping square wave signals comprise a second working frequency range which is decreased from the stable frequency to the LC intrinsic resonant frequency.
And the LLC resonant circuit is also used for converting the positive and negative voltage frequency-dropping square wave signals into a second alternating voltage and applying the second alternating voltage to the AC/DC conversion circuit.
And the AC/DC conversion circuit is also used for converting the second alternating current voltage into a second direct current output voltage and feeding the second direct current output voltage back to the digital waveform generation circuit.
The digital waveform generating circuit is further configured to modulate a second positive-negative voltage constant-frequency square wave signal having a constant frequency that is an LC intrinsic resonant frequency according to a second preset voltage value when the second dc output voltage reaches the second preset voltage value that is higher than the first preset voltage value, and continuously apply the second positive-negative voltage constant-frequency square wave signal to the LLC resonant circuit, where a ratio between the second preset voltage value and the first preset voltage is in a value range of 0.15 to 0.35, for example: the ratio of the second preset voltage value to the first preset voltage value is 0.25.
The LLC resonant circuit is used for keeping working at an LC intrinsic resonant frequency under the driving of a second positive and negative voltage constant-frequency square wave signal, namely: the LLC resonant circuit enters a steady-state mode of operation.
The digital waveform generating circuit comprises a direct current power supply, a double-circuit digital control circuit and a full-bridge switch circuit, wherein the full-bridge switch circuit comprises a first PMOS (P-channel metal oxide semiconductor) tube, a second PMOS tube, a third PMOS tube and a fourth PMOS tube, a source electrode of the first PMOS tube is electrically connected with a source electrode of the second PMOS tube, a source electrode of the first PMOS tube is electrically connected with a source electrode of the third PMOS tube, a source electrode of the fourth PMOS tube is electrically connected with a drain electrode of the second PMOS tube, a drain electrode of the fourth PMOS tube is electrically connected with a drain electrode of the third PMOS tube, a common end between the source electrode of the first PMOS tube and the source electrode of the second PMOS tube is electrically connected to a positive level of the direct current power supply, and a common end between the drain electrode of the fourth PMOS tube and the drain electrode of the third PMOS tube is electrically connected to a negative level of the direct current.
The grid electrode of the first PMOS tube and the grid electrode of the fourth PMOS tube are electrically connected on a first pulse output port of the double-path digital control circuit, the grid electrode of the second PMOS tube and the grid electrode of the third PMOS tube are electrically connected on a second pulse output port of the double-path digital control circuit, the common end between the drain electrode of the first PMOS tube and the source electrode of the third PMOS tube is electrically connected on one end of the LLC resonance circuit, and the common end between the drain electrode of the second PMOS tube and the source electrode of the fourth PMOS tube is electrically connected on the other end of the LLC resonance circuit.
And the two-way digital control circuit is used for synchronously applying a continuous high-level signal to the first PMOS tube and the fourth PMOS tube through the first pulse output port before the first frequency reduction period, so that the first PMOS tube and the fourth PMOS tube are driven to be in a conducting state from a disconnected state by the continuous high-level signal, and synchronously applying a continuous low-level signal to the second PMOS tube and the third PMOS tube through the second pulse output port, so that the second PMOS tube and the third PMOS tube are kept in the disconnected state by the continuous low-level signal, and the phase difference between the continuous low-level signal and the continuous high-level signal is equal to 180 degrees.
And the two-way digital control circuit is used for modulating a rectangular wave signal according to a preset pulse width increasing model and an initial frequency from the time when the continuous low-level signal is synchronously applied to the third PMOS tube through the second pulse output port to the width adjusting time period of the starting time of the first frequency reduction time period, and applying the rectangular wave signal to the first PMOS tube and the fourth PMOS tube through the first pulse output port, wherein the rectangular wave signal comprises the initial frequency and a duty ratio range which is increased from the initial duty ratio to 0.5, and the ratio of the initial duty ratio to 0.5 is in a value range of 0.05-0.2, for example, the ratio of the initial duty ratio to 0.5 is 0.15.
The preset pulse width increasing model is specifically expressed as:
Figure 100002_DEST_PATH_IMAGE002
wherein,
Figure 100002_DEST_PATH_IMAGE004
representing any one of the operating duty cycles in the duty cycle range,
Figure 100002_DEST_PATH_IMAGE006
which represents the initial duty cycle of the light source,
Figure 100002_DEST_PATH_IMAGE008
indicating the duty cycle of the duty cycle during the width modulation period
Figure 100002_DEST_PATH_IMAGE004A
To a corresponding second
Figure 100002_DEST_PATH_IMAGE011
The time of each timing is counted,
Figure 100002_DEST_PATH_IMAGE013
representing a second preset duration required to increment from the initial duty cycle to 0.5, for example: the second preset duration is 5 ms.
The direct current power supply is used for applying direct current power supply voltage to the full-bridge switching circuit; the double-path digital control circuit is used for modulating a first frequency-reducing square wave signal with a first working frequency range according to a preset pulse frequency linear descending model, synchronously applying the first frequency-reducing square wave signal to the first PMOS tube and the fourth PMOS tube through the first pulse output port, and keeping the second PMOS tube and the third PMOS tube in a disconnected state; and the full-bridge switching circuit is used for converting the direct-current supply voltage into a first positive voltage frequency-reducing square wave signal when the first PMOS tube and the fourth PMOS tube are synchronously driven by the first frequency-reducing square wave signal to perform switching action.
The double-path digital control circuit is used for respectively modulating a first constant-frequency square wave signal and a second constant-frequency square wave signal which both have stable frequencies, synchronously applying the first constant-frequency square wave signal to the first PMOS tube and the fourth PMOS tube through the first pulse output port, and synchronously applying the second constant-frequency square wave signal to the second PMOS tube and the third PMOS tube through the second pulse output port, wherein the phase difference between the second constant-frequency square wave signal and the first constant-frequency square wave signal is equal to 180 degrees; the full-bridge switching circuit is used for converting direct-current supply voltage into positive voltage constant-frequency square wave signals during the period that the first PMOS tube and the fourth PMOS tube are synchronously driven by the first constant-frequency square wave signals to perform switching actions, converting the direct-current supply voltage into negative voltage constant-frequency square wave signals during the period that the second PMOS tube and the third PMOS tube are synchronously driven by the second constant-frequency square wave signals to perform switching actions, and complementing the negative voltage constant-frequency square wave signals and the positive voltage constant-frequency square wave signals into first positive and negative voltage constant-frequency square wave signals.
The double-path digital control circuit is used for respectively modulating a second frequency-reducing square wave signal and a third frequency-reducing square wave signal which both have a second working frequency range according to a preset pulse frequency linear descending model, applying the second frequency-reducing square wave signal to the first PMOS tube and the fourth PMOS tube synchronously through the first pulse output port, and applying the third frequency-reducing square wave signal to the second PMOS tube and the third PMOS tube through the second pulse output port, wherein the phase difference between the third frequency-reducing square wave signal and the second frequency-reducing square wave signal is equal to 180 degrees; the full-bridge switching circuit is used for converting the direct-current supply voltage into a second positive voltage frequency-reducing square wave signal during the period that the first PMOS tube and the fourth PMOS tube are synchronously driven by the second frequency-reducing square wave signal to perform switching action, converting the direct-current supply voltage into a negative voltage frequency-reducing square wave signal during the period that the second PMOS tube and the third PMOS tube are synchronously driven by the third frequency-reducing square wave signal to perform switching action, and complementing the negative voltage frequency-reducing square wave signal and the second positive voltage frequency-reducing square wave signal into a positive voltage frequency-reducing square wave signal and a negative voltage frequency-reducing square wave signal.
The preset pulse frequency linear decreasing model is specifically expressed as follows:
Figure 100002_DEST_PATH_IMAGE015
wherein,
Figure 100002_DEST_PATH_IMAGE017
representing either an operating frequency in the first operating frequency range or in the second operating frequency range,
Figure 100002_DEST_PATH_IMAGE019
it is shown that the initial frequency is,
Figure 100002_DEST_PATH_IMAGE021
indicating the time between the start of the first downconversion period to the end of the second downconversion period and the operating frequency
Figure DEST_PATH_IMAGE017A
To a corresponding second
Figure DEST_PATH_IMAGE024
The time of each timing is counted,
Figure 100002_DEST_PATH_IMAGE026
showing the LC eigen-resonance frequency after the resonance capacitor and the resonance inductor in the LLC resonance circuit are connected in series,
Figure 100002_DEST_PATH_IMAGE028
the first preset time period required for descending from the initial frequency to the LC eigen-resonance frequency is represented, and the ratio of the first preset time period to the second preset time period is in a value range of 3 to 5, for example: the first preset duration is 20 ms.
The reader should understand that in the description of this specification, reference to the description of the terms "aspect," "embodiment," or "detailed description" or the like means that a particular feature, step, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention, and the terms "first" and "second," or the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second", etc., may explicitly or implicitly include at least one of the feature.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (10)

1. An LLC resonant converter comprising a digital waveform generating circuit, an LLC resonant circuit and an AC/DC conversion circuit, an input of the AC/DC conversion circuit being electrically connected to an output of the digital waveform generating circuit via the LLC resonant circuit, an output of the AC/DC conversion circuit being electrically connected to an input of the digital waveform generating circuit, the LLC resonant converter comprising:
the digital waveform generating circuit is used for modulating a first positive voltage frequency-reducing square wave signal in a first frequency-reducing period and applying the first positive voltage frequency-reducing square wave signal to the LLC resonant circuit, wherein the first positive voltage frequency-reducing square wave signal comprises a first working frequency range which is decreased from an initial frequency to a stable frequency and is lower than an LC intrinsic resonant frequency of the LLC resonant circuit;
the LLC resonant circuit is used for converting the first positive voltage down-conversion square wave signal into a first alternating voltage and applying the first alternating voltage to the AC/DC conversion circuit;
the AC/DC conversion circuit is used for converting the first alternating current voltage into a first direct current output voltage and feeding back the first direct current output voltage to the digital waveform generating circuit;
the digital waveform generating circuit is further configured to modulate a first positive-negative voltage constant-frequency square wave signal in a constant-frequency time period after the first dc output voltage reaches a first preset voltage value, and apply the first positive-negative voltage constant-frequency square wave signal to the LLC resonant circuit, where the first positive-negative voltage constant-frequency square wave signal includes the stable frequency and the number of cycles, and a product of the number of cycles and the stable frequency is equal to a duration of the constant-frequency time period;
the digital waveform generating circuit is further configured to modulate a positive and negative voltage down-conversion square wave signal in a second frequency-reduction period after the constant-frequency period, and apply the positive and negative voltage down-conversion square wave signal to the LLC resonant circuit, where the positive and negative voltage down-conversion square wave signal includes a second working frequency range that decreases from the stable frequency to the LC intrinsic resonant frequency.
2. The LLC resonant converter of claim 1, wherein said digital waveform generation circuit comprises a DC power supply, a two-way digital control circuit and a full-bridge switching circuit, said full-bridge switching circuit comprising a first PMOS transistor, a second PMOS transistor, a third PMOS transistor and a fourth PMOS transistor, a source of said first PMOS transistor being electrically connected to a source of said second PMOS transistor, a source of said first PMOS transistor being electrically connected to a source of said third PMOS transistor, a source of said fourth PMOS transistor being electrically connected to a drain of said second PMOS transistor, a drain of said fourth PMOS transistor being electrically connected to a drain of said third PMOS transistor, a common terminal between a source of said first PMOS transistor and a source of said second PMOS transistor being electrically connected to a positive stage of said DC power supply, a common terminal between a drain of said fourth PMOS transistor and a drain of said third PMOS transistor being electrically connected to a negative stage of said DC power supply, the grid electrode of the first PMOS tube and the grid electrode of the fourth PMOS tube are electrically connected to a first pulse output port of the double-path digital control circuit, the grid electrode of the second PMOS tube and the grid electrode of the third PMOS tube are electrically connected to a second pulse output port of the double-path digital control circuit, a common end between a drain stage of the first PMOS tube and a source electrode of the third PMOS tube is electrically connected to one end of the LLC resonance circuit, and a common end between a drain stage of the second PMOS tube and a source electrode of the fourth PMOS tube is electrically connected to the other end of the LLC resonance circuit;
the direct current power supply is used for applying direct current power supply voltage to the full-bridge switching circuit;
the two-way digital control circuit is used for modulating a first frequency-reducing square wave signal with the first working frequency range according to a preset pulse frequency linear decreasing model, and synchronously applying the first frequency-reducing square wave signal to the first PMOS tube and the fourth PMOS tube through the first pulse output port, and keeping the second PMOS tube and the third PMOS tube in a disconnected state;
the full-bridge switch circuit is used for converting the direct-current supply voltage into the first positive voltage frequency-reducing square wave signal when the first PMOS tube and the fourth PMOS tube are synchronously driven by the first frequency-reducing square wave signal to perform switching action.
3. The LLC resonant converter of claim 2, wherein said two-way digital control circuit is further configured to separately modulate a first constant-frequency square-wave signal and a second constant-frequency square-wave signal each having said stable frequency, and synchronously apply said first constant-frequency square-wave signal to said first PMOS transistor and said fourth PMOS transistor through said first pulse output port, and synchronously apply said second constant-frequency square-wave signal to said second PMOS transistor and said third PMOS transistor through said second pulse output port, a phase difference between said second constant-frequency square-wave signal and said first constant-frequency square-wave signal being equal to 180 degrees;
the full-bridge switch circuit is further used for converting the direct-current supply voltage into a positive voltage constant-frequency square wave signal during the switching action of the first PMOS tube and the fourth PMOS tube which are synchronously driven by the first constant-frequency square wave signal, converting the direct-current supply voltage into a negative voltage constant-frequency square wave signal during the switching action of the second PMOS tube and the third PMOS tube which are synchronously driven by the second constant-frequency square wave signal, and complementing the negative voltage constant-frequency square wave signal into the first positive and negative voltage constant-frequency square wave signal.
4. The LLC resonant converter of claim 2, wherein the two-way digital control circuit is further configured to respectively modulate a second downconversion square wave signal and a third downconversion square wave signal, both having the second operating frequency range, according to the preset pulse-frequency linear decreasing model, and apply the second downconversion square wave signal to the first PMOS transistor and the fourth PMOS transistor synchronously via the first pulse output port, and apply the third downconversion square wave signal to the second PMOS transistor and the third PMOS transistor via the second pulse output port, a phase difference between the third downconversion square wave signal and the second downconversion square wave signal being equal to 180 degrees;
the full-bridge switch circuit is further used for converting the direct-current supply voltage into a second positive voltage frequency-reduction square wave signal during the period that the first PMOS tube and the fourth PMOS tube are synchronously driven by the second frequency-reduction square wave signal to perform switching action, converting the direct-current supply voltage into a negative voltage frequency-reduction square wave signal during the period that the second PMOS tube and the third PMOS tube are synchronously driven by the third frequency-reduction square wave signal to perform switching action, and complementing the negative voltage frequency-reduction square wave signal and the second positive voltage frequency-reduction square wave signal into the positive and negative voltage frequency-reduction square wave signal.
5. The LLC resonant converter as claimed in claim 4, wherein said preset pulse frequency linear decrement model is specifically represented as:
Figure DEST_PATH_IMAGE002
wherein,
Figure DEST_PATH_IMAGE004
representing either an operating frequency in said first operating frequency range or in said second operating frequency range,
Figure DEST_PATH_IMAGE006
which is representative of the initial frequency of the frequency,
Figure DEST_PATH_IMAGE008
representing a frequency between a start time that the first down-conversion period has and an end time that the second down-conversion period has and the operating frequency
Figure DEST_PATH_IMAGE004A
To a corresponding second
Figure DEST_PATH_IMAGE011
The time of each timing is counted,
Figure DEST_PATH_IMAGE013
represents the LC eigen-resonance frequency corresponding to the resonance capacitor and the resonance inductor in the LLC resonance circuit after being connected in series,
Figure DEST_PATH_IMAGE015
representing a first preset time period required to decrement from the initial frequency to the LC eigenresonance frequency.
6. The LLC resonant converter of any one of claims 2-5, wherein said two-way digital control circuit is further configured to synchronously apply a continuous high signal to said first PMOS transistor and said fourth PMOS transistor through said first pulse output port prior to said first downconversion period such that said first PMOS transistor and said fourth PMOS transistor are driven from an off state to an on state by said continuous high signal, and synchronously apply a continuous low signal to said second PMOS transistor and said third PMOS transistor through said second pulse output port such that said second PMOS transistor and said third PMOS transistor are held in said off state by said continuous low signal, a phase difference between said continuous low signal and said continuous high signal being equal to 180 degrees;
the two-way digital control circuit is further configured to modulate a rectangular wave signal according to a preset pulse width increasing model and the initial frequency in a width modulation period from a time when the second pulse output port synchronously applies a continuous low-level signal to the third PMOS transistor to a start time of the first frequency-reduction period, and apply the rectangular wave signal to the first PMOS transistor and the fourth PMOS transistor through the first pulse output port, where the rectangular wave signal includes the initial frequency and a duty ratio range that increases from the initial duty ratio to 0.5;
the full-bridge switch circuit is further configured to convert the dc supply voltage into a positive voltage rectangular wave signal while the first PMOS transistor and the fourth PMOS transistor are driven by the rectangular wave signal to perform a switching operation.
7. The LLC resonant converter as claimed in claim 6, wherein said preset pulse width incremental model is specifically represented as:
Figure DEST_PATH_IMAGE017
wherein,
Figure DEST_PATH_IMAGE019
representing any one of the operating duty cycles in said duty cycle range,
Figure DEST_PATH_IMAGE021
is representative of the initial duty cycle of the signal,
Figure DEST_PATH_IMAGE023
is represented in the width modulation period and is in duty cycle with the work
Figure DEST_PATH_IMAGE019A
To a corresponding second
Figure DEST_PATH_IMAGE026
The time of each timing is counted,
Figure DEST_PATH_IMAGE028
representing a second preset duration of time required to increment from the initial duty cycle to 0.5.
8. The LLC resonant converter as claimed in claim 6, wherein the ratio between said initial duty cycle and 0.5 is in a range of values between 0.05 and 0.2.
9. The LLC resonant converter as claimed in any one of claims 1 to 5, wherein said LLC resonant circuit is further configured to, during said second downconversion period, convert said positive and negative voltage down-converted square wave signals to a second alternating voltage and apply said second alternating voltage to said AC/DC conversion circuit;
the AC/DC conversion circuit is also used for converting the second alternating current voltage into a second direct current output voltage and feeding the second direct current output voltage back to the digital waveform generating circuit;
the digital waveform generating circuit is further configured to modulate a second positive-negative voltage constant-frequency square wave signal with a constant frequency as the LC intrinsic resonance frequency according to a second preset voltage value when the second dc output voltage reaches the second preset voltage value higher than the first preset voltage value, and continuously apply the second positive-negative voltage constant-frequency square wave signal to the LLC resonance circuit;
and the LLC resonant circuit is used for keeping working at the LC eigenresonant frequency under the driving of the second positive and negative voltage constant-frequency square wave signals.
10. LLC resonant converter according to any of claims 1-5, wherein the ratio between said initial frequency and said LC eigenresonant frequency is in the range of 2 to 4.
CN201911397672.XA 2019-12-30 2019-12-30 LLC resonant converter Pending CN110932563A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104779806A (en) * 2015-04-30 2015-07-15 广州金升阳科技有限公司 Asymmetrical half-bridge fly-back converter and control method thereof
WO2016150245A1 (en) * 2015-03-23 2016-09-29 深圳市皓文电子有限公司 Dc/dc converter
CN107453612A (en) * 2017-08-31 2017-12-08 上海空间电源研究所 A kind of efficient DC/DC suitable for wide input range changes power circuit
CN109687715A (en) * 2018-12-20 2019-04-26 江苏万帮德和新能源科技股份有限公司 A kind of converter and its control method improving LLC gain ranging
CN110212802A (en) * 2019-05-29 2019-09-06 南京航空航天大学无锡研究院 A kind of high pressure, wide range input voltage feed-back type DC Electronic Loads circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016150245A1 (en) * 2015-03-23 2016-09-29 深圳市皓文电子有限公司 Dc/dc converter
CN104779806A (en) * 2015-04-30 2015-07-15 广州金升阳科技有限公司 Asymmetrical half-bridge fly-back converter and control method thereof
CN107453612A (en) * 2017-08-31 2017-12-08 上海空间电源研究所 A kind of efficient DC/DC suitable for wide input range changes power circuit
CN109687715A (en) * 2018-12-20 2019-04-26 江苏万帮德和新能源科技股份有限公司 A kind of converter and its control method improving LLC gain ranging
CN110212802A (en) * 2019-05-29 2019-09-06 南京航空航天大学无锡研究院 A kind of high pressure, wide range input voltage feed-back type DC Electronic Loads circuit

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