CN110928100A

CN110928100A - Array substrate, electrophoresis display panel and display device

Info

Publication number: CN110928100A
Application number: CN201911191019.8A
Authority: CN
Inventors: 崔婷婷; 席克瑞; 秦锋; 刘金娥; 孔祥建
Original assignee: Shanghai Tianma Microelectronics Co Ltd
Current assignee: Shanghai Tianma Microelectronics Co Ltd
Priority date: 2019-11-28
Filing date: 2019-11-28
Publication date: 2020-03-27
Anticipated expiration: 2039-11-28
Also published as: CN110928100B

Abstract

The invention discloses an array substrate, an electrophoretic display panel and a display device, comprising: the display device comprises a flexible substrate, a plurality of data lines, a plurality of first gate lines, a plurality of second gate lines, a plurality of first pixels and a plurality of second pixels, wherein the data lines, the first gate lines, the second gate lines, the first pixels and the second pixels are arranged on the flexible substrate; the flexible substrate comprises a first planar region, a first bending region and a second planar region; the first plane area comprises a first display area, the second plane area comprises a second display area, the first pixels are located in the first display area, and the second pixels are located in the second display area; the first pixel and the second pixel which are positioned in the same column are electrically connected with the same data line; a first gate line electrically connected with the first pixel positioned in the nth row and a second gate line electrically connected with the second pixel positioned in the nth row are electrically connected through a gate connecting line; n is more than or equal to 1 and less than or equal to N, and N, N and M are positive integers. The invention solves the problem of high driving cost in the display device for realizing double-sided display in the prior art.

Description

Array substrate, electrophoresis display panel and display device

Technical Field

The invention relates to the technical field of display, in particular to an array substrate, an electrophoretic display panel and a display device.

Background

In the conventional display device technology, the display panel is mainly divided into two mainstream technologies, namely a liquid crystal display panel and an organic light emitting display panel. The liquid crystal display panel forms an electric field capable of controlling the deflection of liquid crystal molecules by applying voltage to two ends of the liquid crystal molecules, so that the transmission of light rays is controlled to realize the display function of the display panel; the organic light-emitting display panel adopts an organic electroluminescent material, and when current passes through the organic electroluminescent material, the luminescent material can emit light, so that the display function of the display panel is realized.

With the development of society and the increasing demand of human beings for living, the current display technology is rapidly advancing towards the direction of narrow frame, high contrast, high resolution, full-color display, low power consumption, high reliability, long service life and thinness and lightness, and the research of the double-sided display technology is also continuously advanced and deep. In the prior art, in order to realize double-sided display, two driving chips are often required to drive two displays respectively, and the driving cost is high.

Disclosure of Invention

In view of the above, the present invention provides an array substrate, an electrophoretic display panel and a display device, which solve the problem of high driving cost in the display device for implementing dual-sided display in the prior art.

In a first aspect, the present invention provides an array substrate, including: the display device comprises a flexible substrate, a plurality of data lines, a plurality of first gate lines, a plurality of second gate lines, a plurality of first pixels and a plurality of second pixels, wherein the data lines, the first gate lines, the second gate lines, the first pixels and the second pixels are arranged on the flexible substrate; the flexible substrate comprises a first plane area, a first bending area and a second plane area, wherein when the first bending area is in a flattening state, the first plane area, the first bending area and the second plane area are sequentially arranged along a first direction, and the first bending area is positioned between the first plane area and the second plane area; the first plane area comprises a first display area, the second plane area comprises a second display area, the first pixels are located in the first display area, and the second pixels are located in the second display area; the plurality of first pixels form a first pixel array, the first pixel array comprises N rows of first pixel rows which are sequentially arranged along a first direction and M columns of first pixel columns which are sequentially arranged along a second direction, and the first direction and the second direction are intersected; the plurality of second pixels form a second pixel array, the second pixel array comprises N rows of second pixel rows which are sequentially arranged along a third direction and M columns of second pixel columns which are sequentially arranged along a second direction, the first direction is the same as or opposite to the third direction, and the second direction is intersected with the third direction; the first pixel and the second pixel which are positioned in the same column are electrically connected with the same data line; the first gate line electrically connected with the first pixel in the first pixel row in the nth row and the second gate line electrically connected with the second pixel in the second pixel row in the nth row are electrically connected through a gate connecting line; wherein N is more than or equal to 1 and less than or equal to N, and N, N and M are positive integers.

In a second aspect, the present invention provides an electrophoretic display panel, comprising: the electrophoresis device comprises an array substrate, an electrophoresis film and a common electrode layer; the array substrate is the array substrate provided by the invention; the electrophoretic film is positioned on one side of the first pixel and the second pixel far away from the flexible substrate, the electrophoretic film comprises a first electrophoretic film and a second electrophoretic film, the first electrophoretic film is positioned in the first plane area, and the second electrophoretic film is positioned in the second plane area; the common electrode layer is located on one side, far away from the array substrate, of the electrophoretic film and comprises a first common electrode layer and a second common electrode layer, the first common electrode layer is located in the first plane area, and the second common electrode layer is located in the second plane area.

In a third aspect, the present invention provides a display device comprising the electrophoretic display panel provided by the present invention; the display device comprises a third plane area, a second bending area and a fourth plane area, wherein the third plane area corresponds to the first plane, the second bending area corresponds to the first bending area, and the fourth plane area corresponds to the second plane area.

Compared with the prior art, the array substrate, the electrophoretic display panel and the display device provided by the invention at least realize the following beneficial effects:

the array substrate provided by the invention comprises a flexible substrate, wherein the flexible substrate comprises a first plane area, a first bending area and a second plane area, a plurality of data lines, a plurality of first gate lines, a plurality of second gate lines, a plurality of first pixels and a plurality of second pixels are arranged on the flexible substrate, the first pixels are positioned in a first display area, the second pixels are positioned in a second display area, the plurality of first pixels form a first pixel array, the first pixel array comprises N rows of first pixel rows and M columns of first pixel columns, the first pixel rows from the first row to the Nth row are sequentially arranged along a first direction, the first pixel columns from the first column to the Mth column are sequentially arranged along a second direction Y, the plurality of second pixels form a second pixel array, the second pixel array comprises N rows of second pixel rows and M columns of second pixel columns, the second pixel rows from the first row to the Nth row are sequentially arranged along a third direction, second pixel columns are sequentially arranged from the first column to the Mth column along a second direction, the first direction is the same as or opposite to the third direction, the second direction is intersected with the first direction and the third direction, and first pixels and second pixels which are positioned on the same column are electrically connected with the same data line; the first gate line electrically connected with the first pixels positioned in the first pixel row of the nth row and the second gate line electrically connected with the second pixels positioned in the second pixel row of the nth row are electrically connected through a gate connecting line, the first pixels positioned in the first pixel row of the nth row and the second pixels positioned in the second pixel row of the nth row are provided with scanning signals through one gate connecting line, and the first pixels and the second pixels positioned in the same column are provided with data signals through one data line, so that the first pixels and the second pixels positioned in different display areas are driven, and the driving cost of the array substrate is effectively reduced.

Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a schematic plan view of an array substrate according to the present invention;

FIG. 2 is a schematic diagram of a planar structure of a pixel provided by the present invention;

FIG. 3 is a cross-sectional view of the array substrate of FIG. 1 taken along line E-E';

FIG. 4 is a schematic plan view of another array substrate provided by the present invention;

FIG. 5 is a schematic plan view of another array substrate provided by the present invention;

FIG. 6 is a schematic plan view of another array substrate provided by the present invention;

FIG. 7 is a schematic plan view of another array substrate provided by the present invention;

FIG. 8 is a schematic diagram of a planar structure of an electrophoretic display panel according to the present invention;

FIG. 9 is a schematic structural diagram of an electrophoretic display device according to the present invention;

fig. 10 is a schematic structural diagram of another display device provided by the present invention.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

Fig. 1 is a schematic plan view of an array substrate according to the present invention, and referring to fig. 1, the present embodiment provides an array substrate, including: a flexible substrate 10, and a plurality of data lines D, a plurality of first gate lines G1, a plurality of second gate lines G2, a plurality of first pixels 20, and a plurality of second pixels 30 disposed on the flexible substrate 10;

the flexible substrate 10 includes a first planar region a1, a first bending region C1, and a second planar region a2, when the first bending region C1 is in a flattened state, the first planar region a1, the first bending region C1, and the second planar region a2 are sequentially arranged along a first direction X1, and the first bending region C1 is located between the first planar region a1 and the second planar region a 2;

the first planar area a1 includes a first display area AA1, the second planar area a2 includes a second display area AA2, the first pixel 20 is located in the first display area AA1, and the second pixel 30 is located in the second display area AA 2;

the plurality of first pixels 20 form a first pixel array 21, the first pixel array 21 including N rows of first pixel rows 22 sequentially arranged in a first direction X1, and M columns of first pixel columns 23 sequentially arranged in a second direction Y, wherein the first direction X1 intersects the second direction Y;

the plurality of second pixels 30 form a second pixel array 31, the second pixel array 31 includes N rows of second pixel rows 32 sequentially arranged in a third direction X2, and M columns of second pixel columns 33 sequentially arranged in a second direction Y, the first direction X1 being the same as or opposite to the third direction X2, the second direction Y intersecting with the third direction X2; the first pixel 20 and the second pixel 30 located at the same column are electrically connected to the same data line D;

the first gate line G1 electrically connected to the first pixel 20 of the first pixel row 22 of the nth row and the second gate line G2 electrically connected to the second pixel 30 of the second pixel row 32 of the nth row are electrically connected through the gate connection line 40; wherein the content of the first and second substances,

n is more than or equal to 1 and less than or equal to N, and N, N and M are positive integers.

Specifically, with reference to fig. 1, the array substrate provided in this embodiment includes a flexible substrate 10, where the flexible substrate 10 includes a first planar area a1, a first bending area C1, and a second planar area a2, when the first bending area C1 is in a flattened state, the first planar area a1, the first bending area C1, and the second planar area a2 are sequentially arranged along a first direction X1, the first bending area C1 is located between the first planar area a1 and the second planar area a2, and the first bending area C1 has a bending function. Alternatively, the flexible substrate 10 is made of a flexible material that is resistant to bending.

The flexible substrate 10 is provided with a plurality of data lines D, a plurality of first gate lines G1, a plurality of second gate lines G2, a plurality of first pixels 20, and a plurality of second pixels 30, wherein the first pixels 20 are located in a first display area AA1 in the first planar area a1, and the second pixels 30 are located in a second display area AA2 in the second planar area a 2.

The plurality of first pixels 20 form a first pixel array 21, the first pixel array 21 includes N rows of first pixel rows 22 and M columns of first pixel columns 23, the first pixel rows 22 are sequentially arranged from the first row to the nth row along a first direction X1, and the first pixel columns 23 are sequentially arranged from the first column to the mth column along a second direction Y. The plurality of second pixels 30 form a second pixel array 31, the second pixel array 31 includes N rows of second pixel rows 32 and M columns of second pixel columns 33, the second pixel rows 32 are sequentially arranged along a third direction X2 from the first row to the nth row, the second pixel columns 33 are sequentially arranged along a second direction Y from the first column to the mth column, the first direction X1 is the same as or opposite to the third direction X2, and the second direction Y intersects the first direction X1 and the third direction X2.

The first pixel 20 and the second pixel 30 located at the same column are electrically connected to the same data line D; the first gate line G1 electrically connected to the first pixel 20 in the first pixel row 22 of the nth row, the second gate line G2 electrically connected to the second pixel 30 in the second pixel row 32 of the nth row are electrically connected through the gate connection line 40, the first pixel 20 in the first pixel row 22 of the nth row and the second pixel 30 in the second pixel row 32 of the nth row are provided with the scan signal through one gate connection line 40, and the first pixel 20 and the second pixel 30 in the same column are provided with the data signal through one data line D, so that the first pixel 20 and the second pixel 30 in different display regions are driven, and the driving cost of the array substrate is effectively reduced.

It should be noted that fig. 1 exemplarily shows that the first direction X1 is opposite to the third direction X2, that is, the first pixel row 22 closest to the first bending region C1 in the first display area AA1 corresponds to the second pixel row 32 closest to the first bending region C1 in the second display area AA2, and the corresponding first pixel 20 and the second pixel 30 in the two are driven simultaneously. In other embodiments of the present invention, the first direction X1 is the same as the third direction X2, that is, the first pixel row 22 in the first display area AA1 closest to the first bending area C1 corresponds to the second pixel row 32 in the second display area AA2 farthest from the first bending area C1, and the corresponding first pixel 20 and the corresponding second pixel 30 in the two are driven simultaneously, which is not repeated herein.

In addition, it should be noted that each row of pixels is exemplarily shown in fig. 1 to be electrically connected to the same gate line, in other embodiments of the present invention, each row of pixels may be electrically connected to two gate lines, and for example, pixels in odd columns of the pixels in each row may be electrically connected to the same gate line, pixels in even columns of the pixels may be electrically connected to the same gate line, the first gate lines electrically connected with the first pixels in the odd columns in the first pixel row of the nth row and the second gate lines electrically connected with the second pixels in the odd columns in the second pixel row of the nth row are electrically connected through the same gate connecting line, the first grid lines electrically connected with the first pixels positioned in the even columns in the first pixel row of the nth row and the second grid lines electrically connected with the second pixels positioned in the even columns in the second pixel row of the nth row are electrically connected through the same grid connecting line. Of course, in other embodiments of the present invention, the pixel and the gate line may also adopt other connection structures according to actual production requirements, and the description of the present invention is omitted.

Fig. 2 is a schematic plan view of a pixel according to the present invention, and optionally, the first pixel and the second pixel may refer to fig. 2, where the pixel includes a pixel electrode P and a thin film transistor TFT, a gate of the thin film transistor TFT is electrically connected to a gate line G, a source of the thin film transistor TFT is electrically connected to a data line D, and a drain of the thin film transistor TFT is electrically connected to the pixel electrode P, and the gate line G is scanned by a scanning signal to control the thin film transistor TFT to be turned on, and the data line D is scanned by a data signal to charge the pixel electrode P.

Fig. 3 is a cross-sectional view of the array substrate of fig. 1 taken along line E-E', referring to fig. 1 and 3, and optionally, the first planar area a1 further includes a first frame area NA1 surrounding the first display area AA1, and the second planar area a2 further includes a second frame area NA2 surrounding the second display area AA 2;

the gate connection line 40 extends through the first frame area NA1, the first bending area C1 and the second frame area NA 2;

the gate connection line 40 is disposed in the same layer as the first gate line G1 and the second gate line G2.

Specifically, with continued reference to fig. 1 and fig. 3, the gate connection line 40 extends through the first frame area NA1, the first bending area C1 and the second frame area NA2, so as to effectively prevent the flat cable of the gate connection line 40 from affecting the aperture ratio of the first pixel 20 and the second pixel 30, and the gate connection line 40 is disposed in the same layer as the first gate line G1 and the second gate line G2, so as to effectively prevent the disposition of the gate connection line 40 from affecting the thickness of the array substrate.

With continuing reference to fig. 1 and 3, optionally, wherein the gate connection lines 40 include at least one first gate connection line 41 and at least one second gate connection line 42;

the second gate link line 42 is electrically connected to the second gate line G2 through a jumper line 50, the jumper line 50 is disposed at the same level as the data line D, the jumper line 50 is electrically connected to the corresponding second gate link line 42 through a first via 61, and the jumper line 50 is electrically connected to the corresponding second gate line G2 through a second via 62.

Specifically, with continued reference to fig. 1 and 3, the gate connection lines 40 include at least one first gate connection line 41 and at least one second gate connection line 42, and the first gate connection line 41 is directly electrically connected to the corresponding first gate line G1 and the corresponding second gate line G2. The second gate connection line 42 is directly electrically connected to the corresponding first gate line G1, the second gate connection line 42 is not directly electrically connected to the corresponding second gate line G2, the second gate connection line 42 is electrically connected to the corresponding second gate line G2 through the jumper wire 50, the jumper wire 50 is electrically connected to the corresponding second gate connection line 42 through the first via 61, and the jumper wire 50 is electrically connected to the corresponding second gate line G2 through the second via 62, so that the second gate connection line 42 is electrically connected to the corresponding second gate line G2. The jumper 50 and the data line D can be arranged on the same layer, so that the influence of the arrangement of the jumper 50 on the thickness of the array substrate is effectively avoided.

With continued reference to fig. 1 and 3, optionally, the gate connection lines 40 are located on the same side of the array substrate along the second direction Y.

Specifically, the gate connecting lines 40 are located on the same side of the array substrate along the second direction Y, so that the wiring difficulty of the gate connecting lines 40 is effectively reduced, and the production cost is reduced.

Fig. 4 is a schematic plan view of another array substrate provided by the present invention, and referring to fig. 4, alternatively, a portion of the gate connection line 40 and the remaining portion of the gate connection line 40 are respectively located at two sides of the array substrate along the second direction Y.

Specifically, with reference to fig. 4, the gate connection line 40 extends through the first frame area NA1, the first bending area C1 and the second frame area NA2, the gate connection line 40 is divided into two parts, and a part of the gate connection line 40 and the remaining part of the gate connection line 40 are respectively located on two sides of the array substrate along the second direction Y, so as to effectively reduce the influence of the gate connection line 40 on the areas of the parts of the first frame area NA1 and the second frame area NA2 located on two sides of the array substrate, which is beneficial to realizing the narrow frame of the display panel.

With reference to fig. 4, optionally, the gate connection lines 40 electrically connected to the odd-numbered first gate lines G1 and the gate connection lines 40 electrically connected to the even-numbered first gate lines G2 are respectively located at two sides of the array substrate along the second direction Y.

Specifically, the gate connection lines 40 electrically connected to the odd-numbered first gate lines G1 and the gate connection lines 40 electrically connected to the even-numbered first gate lines G2 are respectively located at two sides of the array substrate along the second direction Y, so that the difference between the influences of the gate connection lines 40 on the areas of the portions of the first frame area NA1 and the second frame area NA2 located at the two sides of the array substrate is reduced, and the areas of the portions of the first frame area NA1 and the second frame area NA2 located at the two sides of the array substrate tend to be the same.

It should be noted that, in the present invention, the arrangement of the gate connection lines 40 along the second direction Y on both sides of the array substrate may also be set according to actual production requirements, and the present invention is not described herein again.

Fig. 5 is a schematic plan view of another array substrate provided in the present invention, referring to fig. 5, wherein, alternatively, the gate connection line 40 includes a first subsection 43, a second subsection 44 and a third subsection 45 which are electrically connected;

the first segment 43 is electrically connected to the first gate line G1 corresponding thereto, the third segment 45 is electrically connected to the second gate line G2 corresponding thereto, and the second segment 44 is electrically connected to the first segment 43 and the third segment 45 corresponding thereto;

the first and third sections 43 and 45 are respectively located at both sides of the array substrate along the second direction Y, the second sections 44 are located between the first and second display areas AA1 and AA2, and the second sections 44 extend along the second direction Y.

Specifically, with reference to fig. 5, the gate connection line 40 includes a first subsection 43, a second subsection 44, and a third subsection 45 electrically connected to each other, the first subsection 43 electrically connected to the first gate line G1, and the third subsection 45 electrically connected to the second gate line G2 are respectively located at two sides of the array substrate along the second direction Y, the second subsections 44 are located between the first display area AA1 and the second display area AA2, and the second subsection 44 extends along the second direction Y, so as to effectively reduce the risk of breaking the gate connection line 40 when the first bending area C1 is bent.

Fig. 6 is a schematic plan view of another array substrate provided by the present invention, and referring to fig. 6, optionally, the gate connection line 40 includes a first sub-portion 46 and a second sub-portion 47, one end of the first sub-portion 46 is electrically connected to the corresponding first gate line G1, the other end of the first sub-portion 46 is electrically connected to the corresponding second gate line G2, and the second sub-portion 47 is electrically connected to the corresponding second gate line G2;

the first sub-portion 46 is located on the same side of the array substrate, the second sub-portion 47 is located on the same side of the array substrate, and the first sub-portion 46 and the second sub-portion 47 are respectively located on two sides of the array substrate along the second direction Y.

Specifically, with reference to fig. 6, the gate connection line 40 includes a first sub-portion 46 and a second sub-portion 47, the first sub-portion 46 is electrically connected to the first gate line G1 and the second gate line G2, the second sub-portion 47 is electrically connected to the second gate line G2 corresponding thereto, the first sub-portion 46 and the second sub-portion 47 are respectively located at two sides of the array substrate along the second direction Y, the gate connection line 40 can be directly electrically connected to the second gate line G2, the gate connection line 40 and the second gate line G2 are not electrically connected by a bridge line, and the connection stability of the gate connection line 40 and the second gate line G2 is effectively improved.

Fig. 7 is a schematic plan view illustrating a structure of still another array substrate provided by the present invention, referring to fig. 7, in which, alternatively, the gate connection line 40 extends through the first display area AA1 and the second display area AA 2;

the gate link line 40 and the data line D are disposed at the same layer, the gate link line 40 and the first gate line G1 corresponding thereto are electrically connected through the third via 63, and the gate link line 40 and the second gate line G2 corresponding thereto are electrically connected through the fourth via 64.

Specifically, with reference to fig. 7, the gate connection line 40 and the data line D are disposed in the same layer, the gate connection line 40 is electrically connected to the corresponding first gate line G1 through the third via 63, and the gate connection line 40 is electrically connected to the corresponding second gate line G2 through the fourth via 64, so that the gate connection line 40 extends through the first display area AA1 and the second display area AA2, thereby effectively avoiding the influence of the gate connection line 40 on the areas of the first frame area NA1 and the second frame area NA2, and facilitating the realization of a narrow frame of the display panel.

Fig. 8 is a schematic plan view illustrating an electrophoretic display panel according to the present invention, and referring to fig. 8, the present embodiment provides an electrophoretic display panel, including: an array substrate 70, an electrophoretic film 80, and a common electrode layer 90; wherein, the array substrate 70 is the array substrate as described above;

the electrophoretic film 80 is located on a side of the first pixel 20 and the second pixel 30 away from the flexible substrate 10, the electrophoretic film 80 includes a first electrophoretic film 81 and a second electrophoretic film 82, the first electrophoretic film 81 is located in the first planar region a1, and the second electrophoretic film 82 is located in the second planar region a 2;

the common electrode layer 90 is located on a side of the electrophoretic film 80 away from the array substrate 70, the common electrode layer 90 includes a first common electrode layer 91 and a second common electrode layer 92, the first common electrode layer 91 is located in the first planar area a1, and the second common electrode layer 92 is located in the second planar area a 2.

Specifically, the electrophoretic display panel provided in this embodiment includes an array substrate 70, an electrophoretic film 80, and a common electrode layer 90, which are sequentially disposed, in the electrophoretic film 80, a first electrophoretic film 81 is located in a first planar area a1, a second electrophoretic film 82 is located in a second planar area a2, and in the common electrode layer 90, a first common electrode layer 91 is located in the first planar area a1, and a second common electrode layer 92 is located in the second planar area a 2. Under the action of an electric field formed by the pixel electrode in the first pixel 20 and the common electrode in the first common electrode layer 91, the electrophoretic particles in the first electrophoretic film 81 move toward the first common electrode layer 91 or the first pixel 20, so that a predetermined picture is displayed in the first display area AA 1. Under the action of an electric field formed by the pixel electrode in the second pixel 30 and the common electrode in the second common electrode layer 92, the electrophoretic particles in the second electrophoretic film 82 move toward the second common electrode layer 92 or the second pixel 30, so that a predetermined picture is displayed in the second display area AA 2.

With continued reference to fig. 8, optionally, wherein the flexible substrate 10 further includes a binding region B1, the binding region B1 is located on a side of the second planar region a2 away from the first inflection region C1;

the chip 100 is bonded to the bonding region B2, and the gate link line 40 and the data line D are electrically connected to the chip 100.

Specifically, a bonding region B1 is disposed on a side of the flexible substrate 10 away from the first bending region C1 in the second planar region a2, the chip 100 is bonded to the bonding region B2, the gate connection line 40 and the data line D are electrically connected to the chip 100, and the chip 100 provides the gate connection line 40 with a scan signal and provides the data line D with a data signal.

Fig. 9 is a schematic structural diagram of a display device according to the present invention, and referring to fig. 9, the present embodiment provides a display device including the electrophoretic display panel 200 as described above;

the display device includes a third planar region A3, a second bending region C2, and a fourth planar region a4, the third planar region A3 corresponds to the first planar region a1, the second bending region C2 corresponds to the first bending region C1, and the fourth planar region a4 corresponds to the second planar region a 2.

Specifically, the display device has a third planar area A3, a second bending area C2 and a fourth planar area a4, in the embodiment of the present invention, the third planar area A3 of the display device corresponds to the first planar area a1 of the array substrate, the second bending area C2 of the display device corresponds to the first bending area C1 of the array substrate, and the fourth planar area a4 of the display device corresponds to the second planar area a2 of the array substrate.

The display device provided by the invention comprises the electrophoretic display panel provided by any one of the above embodiments of the invention.

For example, in the display device shown in fig. 9, when displaying, the first gate line in the first display region and the second gate line in the second display region in the array substrate are sequentially arranged in a direction toward the first bending region C1 or in a direction away from the first bending region C1, so that the first pixel line in the first display region closest to the first bending region C1 corresponds to the second pixel line in the second display region closest to the first bending region C1, and the corresponding first pixel and second pixel in the first display region and second display region are simultaneously driven, so that the same picture is displayed in the display device when viewed from the direction toward the third planar region A3 and from the direction toward the fourth planar region a 4. In this case, the array substrate described in fig. 1, 5 to 9 may be used in the display device.

The embodiment of fig. 9 only uses the hang tag advertisement as an example to describe the display device, and it should be understood that the display device provided in the embodiment of the present invention may be other display devices with a display function, such as a mobile phone, a computer, a television, a vehicle-mounted display device, and the present invention is not limited thereto. The display device provided by the embodiment of the present invention has the beneficial effects of the array substrate provided by the embodiment of the present invention, and specific descriptions of the array substrate in the above embodiments may be specifically referred to, and the detailed descriptions of the embodiment are not repeated herein.

Exemplarily, referring to fig. 10, fig. 10 is a schematic structural diagram of another display device provided by the present invention, and when the display device shown in fig. 10 displays, one of the first gate lines in the first display region and the second gate lines in the second display region in the array substrate are sequentially arranged in a direction toward the first bending region C1, and the other are sequentially arranged in a direction away from the first bending region C1, so that a first pixel row in the first display region closest to the first bending region C1 corresponds to a second pixel row in the second display region farthest from the first bending region C1, and the corresponding first pixel and the corresponding second pixel in the first display region are simultaneously driven.

With continued reference to fig. 9, optionally, the display device further includes a support post 300, the support post 300 includes a support post body 320 and a support post end 310, and a surface of the support post end 310 is in a circular arc structure;

when the first bending region C1 is in the bent state, the surface of the flexible substrate 10 on the side away from the electrophoretic film 80 is attached to the surface of the support post 300, the portion of the flexible substrate 10 located in the first bending region C1 is attached to the surface of the support post end 310, and the support post 300 is disposed between the portion of the flexible substrate 10 located in the first planar region a1 and the portion thereof located in the second planar region a 2.

Specifically, the display device provided in this embodiment further includes a supporting pillar 300, when the first bending region C1 is in the bending state, the supporting pillar 300 is disposed between the portion of the flexible substrate 10 located in the first planar region a1 and the portion thereof located in the second planar region a2, the supporting pillar 300 includes a supporting pillar body 320 and a supporting pillar end 310, a surface of the supporting pillar end 310 is in an arc structure, and the supporting pillar 300 plays a role in supporting and protecting the bending of the flexible substrate 10.

According to the embodiments, the array substrate, the electrophoretic display panel and the display device provided by the invention at least achieve the following beneficial effects:

the array substrate provided by the invention comprises a flexible substrate, wherein the flexible substrate comprises a first plane area, a first bending area and a second plane area, a plurality of data lines, a plurality of first gate lines, a plurality of second gate lines, a plurality of first pixels and a plurality of second pixels are arranged on the flexible substrate, the first pixels are positioned in a first display area, the second pixels are positioned in a second display area, the plurality of first pixels form a first pixel array, the first pixel array comprises N rows of first pixel rows and M columns of first pixel columns, the first pixel rows from the first row to the Nth row are sequentially arranged along a first direction, the first pixel columns from the first column to the Mth column are sequentially arranged along a second direction Y, the plurality of second pixels form a second pixel array, the second pixel array comprises N rows of second pixel rows and M columns of second pixel columns, the second pixel rows from the first row to the Nth row are sequentially arranged along a third direction, second pixel columns are sequentially arranged from the first column to the Mth column along a second direction, the first direction is the same as or opposite to the third direction, the second direction is intersected with the first direction and the third direction, and first pixels and second pixels which are positioned on the same column are electrically connected with the same data line; the first gate line electrically connected with the first pixels positioned in the first pixel row of the nth row and the second gate line electrically connected with the second pixels positioned in the second pixel row of the nth row are electrically connected through the gate connecting line, the first pixels positioned in the first pixel row of the nth row and the second pixels positioned in the second pixel row of the nth row are provided with scanning signals through one gate connecting line, and the first pixels and the second pixels positioned in the same column are provided with data signals through one data line, so that the first pixels and the second pixels positioned in different display areas are driven, the driving cost of the array substrate is effectively reduced, and the driving cost of the array substrate is effectively reduced.

Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. An array substrate, comprising: the display device comprises a flexible substrate, a plurality of data lines, a plurality of first gate lines, a plurality of second gate lines, a plurality of first pixels and a plurality of second pixels, wherein the data lines, the first gate lines, the second gate lines, the first pixels and the second pixels are arranged on the flexible substrate;

the flexible substrate comprises a first plane area, a first bending area and a second plane area, when the first bending area is in a flattening state, the first plane area, the first bending area and the second plane area are sequentially arranged along a first direction, and the first bending area is located between the first plane area and the second plane area;

the first planar area comprises a first display area, the second planar area comprises a second display area, the first pixel is located in the first display area, and the second pixel is located in the second display area;

the plurality of first pixels form a first pixel array, the first pixel array comprises N rows of first pixel rows sequentially arranged along the first direction and M columns of first pixel columns sequentially arranged along a second direction, and the first direction and the second direction are intersected;

the plurality of second pixels form a second pixel array, the second pixel array comprises N rows of second pixel rows which are sequentially arranged along a third direction and M columns of second pixel columns which are sequentially arranged along the second direction, the first direction is the same as or opposite to the third direction, and the second direction is intersected with the third direction; the first pixel and the second pixel which are positioned in the same column are electrically connected with the same data line;

the first gate line electrically connected with the first pixel in the first pixel row in the nth row and the second gate line electrically connected with the second pixel in the second pixel row in the nth row are electrically connected through a gate connecting line; wherein the content of the first and second substances,

2. The array substrate of claim 1,

the first planar region further comprises a first bezel region surrounding the first display region, the second planar region further comprises a second bezel region surrounding the second display region;

the gate connecting line extends through the first frame region, the first bending region and the second frame region;

the grid connecting line is arranged on the same layer as the first grid line and the second grid line.

3. The array substrate of claim 2,

the grid connecting lines comprise at least one first grid connecting line and at least one second grid connecting line;

the second gate connecting line is electrically connected with the second gate line through a jumper wire, the jumper wire and the data line are arranged on the same layer, the jumper wire is electrically connected with the second gate connecting line corresponding to the jumper wire through a first through hole, and the jumper wire is electrically connected with the second gate line corresponding to the jumper wire through a second through hole.

4. The array substrate of claim 3,

the grid connecting line is located on the same side of the array substrate along the second direction.

5. The array substrate of claim 3,

and part of the grid connecting lines and the rest of the grid connecting lines are respectively positioned at two sides of the array substrate along the second direction.

6. The array substrate of claim 5,

the gate connecting lines electrically connected with the first gate lines in odd-numbered rows and the gate connecting lines electrically connected with the first gate lines in even-numbered rows are respectively located on two sides of the array substrate along the second direction.

7. The array substrate of claim 3,

the grid connecting line comprises a first subsection, a second subsection and a third subsection which are electrically connected;

the first section is electrically connected to the first gate line corresponding thereto, the third section is electrically connected to the second gate line corresponding thereto, and the second section is electrically connected to the first section and the third section corresponding thereto;

the first subsection and the third subsection are respectively located on two sides of the array substrate along the second direction, the second subsection is located between the first display area and the second display area, and the second subsection extends along the second direction.

8. The array substrate of claim 2,

the gate connection line includes a first sub-portion and a second sub-portion, one end of the first sub-portion is electrically connected to the first gate line corresponding thereto, the other end of the first sub-portion is electrically connected to the second gate line corresponding thereto, and the second sub-portion is electrically connected to the second gate line corresponding thereto;

the first sub-portion is located on the same side of the array substrate, the second sub-portion is located on the same side of the array substrate, and the first sub-portion and the second sub-portion are located on two sides of the array substrate along the second direction respectively.

9. The array substrate of claim 1,

the gate connection line extends through the first display region and the second display region;

the gate connecting line and the data line are arranged on the same layer, the gate connecting line is electrically connected with the first gate line corresponding to the gate connecting line through a third through hole, and the gate connecting line is electrically connected with the second gate line corresponding to the gate connecting line through a fourth through hole.

10. An electrophoretic display panel, comprising: the electrophoresis device comprises an array substrate, an electrophoresis film and a common electrode layer; wherein the array substrate is the array substrate of any one of claims 1 to 9;

the electrophoretic film is positioned on one side of the first pixel and the second pixel far away from the flexible substrate, the electrophoretic film comprises a first electrophoretic film and a second electrophoretic film, the first electrophoretic film is positioned in the first plane area, and the second electrophoretic film is positioned in the second plane area;

the common electrode layer is located on one side, far away from the array substrate, of the electrophoresis film, the common electrode layer comprises a first common electrode layer and a second common electrode layer, the first common electrode layer is located in the first plane area, and the second common electrode layer is located in the second plane area.

11. Electrophoretic display panel according to claim 10,

the flexible substrate further comprises a binding region, and the binding region is positioned on one side, away from the first bending region, of the second planar region;

the binding region is bound with a chip, and the grid connecting line and the data line are electrically connected with the chip.

12. A display device characterized by comprising the electrophoretic display panel according to claim 10 or 11;

the display device comprises a third plane area, a second bending area and a fourth plane area, wherein the third plane area corresponds to the first plane, the second bending area corresponds to the first bending area, and the fourth plane area corresponds to the second plane area.

13. The display device according to claim 12, further comprising a support column, wherein the support column comprises a support column body and a support column end, and the surface of the support column end is in a circular arc structure;

when the first bending area is in a bending state, the surface of one side of the flexible substrate, which is far away from the electrophoretic film, is attached to the surface of the supporting column, the part of the flexible substrate, which is located at the first bending area, is attached to the surface of the end part of the supporting column, and the supporting column is arranged between the part of the flexible substrate, which is located at the first plane area, and the part of the flexible substrate, which is located at the second plane area.