CN110920666B - Control circuit of TW-2 hump system reducer and reducer control box - Google Patents

Control circuit of TW-2 hump system reducer and reducer control box Download PDF

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CN110920666B
CN110920666B CN201911000761.6A CN201911000761A CN110920666B CN 110920666 B CN110920666 B CN 110920666B CN 201911000761 A CN201911000761 A CN 201911000761A CN 110920666 B CN110920666 B CN 110920666B
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module
diode
foreground
resistor
brake
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CN110920666A (en
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刘伟
胡卫东
张开治
赵强
薛晓兵
许鸿飞
李兹生
汪明好
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China Railway Communication Signal Co., Ltd
CRSC Research and Design Institute Group Co Ltd
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CRSC Research and Design Institute Group Co Ltd
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B61RAILWAYS
    • B61KAUXILIARY EQUIPMENT SPECIALLY ADAPTED FOR RAILWAYS, NOT OTHERWISE PROVIDED FOR
    • B61K7/00Railway stops fixed to permanent way; Track brakes or retarding apparatus fixed to permanent way; Sand tracks or the like
    • B61K7/02Track brakes or retarding apparatus
    • B61K7/12Track brakes or retarding apparatus electrically controlled

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Electronic Switches (AREA)
  • Braking Arrangements (AREA)

Abstract

The invention belongs to the technical field of rail transit, and particularly relates to a control circuit of a TW-2 hump system speed reducer and a speed reducer control box. The control circuit includes: the first control circuit is connected with the front and back stage speed reducers and is used for controlling the front and back stage speed reducers to execute braking or relieving actions; the second control circuit is respectively connected with the front and the back stage speed reducers and the first control circuit and is used as a control loop of the front and the back stage speed reducers to realize double control of the speed reducers. The speed reducer control box is installed on an indoor relay combination, centralized controls four operations of front stage braking, back stage braking, front stage releasing, back stage releasing and the like of the speed reducer, and simultaneously leads negative electricity of the speed reducer to a control loop line to realize double break of a power supply in the control process.

Description

Control circuit of TW-2 hump system reducer and reducer control box
Technical Field
The invention belongs to the technical field of rail transit, and particularly relates to a control circuit of a TW-2 hump system speed reducer and a speed reducer control box.
Background
The TW-2 type hump automatic control system (TW-2 system for short) is a device for realizing hump sliding approach and vehicle speed regulation automatic control in an automatic hump yard. The hump vehicle retarder is used as a main control device for TW-2 system speed regulation automatic control. Through the braking and relieving control functions of the vehicle speed reducer, the hooked vehicle can reach the target calculated outlet speed when leaving the speed reducer. When the hump humps hook the car, the reasonable distance between the hook cars in the hump humps is kept, namely the hook cars are safely hung with the staying car in the shunting line at the speed of 5km/h or less or synchronously run to a specified position with the staying car.
The conventional interface for the vehicle retarder of the TW-2 system is a relay interface. The TW-2 system control command controls the action of a vehicle retarder solenoid valve through a relay so as to realize the brake relieving action of the retarder. The existing vehicle speed reducer is provided with four operations of foreground braking, background braking, foreground relieving and background relieving, and each operation is respectively provided with a relay. And the power output for driving each operation is realized through an engineered relay circuit. When the on-site implementation is carried out, the occupied space of the relay is large, engineering wiring is needed between relay combinations, the construction workload is large, the on-site maintenance is inconvenient, and meanwhile, the driving output of a microcomputer is single-side output, so that the double-break of a power supply under the fault condition cannot be realized.
Disclosure of Invention
In view of the above problem, the present invention provides a control circuit of a TW-2 hump system retarder, the control circuit including: a first control circuit and a second control circuit, wherein,
the first control circuit is connected with the front and the back stage speed reducers and is used for controlling the front and the back stage speed reducers to execute braking or release actions;
the second control circuit is respectively connected with the front and the back stage speed reducers and the first control circuit and is used as a control loop of the front and the back stage speed reducers to realize double control of the speed reducers.
Further, the first control circuit comprises a foreground brake module, a foreground release module, a background brake module and a background release module;
the second control circuit comprises a foreground brake release module and a background brake release module;
the front stage brake module is matched with the front stage brake release module and used for controlling the front stage speed reducer to execute brake action;
the foreground relieving module is matched with the foreground brake relieving module and is used for controlling the foreground speed reducer to execute relieving actions;
the background brake module is matched with the background brake release module and used for controlling the background speed reducer to execute a brake action;
the background relieving module is matched with the background braking relieving module and used for controlling the background speed reducer to execute relieving actions.
Further, foreground brake module, foreground alleviate module, backstage brake module, backstage alleviate module, foreground brake alleviate module and backstage brake alleviate the module and all include:
the first input positive terminal, the second input positive terminal, the first solid-state relay, the first diode, the second diode, the fourth diode, the first resistor, the second resistor, the third resistor, the first piezoresistor, the first output terminal and the second output terminal;
a first end of the first diode is connected with a first input positive terminal, and a first end of the second diode is connected with a second input positive terminal; the second end of the first diode and the second end of the second diode are respectively connected with the first end of the first resistor;
the second end of the first resistor is connected with the input positive end of the first solid-state relay; the second end of the first resistor is also connected with the first end of the second resistor, and the second end of the second resistor is connected with the first end of the fourth diode; a second end of the fourth diode is connected with an input negative end of the first solid-state relay;
the second end of the fourth diode is also connected with the first end of the third resistor, and the second end of the third resistor is connected with the input positive end of the first solid-state relay;
the output positive end of the first solid-state relay is connected with a first output terminal; the output negative end of the first solid-state relay is connected with a first end of a fourth resistor, and a second end of the fourth resistor is connected with a second output terminal;
the output positive end of the first solid-state relay is connected with the first end of the first piezoresistor, and the second end of the first piezoresistor is connected with the output negative end of the first solid-state relay.
Further, the foreground brake module comprises a first knife switch;
the first end of the first knife switch is connected with the first end of a first resistor in the foreground brake module;
the second end of the first knife switch is connected with the first end of a third diode in the front stage brake module;
and the second end of a third diode in the foreground brake module is connected with the first end of a first resistor in the foreground brake release module.
Further, the foreground mitigation module comprises a second knife switch;
the first end of the second knife switch is connected with the first end of the first resistor in the foreground relieving module;
the second end of the second knife switch is connected with the first end of a third diode in the foreground relieving module;
and the second end of a third diode in the foreground relieving module is connected with the first end of a first resistor in the foreground brake relieving module.
Further, the background brake module comprises a third knife switch;
the first end of the third knife switch is connected with the first end of a first resistor in the background braking module;
the second end of the third knife switch is connected with the first end of a third diode in the background braking module;
and the second end of the third diode in the background brake module is connected with the first end of the first resistor in the background brake release module.
Further, the background mitigation module comprises a fourth knife switch;
the first end of the fourth knife switch is connected with the first end of a first resistor in the background mitigation module;
the second end of the fourth knife switch is connected with the first end of a third diode in the background mitigation module;
and the second end of the third diode in the background relieving module is connected with the first end of the first resistor in the background braking relieving module.
Further, the control circuit includes a third input negative terminal;
the input negative terminal of the first solid-state relay in the foreground brake module, the input negative terminal of the first solid-state relay in the foreground release module, the input negative terminal of the first solid-state relay in the background brake module, the input negative terminal of the first solid-state relay in the background release module, the input negative terminal of the first solid-state relay in the foreground brake release module and the input negative terminal of the first solid-state relay in the background brake release module are respectively connected with the third input negative terminal.
Furthermore, second output terminals in the foreground brake module, the foreground release module, the background brake module and the background release module are the same terminal;
and the second output terminals in the foreground brake release module and the background brake release module are the same terminal.
The invention also provides a vehicle speed reducer control box, which comprises a box body and the control circuit, wherein the control circuit is arranged in the box body;
and the input terminal and the output terminal of the control circuit are respectively connected with the wiring terminals on the box body.
The speed reducer control box is installed on an indoor relay combination, centralized controls four operations of front stage braking, back stage braking, front stage releasing, back stage releasing and the like of the speed reducer, and simultaneously leads negative electricity of the speed reducer to a control loop line to realize double break of a power supply in the control process. And the control circuit in the speed reducer control box has simple structure, less relay combination wiring, small floor area and convenient field maintenance.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 shows a schematic diagram of a control circuit according to an embodiment of the invention;
fig. 2 shows a schematic structural view of a speed reducer control box according to an embodiment of the present invention.
In the figure: 1 box body, 2 mounting bolts, 3 binding post.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a control circuit of a TW-2 hump system speed reducer, exemplarily shown in FIG. 1, the control circuit comprises a first control circuit and a second control circuit, wherein the first control circuit is connected with a front-stage speed reducer and a back-stage speed reducer and is used for respectively controlling the front-stage speed reducer and the back-stage speed reducer to execute one or more actions of foreground braking, foreground relieving, back-stage braking and back-stage relieving. The second control circuit is respectively connected with the front and the back stage speed reducers and the first control circuit and is used as a control loop of the front and the back stage speed reducers to realize double control of the speed reducers. The first control circuit and the second control circuit each include a plurality of relay circuits. The plurality of relay circuits comprise a foreground brake module, a foreground release module, a background brake module, a background release module, a foreground brake release module and a background brake release module.
Specifically, the foreground brake module is used for controlling the connection and disconnection of the positive input end of a foreground speed reducer brake electromagnetic valve 1Z; the foreground relieving module is used for controlling the connection and disconnection of the input positive end of the foreground speed reducer relieving electromagnetic valve 1H; the foreground brake release module is used for respectively controlling the connection of the input negative end of a foreground speed reducer brake electromagnetic valve 1Z and the input negative end of a foreground speed reducer release electromagnetic valve 1H. The foreground brake release module plays a role of a control return line of the foreground speed reducer brake solenoid valve 1Z and the foreground speed reducer release solenoid valve 1H.
Specifically, the background braking module is used for controlling the connection and disconnection of the 2Z input positive electrode end of the background speed reducer braking electromagnetic valve; the background relieving module is used for controlling the connection and disconnection of the input positive terminal of the 2H relieving electromagnetic valve of the background speed reducer; the background brake release module is used for respectively controlling the connection of the input negative electrode end of the background reducer brake electromagnetic valve 2Z and the input negative electrode end of the background reducer release electromagnetic valve 2H. The background brake release module plays a role of a brake solenoid valve 2Z of the background speed reducer and a control loop of a release solenoid valve 2H of the background speed reducer.
Specifically, the dual control of the speed reducer means: when the positive end and the negative end of the electromagnetic valve of the speed reducer are simultaneously connected, the electromagnetic valve of the speed reducer can operate; the positive pole end and/or the negative pole end of the electromagnetic valve of the speed reducer are not communicated, and the electromagnetic valve of the speed reducer cannot operate.
The control return line means: and the foreground brake relieving module or the background brake relieving module is connected with the cathode of the electromagnetic valve of the speed reducer and used for connecting the cathode of the electromagnetic valve of the accelerator with the power supply of the outdoor equipment.
The foreground brake module comprises a first solid-state relay A-SSR, a first diode A-D1, a second diode A-D2, a third diode A-D3, a fourth diode A-D4, a first knife switch K-1, a first resistor A-R1, a second resistor A-R2, a third resistor A-R3 and a first piezoresistor A-Y.
Further, the first diode A-D1 and the second diode A-D2 are connected in parallel;
the first terminal of the first diode A-D1 is connected to the first input terminal 51Z1A, and the first terminal of the second diode A-D2 is connected to the second input terminal 53Z 1B. Specifically, the first input terminal 51Z1A and the second input terminal 53Z1B are respectively connected with the positive end of the brake input power supply of the front desk of the microcomputer, and the first diode A-D1 and the second diode A-D2 are connected in parallel. The first input terminal 51Z1A and the second input terminal 53Z1B may both receive input voltage for the front braking module.
Further, a second terminal of the first diode A-D1 and a second terminal of the second diode A-D2 are both connected to a first terminal of the first resistor A-R1. Specifically, the first resistor a-R1 has a voltage dividing function, so that the potential of the IN + end of the first solid-state relay a-SSR is reduced, and the first solid-state relay a-SSR is prevented from being damaged due to too high potential difference.
Further, the second ends of the first resistors a-R1 are respectively connected with one ends of the two lines; the other end of one circuit is connected IN series with the IN + end of the first solid-state relay A-SSR, and the circuit is used for controlling the first solid-state relay to work; the other end of the other line is connected with a first end of the second resistor A-R2, and a second end of the second resistor A-R2 is connected with a first end of the fourth diode A-D4. Specifically, the second resistor A-R2 also has a voltage dividing function, so that the voltage across the fourth diode A-D4 is reduced, and the fourth diode A-D4 is prevented from being damaged due to overhigh voltage.
Further, a second terminal of the fourth diode A-D4 is connected with the IN-terminal of the first solid state relay A-SSR;
a second terminal of the fourth diode a-D4 is connected to a first terminal of the third resistor a-R3, and a second terminal of the third resistor a-R3 is connected to the IN + terminal of the first solid state relay a-SSR. Specifically, the third resistor A-R3 functions as a shunt to reduce the current through the fourth diode A-D4. Specifically, the fourth diodes a-D4 are light emitting diodes for displaying the output status of the microcomputer power supply.
Further, the OUT2 terminal of the first solid-state relay a-SSR is connected to the first output terminal 61Z1, the OUT1 terminal of the first solid-state relay a-SSR is connected in series with the first terminal of the nineteenth resistor R01, and the second terminal of the nineteenth resistor R01 is connected to the second output terminal 4JZ 220; the nineteenth resistor R01 functions as a current limiter and prevents short-circuiting of devices disposed therebehind.
The OUT2 end of the first solid state relay A-SSR is connected with the first end of the first piezoresistor A-Y, and the second end of the first piezoresistor A-Y is connected with the OUT1 end of the first solid state relay A-SSR. Specifically, the first piezoresistors A-Y play a lightning protection role, so as to further protect lightning passing through an external lightning protection device, and prevent the first solid-state relay A-SSR from being damaged due to overhigh voltage caused by lightning stroke.
Further, the first output terminal 61Z1 is connected to the positive electrode of the input terminal of the front stage retarder brake solenoid valve 1Z, and the second output terminal 4JZ220 is connected to the power supply output terminal of the outdoor unit. The foreground speed reducer braking electromagnetic valve 1Z is connected with an outdoor equipment power supply in series, and the outdoor equipment power supply provides working voltage for the foreground speed reducer braking electromagnetic valve 1Z.
The foreground mitigation module comprises a second solid-state relay B-SSR, a fifth diode B-D1, a sixth diode B-D2, a seventh diode B-D3, an eighth diode B-D4, a second knife switch K-2, a fourth resistor B-R1, a fifth resistor B-R2, a sixth resistor B-R3 and a second piezoresistor B-Y.
Further, the fifth diode B-D1 and the sixth diode B-D2 are connected in parallel;
the first end of the fifth diode B-D1 is connected to the third input terminal 52H1A, and the first end of the sixth diode B-D2 is connected to the fourth input terminal 32H 1B. Specifically, the third input terminal 52H1A and the fourth input terminal 32H1B are connected to the positive electrode of the microcomputer front desk mitigation input power source, and the fifth diode B-D1 and the sixth diode B-D2 are connected in parallel. The third input terminal 52H1A and the fourth input terminal 32H1B can both receive input operating voltage for the foreground mitigation module.
Further, a second end of the fifth diode B-D1 and a second end of the sixth diode B-D2 are both connected with a first end of the fourth resistor B-R1. Specifically, the fourth resistor B-R1 plays a role IN voltage division, reduces the potential of the IN + end of the second solid-state relay B-SSR, and prevents the potential difference from being too high to damage the second solid-state relay B-SSR.
Further, the second end of the fourth resistor B-R1 is respectively connected with one end of the two lines; the other end of one circuit is connected IN series with the IN + end of the second solid-state relay B-SSR, and the circuit is used for controlling the second solid-state relay to work; the other end of the other line is connected with a first end of the fifth resistor B-R2, and a second end of the fifth resistor B-R2 is connected with a first end of the eighth diode B-D4. Specifically, the fifth resistor B-R2 also functions as a voltage divider to reduce the voltage across the eighth diode B-D4, thereby preventing the voltage from being too high and damaging the eighth diode B-D4.
Further, a second terminal of the eighth diode B-D4 is IN series with the IN-terminal of the second solid state relay B-SSR;
a second terminal of the eighth diode B-D4 is connected to a first terminal of the sixth resistor B-R3, and a second terminal of the sixth resistor B-R3 is connected to the IN + terminal of the second solid-state relay B-SSR. Specifically, the sixth resistor B-R3 functions as a shunt to reduce the current through the eighth diode B-D4. Specifically, the eighth diode B-D4 is a light emitting diode for displaying the output status of the microcomputer power supply.
Further, the OUT2 terminal of the second solid-state relay B-SSR is connected to the third output terminal 62H1, the OUT1 terminal of the second solid-state relay B-SSR is connected to the first terminal of the nineteenth resistor R01, and the second terminal of the nineteenth resistor R01 is connected to the second output terminal 4JZ 220;
the OUT2 end of the second solid-state relay B-SSR is connected with the first end of the second piezoresistor B-Y, and the second end of the second piezoresistor B-Y is connected with the OUT1 end of the second solid-state relay B-SSR. Specifically, the second piezoresistor B-Y plays a lightning protection role, so that lightning passing through an external lightning protection device is further protected, and the second solid-state relay B-SSR is prevented from being damaged due to overhigh voltage caused by lightning stroke.
Further, the third output terminal 62H1 is connected to the positive electrode of the input end of the front stage retarder-mitigating solenoid valve 1H.
The background brake module comprises a third solid-state relay C-SSR, a ninth diode C-D1, a twelfth diode C-D2, an eleventh diode C-D3, a twelfth diode C-D4, a third knife switch K-3, a seventh resistor C-R1, an eighth resistor C-R2, a ninth resistor C-R3 and a third piezoresistor C-Y.
Further, the ninth diode C-D1 and the twelfth diode C-D2 are connected in parallel;
the first terminal of the ninth diode C-D1 is connected to the fifth input terminal 71Z2A, and the first terminal of the twelfth diode C-D2 is connected to the sixth input terminal 31Z 2B. Specifically, the fifth input terminal 71Z2A and the sixth input terminal 31Z2B are respectively connected with the anode of the microcomputer background brake input power supply, and the ninth diode C-D1 and the twelfth diode C-D2 are connected in parallel. The fifth input terminal 71Z2A and the sixth input terminal 31Z2B can both be connected to the operating voltage for the back-end braking module.
Further, the second input end of the ninth diode C-D1 and the second end of the twelfth diode C-D2 are both connected with the first end of the seventh resistor C-R1. Specifically, the seventh resistor C-R1 plays a role IN voltage division, reduces the potential of the IN + end of the third solid-state relay C-SSR, and prevents the third solid-state relay C-SSR from being damaged due to an excessively high potential difference.
Further, a second end of the seventh resistor C-R1 is connected to one end of each of the two lines; the other end of one circuit is connected IN series with the IN + end of the third solid-state relay C-SSR, and the circuit is used for controlling the third solid-state relay to work; the other end of the other line is connected with one end of the eighth resistor C-R2, and the other end of the eighth resistor C-R2 is connected with the first end of the twelfth diode C-D4. Specifically, the eighth resistor C-R2 also functions as a voltage divider to reduce the voltage across the twelfth diode C-D4, thereby preventing the voltage from being too high and damaging the twelfth diode C-D4.
Further, a second terminal of the twelfth diode C-D4 is connected with the IN-terminal of the third solid state relay C-SSR;
a second end of the twelfth diode C-D4 is connected to one end of the ninth resistor C-R3, and the other end of the ninth resistor C-R3 is connected to the IN + end of the third solid-state relay C-SSR. Specifically, the ninth resistor C-R3 functions as a shunt to reduce the current through the twelfth diode C-D4. Specifically, the twelfth diode C-D4 is a light emitting diode for displaying the output status of the microcomputer power supply.
Further, the OUT2 terminal of the third solid-state relay C-SSR is connected to the fourth output terminal 81Z2, the OUT1 terminal of the third solid-state relay C-SSR is connected to one terminal of a twentieth resistor R02, and the other terminal of the twentieth resistor R02 is connected to the second output terminal 4JZ 220;
the OUT2 end of the third solid-state relay C-SSR is connected with one end of the third piezoresistor C-Y, and the other end of the third piezoresistor C-Y is connected with the OUT1 end of the third solid-state relay C-SSR. Specifically, the third piezoresistor C-Y plays a lightning protection role, so that lightning passing through an external lightning protection device is further protected, and the third solid-state relay C-SSR is prevented from being damaged due to overhigh voltage caused by lightning stroke.
Further, the fourth output terminal 81Z2 is connected to the positive electrode of the input terminal of the backstage decelerator braking solenoid valve 2Z.
The background mitigation module comprises a fourth solid-state relay D-SSR, a thirteenth diode D-D1, a fourteenth diode D-D2, a fifteenth diode D-D3, a sixteenth diode D-D4, a fourth knife switch, a tenth resistor D-R1, an eleventh resistor D-R2, a twelfth resistor D-R3 and a fourth piezoresistor D-Y.
Further, the thirteenth diode D-D1 and the fourteenth diode D-D2 are connected in parallel;
a first end of the thirteenth diode D-D1 is connected to the seventh input terminal 72H2A, and a first end of the fourteenth diode D-D2 is connected to the eighth input terminal 73H 2B. Specifically, the seventh input terminal 72H2A and the eighth input terminal 73H2B are respectively connected with the positive electrode of the microcomputer background mitigation input power supply, and the thirteenth diode D-D1 and the fourteenth diode D-D2 are connected in parallel. The seventh input terminal 72H2A and the eighth input terminal 73H2B may both be switched in to the operating voltage for the background mitigation module.
Further, a second terminal of the thirteenth diode D-D1 and a second terminal of the fourteenth diode D-D2 are respectively connected to the first terminal of the tenth resistor D-R1. Specifically, the tenth resistor D-R1 plays a role of voltage division, reduces the potential of the IN + terminal of the fourth solid-state relay D-SSR, and prevents the potential difference from being too high to damage the first solid-state relay D-SSR.
Further, a second end of the tenth resistor D-R1 is connected to one end of each of the two lines; the other end of one circuit is connected with the IN + end of the fourth solid-state relay D-SSR, and the circuit is used for controlling the fourth solid-state relay to work; the other end of the other line is connected with one end of the eleventh resistor D-R2, and the other end of the eleventh resistor D-R2 is connected with the first end of the sixteenth diode D-D4. Specifically, the eleventh resistor D-R2 also functions as a voltage divider to reduce the voltage across the sixteenth diode D-D4, so as to prevent the sixteenth diode D-D4 from being damaged due to too high voltage.
Further, a second terminal of the sixteenth diode D-D4 is connected to the IN-terminal of the fourth solid-state relay D-SSR;
a second end of the sixteenth diode D-D4 is connected to one end of the twelfth resistor D-R3, and the other end of the twelfth resistor D-R3 is connected to the IN + end of the first solid-state relay a-SSR. Specifically, the twelfth resistor D-R3 functions as a shunt to reduce the current through the sixteenth diode D-D4. Specifically, the sixteenth diode D-D4 is a light emitting diode for displaying the output status of the microcomputer power supply.
Further, the OUT2 terminal of the fourth solid-state relay D-SSR is connected to the fifth output terminal 82H2, the OUT1 terminal of the fourth solid-state relay D-SSR is connected to one terminal of a twentieth resistor R02, and the other terminal of the twentieth resistor R02 is connected to the second output terminal 4JZ 220;
the OUT2 end of the fourth solid-state relay D-SSR is connected with one end of the fourth piezoresistor D-Y, and the other end of the fourth piezoresistor D-Y is connected with the OUT1 end of the fourth solid-state relay D-SSR. Specifically, the fourth piezoresistor D-Y plays a lightning protection role, so that lightning passing through an external lightning protection device is further protected, and the fourth solid-state relay D-SSR is prevented from being damaged due to overhigh voltage caused by lightning stroke.
Further, the fifth output terminal 82H2 is connected to the positive electrode of the input end of the background retarder mitigation solenoid valve 2H.
The foreground brake mitigation module comprises a fifth solid-state relay E-SSR, a seventeenth diode E-D1, an eighteenth diode E-D2, a nineteenth diode E-D3, a thirteenth resistor E-R1, a fourteenth resistor E-R2, a fifteenth resistor E-R3 and a fifth piezoresistor E-Y.
Further, the seventeenth diode E-D1 and the eighteenth diode E-D2 are connected in parallel;
a first end of the seventeenth diode E-D1 is connected to the ninth input terminal 11Z1H1A, and a first end of the eighteenth diode E-D2 is connected to the tenth input terminal 33Z1H 1B. Specifically, the ninth input terminal 11Z1H1A and the tenth input terminal 33Z1H1B are respectively connected with the positive electrode of the reserved microcomputer foreground brake mitigation double-control input power supply, and the seventeenth diode E-D1 and the eighteenth diode E-D2 are connected in parallel. The ninth input terminal 11Z1H1A and the tenth input terminal 33Z1H1B can both be connected to the operating voltage for the foreground brake mitigation module.
Further, a second end of the seventeenth diode E-D1 and a second end of the eighteenth diode E-D2 are respectively connected to the first end of the thirteenth resistor E-R1. Specifically, the thirteenth resistor E-R1 plays a role of voltage division, reduces the potential of the IN + end of the fifth solid-state relay E-SSR, and prevents the potential difference from being too high to damage the fifth solid-state relay E-SSR.
Further, a second end of the thirteenth resistor E-R1 is connected to one end of each of the two lines; the other end of one circuit is connected with the IN + end of the fifth solid-state relay E-SSR, and the circuit is used for controlling the fifth solid-state relay to work; the other end of the other line is connected with one end of the fourteenth resistor E-R2, and the other end of the fourteenth resistor E-R2 is connected with the first end of the nineteenth diode E-D3. In particular, the fourteenth resistor E-R2 also has a voltage dividing function, so that the voltage across the nineteenth diode E-D3 is reduced, and the nineteenth diode E-D3 is prevented from being damaged due to overhigh voltage.
Further, a second terminal of the nineteenth diode E-D3 is connected with the IN-terminal of the fifth solid state relay E-SSR;
a second end of the nineteenth diode E-D3 is connected to one end of the fifteenth resistor E-R3, and the other end of the fifteenth resistor E-R3 is connected to the IN + end of the fifth solid-state relay E-SSR. Specifically, the fifteenth resistor E-R3 acts as a shunt, reducing the current through the nineteenth diode E-D3. Specifically, the nineteenth diode E-D3 is a light emitting diode for displaying the output status of the microcomputer power supply.
Further, the OUT2 terminal of the fifth solid-state relay E-SSR is connected to the sixth output terminal 21Z1H1, and the OUT1 terminal of the fifth solid-state relay E-SSR is connected to the seventh output terminal 2JF 220;
the OUT2 end of the fifth solid-state relay E-SSR is connected with one end of the fifth piezoresistor E-Y, and the other end of the fifth piezoresistor E-Y is connected with the OUT1 end of the fifth solid-state relay E-SSR. Specifically, the fifth piezoresistor E-Y plays a lightning protection role, so that lightning passing through an external lightning protection device is further protected, and the situation that the voltage is too high due to lightning stroke and the fifth solid-state relay E-SSR is damaged is prevented.
Further, the sixth output terminal 21Z1H1 is connected to the negative electrodes of the input ends of the front stage retarder brake solenoid valve 1Z and the front stage retarder release solenoid valve 1H, respectively; the seventh output terminal 2JF220 is connected to an outdoor unit power supply output terminal.
The background brake mitigation module comprises a sixth solid-state relay F-SSR, a twentieth diode F-D1, a twenty-first diode F-D2, a twenty-second diode F-D3, a sixteenth resistor F-R1, a seventeenth resistor F-R2, an eighteenth resistor F-R3 and a sixth piezoresistor F-Y.
Further, the twentieth diode F-D1 and the twenty-first diode F-D2 are connected in parallel;
a first end of the twentieth diode F-D1 is connected to the eleventh input terminal 12Z2H2A, and a first end of the twenty-first diode F-D2 is connected to the twelfth input terminal 13Z2H 2B. Specifically, the eleventh input terminal 12Z2H2A and the twelfth input terminal 13Z2H2B are respectively connected with the positive electrode of the reserved microcomputer background brake mitigation double-control input power supply, and the twentieth diode F-D1 and the twenty-first diode F-D2 are connected in parallel. The eleventh input terminal 12Z2H2A and the twelfth input terminal 13Z2H2B can both be connected to a working voltage for the background brake mitigation module.
Further, a second end of the twentieth diode F-D1 and a second end of the twenty-first diode F-D2 are respectively connected to the first end of the sixteenth resistor F-R1. Specifically, the sixteenth resistor F-R1 plays a role of voltage division, reduces the potential at the IN + end of the sixth solid-state relay F-SSR, and prevents the potential difference from being too high to damage the sixth solid-state relay F-SSR.
Further, a second end of the sixteenth resistor F-R1 is connected to one end of each of the two lines; the other end of one circuit is connected with the IN + end of the sixth solid-state relay F-SSR, and the circuit is used for controlling the sixth solid-state relay to work; the other end of the other line is connected with one end of the seventeenth resistor F-R2, and the other end of the seventeenth resistor F-R2 is connected with the first end of the twenty-second diode F-D3. In particular, the seventeenth resistor F-R2 also has a voltage dividing function, so that the voltage across the twenty-second diode F-D3 is reduced, and the twenty-second diode F-D3 is prevented from being damaged due to overhigh voltage.
Further, a second terminal of the twenty-second diode F-D3 is connected with the IN-terminal of the sixth solid state relay F-SSR;
a second end of the twenty-second diode F-D3 is connected to one end of the eighteenth resistor F-R3, and the other end of the eighteenth resistor F-R3 is connected to the IN + end of the sixth solid-state relay F-SSR. Specifically, the eighteenth resistor F-R3 functions as a shunt to reduce the current through the twenty-second diode F-D3. Specifically, the twenty-second diode F-D3 is a light emitting diode for displaying the output state of the microcomputer power supply.
Further, the OUT2 terminal of the sixth solid-state relay F-SSR is connected to the eighth output terminal 22Z2H2, and the OUT1 terminal of the sixth solid-state relay F-SSR is connected to the seventh output terminal 2JF 220;
the OUT + end of the sixth solid-state relay F-SSR is connected with one end of the first piezoresistor A-Y, and the other end of the sixth piezoresistor F-Y is connected with the OUT1 end of the sixth solid-state relay F-SSR. Specifically, the sixth piezoresistor F-Y plays a lightning protection role, so that lightning passing through an external lightning protection device is further protected, and the situation that the sixth solid-state relay F-SSR is damaged due to overhigh voltage caused by lightning is prevented.
Further, the eighth output terminal 22Z2H2 is connected to the negative electrodes of the input ends of the background retarder braking solenoid valve 2Z and the background retarder release solenoid valve 2H, respectively.
Further, a first end of the first resistor A-R1 is connected with one end of the first knife switch K-1; the other end of the first knife switch K-1 is connected with a first end of the third diode A-D3; a second terminal of the third diode A-D3 is connected to a first terminal of a thirteenth resistor E-R1.
A first end of the fourth resistor B-R1 is connected with one end of the second knife switch K-2; the other end of the second knife switch K-2 is connected with a first end of a seventh diode B-D3; a second terminal of the seventh diode B-D3 is connected to a first terminal of a thirteenth resistor E-R1.
A first end of the seventh resistor C-R1 is connected with one end of the third knife switch K-3; the other end of the third knife switch K-3 is connected with a first end of the eleventh diode C-D3; a second terminal of the eleventh diode C-D3 is connected to a first terminal of a sixteenth resistor F-R1.
A first end of the tenth resistor D-R1 is connected with one end of the fourth knife switch K-44; the other end of the fourth knife switch K-4 is connected with a first end of a fifteenth diode D-D3; a second terminal of the fifteenth diode D-D3 is connected to a first terminal of a sixteenth resistor F-R1.
Specifically, the microcomputer foreground brake input power supply, the microcomputer foreground release input power supply, the microcomputer background brake input power supply, the microcomputer background release input power supply, the reserved microcomputer foreground brake release double-control input power supply and the reserved microcomputer background brake release double-control input power supply are all microcomputer power supplies.
Illustratively, the first knife switch K-1, the second knife switch K-2, the third knife switch K-3, and the fourth knife switch K-4 are each part of a four-knife switch. The four-knife switch is utilized to enable the input end of the foreground brake relieving module to be respectively connected with the input end of the foreground brake module and the input end of the foreground relieving module; and the background brake release module is respectively connected with the input end of the background brake module and the input end of the background release module. Even if the number of output ports of the existing microcomputer power supply is limited and input voltage cannot be provided for the foreground brake mitigation module and the background brake mitigation module independently, the input voltage can be accessed to the input end of the foreground brake mitigation module through the input end of the foreground brake module or the input end of the foreground mitigation module; and the input voltage is accessed to the input end of the background brake release module through the input end of the background brake module or the input end of the background release module.
Further, the IN-end of the first solid-state relay A-SSR, the IN-end of the second solid-state relay B-SSR, the IN-end of the third solid-state relay C-SSR, the IN-end of the fourth solid-state relay D-SSR, the IN-end of the fifth solid-state relay E-SSR and the IN-end of the sixth solid-state relay F-SSR are respectively connected with a thirteenth input terminal 1F24 through conducting wires, and the thirteenth input terminal 1F24 is connected with the negative electrode of the microcomputer power supply. Illustratively, the output voltage of the microcomputer power supply is 24V.
Illustratively, when the first input terminal 51Z1A or the second input terminal 53Z1B is connected to the positive terminal of the microcomputer's power source; the ninth input terminal 11Z1H1A or the tenth input terminal 33Z1H1B is connected to the positive terminal of the microcomputer power supply; the thirteenth input terminal 1F24 is connected to the negative electrode of the microcomputer power supply; the first knife switch K-1 is disconnected. At the moment, the foreground brake module is switched on a positive circuit of a foreground brake solenoid valve through a first solid state relay A-SSR; and the foreground brake release module is connected with a negative pole circuit of the foreground brake solenoid valve through a fifth solid state relay E-SSR. The positive and negative poles of the foreground brake electromagnetic valve are simultaneously switched on, and the foreground speed reducer executes foreground brake action.
For another example, when the third input terminal 52H1A or the fourth input terminal 32H1B is connected to the positive terminal of the microcomputer's power source; the thirteenth input terminal 1F24 is connected to the negative electrode of the microcomputer power supply; the second knife switch K-2 is closed. At the moment, the foreground relieving module is switched on a positive circuit of the foreground relieving electromagnetic valve through a second solid-state relay B-SSR; and the foreground brake release module is connected with a negative pole circuit of the foreground release solenoid valve through a fifth solid-state relay E-SSR. The positive and negative poles of the electromagnetic valve are simultaneously switched on, and the foreground speed reducer executes foreground relieving action.
The foreground brake release module is matched with the foreground brake module and/or the foreground release module, so that double control over the foreground speed reducer is realized; and the background brake release module is matched with the background brake module and/or the background release module, so that double control over the background speed reducer is realized. The safety of the control circuit is improved, and the normal operation of the equipment is ensured.
The control circuit can be used for a vehicle retarder control box, the vehicle retarder control box is suitable for interface equipment of a hump control system, and the vehicle retarder control box is a connecting part of an indoor control platform and an outdoor vehicle retarder. The vehicle speed reducer control box converts a control signal sent by the indoor control platform into a vehicle speed reducer action power supply, and controls the outdoor vehicle speed reducer to finish corresponding actions.
Illustratively, as shown in FIG. 2, FIG. 2 illustrates a vehicle retarder control box. The control box comprises a box body 1, a mounting bolt 2, a wiring terminal 3 and a control circuit.
The control circuit is packaged in the box body 1, and each input terminal and each output terminal of the control circuit respectively correspond to the wiring terminal 3; the box body 1 and the control circuit are fixedly connected through a bolt 3.
Specifically, an input terminal and an output terminal on the vehicle speed reducer control box correspond to an input terminal and an output terminal on the control circuit respectively. Namely, the input terminal on the vehicle retarder control box comprises: a first input terminal 51Z1A, a second input terminal 53Z1B, a third input terminal 52H1A, a fourth input terminal 32H1B, a fifth input terminal 71Z2A, a sixth input terminal 31Z2B, a seventh input terminal 72H2A, an eighth input terminal 73H2B, a ninth input terminal 11Z1H1A, a tenth input terminal 33Z1H1B, an eleventh input terminal 12Z2H2A, a twelfth input terminal 13Z2H2B, and a thirteenth input terminal 1F 24; the output terminal on the vehicle retarder control box includes: the first output terminal 61Z1, the second output terminal 4JZ220, the third output terminal 62H1, the fourth output terminal 81Z2, the fifth output terminal 82H2, the sixth output terminal 21Z1H1, the seventh output terminal 2JF220, and the eighth output terminal 22Z2H 2.
Specifically, the first input terminal 51Z1A, the second input terminal 53Z1B, the third input terminal 52H1A, the fourth input terminal 32H1B, the fifth input terminal 71Z2A, the sixth input terminal 31Z2B, the seventh input terminal 72H2A, the eighth input terminal 73H2B, the ninth input terminal 11Z1H1A, the tenth input terminal 33Z1H1B, the eleventh input terminal 12Z2H2A, and the twelfth input terminal 13Z2H2B are respectively connected to the positive electrode of the microcomputer power supply; the thirteenth input terminal 1F24 is connected to the negative electrode of the microcomputer power supply.
The first output terminal 61Z1, the third output terminal 62H1, the fourth output terminal 81Z2, the fifth output terminal 82H2, the sixth input terminal 31Z2B and the eighth input terminal 73H2B are respectively connected with the positive electrode of the reducer power supply; the second output terminal 4JZ220 and the seventh output terminal 2JF220 are connected to the negative electrode of the retarder power supply, respectively.
The vehicle retarder control box includes six solid-state relays, as shown in fig. 1, wherein four solid-state relays are respectively disposed in a foreground brake module, a foreground release module, a background brake module, and a background release module of the retarder control box. Under the general condition, one vehicle speed reducer control box can realize four action conditions of foreground braking, background braking, foreground relieving and background relieving of two speed reducers in one track. Specifically, a control circuit in the vehicle retarder control box introduces an action condition at one end of a brake valve or a release valve, and the other end of the brake valve or the release valve is directly connected with a power supply to control the action of the corresponding retarder according to the action condition.
The other two solid-state relays are respectively arranged in the front brake release module and the back brake release module, the two solid-state relays can be respectively used for control return wires of front and back reducers, negative electricity generated by the working of an electromagnetic valve of an outdoor reducer is led into the control return wires, and the double-control effect of power supplies at two ends of a brake valve and a release valve of the reducer is achieved. The vehicle speed reducer control box utilizes the solid-state relay to safely isolate indoor and outdoor circuits, improves the operating environment of each circuit and is convenient for equipment maintenance.
Illustratively, the first diode A-D1, the second diode A-D2, the third diode A-D3, the fifth diode B-D1, the sixth diode B-D2, the seventh diode B-D3, the ninth diode C-D1, the twelfth diode C-D2, the eleventh diode C-D3, the thirteenth diode D-D1, the fourteenth diode D-D2, the fifteenth diode D-D3, the seventeenth diode E-D1, the eighteenth diode E-D2, the twentieth diode F-D1 and the twenty-first diode F-D2 can be ordinary diodes; the fourth diode A-D4, the eighth diode B-D4, the twelfth diode C-D4, the sixteenth diode D-D4, the nineteenth diode E-D3 and the twenty-second diode F-D3 can be light emitting diodes.
TABLE 1 main technical index table of vehicle retarder control box
Figure BDA0002241235850000181
Figure BDA0002241235850000191
Exemplarily, as shown in table 1, when the voltage between the first input terminal 51Z1A and the thirteenth input terminal 1F24, and the voltage between the ninth input terminal 11Z1H1A and the thirteenth input terminal 1F24 are between 0-3V, respectively, the fourth diode a-D4 and the nineteenth diode E-D3 are both in an off state, when the voltage between the first output terminal 61Z1 and the sixth output terminal 21Z1H1 is 140V or less; when the voltage between the first input terminal 51Z1A and the thirteenth input terminal 1F24 and the voltage between the ninth input terminal 11Z1H1A and the thirteenth input terminal 1F24 are respectively between 4-19V, the fourth diode A-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the first output terminal 61Z1 and the sixth output terminal 21Z1H1 is between 150 and 218V; when the voltage between the first input terminal 51Z1A and the thirteenth input terminal 1F24 and the voltage between the ninth input terminal 11Z1H1A and the thirteenth input terminal 1F24 are respectively between 20-28V, the fourth diode A-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the first output terminal 61Z1 and the sixth output terminal 21Z1H1 is between 218 and 222V.
When the voltage between the second input terminal 53Z1B and the thirteenth input terminal 1F24 and the voltage between the ninth input terminal 11Z1H1A and the thirteenth input terminal 1F24 are respectively between 0 and 3V, the fourth diode a-D4 and the nineteenth diode E-D3 are both off states, and the voltage between the first output terminal 61Z1 and the sixth output terminal 21Z1H1 is 140V or less at this time; when the voltage between the second input terminal 53Z1B and the thirteenth input terminal 1F24 and the voltage between the ninth input terminal 11Z1H1A and the thirteenth input terminal 1F24 are respectively between 4-19V, the fourth diode A-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the first output terminal 61Z1 and the sixth output terminal 21Z1H1 is between 150 and 218V; when the voltage between the second input terminal 53Z1B and the thirteenth input terminal 1F24 and the voltage between the ninth input terminal 11Z1H1A and the thirteenth input terminal 1F24 are respectively between 20-28V, the fourth diode A-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the first output terminal 61Z1 and the sixth output terminal 21Z1H1 is between 218 and 222V.
When the voltage between the third input terminal 52H1A and the thirteenth input terminal 1F24 and the voltage between the tenth input terminal 33Z1H1B and the thirteenth input terminal 1F24 are respectively between 0-3V, the eighth diode B-D4 and the nineteenth diode E-D3 are both in an off state, and the voltage between the third output terminal 62H1 and the sixth output terminal 21Z1H1 is 140V or less at this time; when the voltage between the third input terminal 52H1A and the thirteenth input terminal 1F24 and the voltage between the tenth input terminal 33Z1H1B and the thirteenth input terminal 1F24 are respectively between 4-19V, the eighth diode B-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the third output terminal 62H1 and the sixth output terminal 21Z1H1 is between 150 and 218V at this time; when the voltage between the third input terminal 52H1A and the thirteenth input terminal 1F24 and the voltage between the tenth input terminal 33Z1H1B and the thirteenth input terminal 1F24 are respectively between 20-28V, the eighth diode B-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the third output terminal 62H1 and the sixth output terminal 21Z1H1 is between 218 and 222V.
When the voltage between the fourth input terminal 32H1B and the thirteenth input terminal 1F24 and the voltage between the tenth input terminal 33Z1H1B and the thirteenth input terminal 1F24 are respectively between 0 and 3V, the eighth diode B-D4 and the nineteenth diode E-D3 are both off states, and the voltage between the third output terminal 62H1 and the sixth output terminal 21Z1H1 is 140V or less at this time; when the voltage between the fourth input terminal 32H1B and the thirteenth input terminal 1F24 and the voltage between the tenth input terminal 33Z1H1B and the thirteenth input terminal 1F24 are respectively between 4-19V, the eighth diode B-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the third output terminal 62H1 and the sixth output terminal 21Z1H1 is between 150 and 218V at this time; when the voltage between the fourth input terminal 32H1B and the thirteenth input terminal 1F24 and the voltage between the tenth input terminal 33Z1H1B and the thirteenth input terminal 1F24 are respectively between 20-28V, the eighth diode B-D4 and the nineteenth diode E-D3 are both in a light-emitting state, and the voltage range between the third output terminal 62H1 and the sixth output terminal 21Z1H1 is between 218 and 222V.
When the voltage between the fifth input terminal 71Z2A and the thirteenth input terminal 1F24 and the voltage between the eleventh input terminal 12Z2H2A and the thirteenth input terminal 1F24 are respectively between 0 and 3V, the twelfth diode C-D4 and the twenty-second diode F-D3 are both in an off state, and the voltage between the fourth output terminal 81Z2 and the eighth output terminal 22Z2H2 is 140V or less at this time; when the voltage between the fifth input terminal 71Z2A and the thirteenth input terminal 1F24 and the voltage between the eleventh input terminal 12Z2H2A and the thirteenth input terminal 1F24 are respectively between 4-19V, the twelfth diode C-D4 and the twenty-second diode F-D3 are both in a light-emitting state, and the voltage range between the fourth output terminal 81Z2 and the eighth output terminal 22Z2H2 is between 150 and 218V at this time; when the voltage between the fifth input terminal 71Z2A and the thirteenth input terminal 1F24 and the voltage between the eleventh input terminal 12Z2H2A and the thirteenth input terminal 1F24 are respectively between 20V and 28V, the twelfth diode C-D4 and the twenty-second diode F-D3 are both in a light emitting state, and the voltage range between the fourth output terminal 81Z2 and the eighth output terminal 22Z2H2 is between 218V and 222V.
When the voltage between the sixth input terminal 31Z2B and the thirteenth input terminal 1F24 and the voltage between the eleventh input terminal 12Z2H2A and the thirteenth input terminal 1F24 are respectively between 0 and 3V, the twelfth diode C-D4 and the twenty-second diode F-D3 are both in an off state, and the voltage between the fourth output terminal 81Z2 and the eighth output terminal 22Z2H2 is 140V or less at this time; when the voltage between the sixth input terminal 31Z2B and the thirteenth input terminal 1F24 and the voltage between the eleventh input terminal 12Z2H2A and the thirteenth input terminal 1F24 are respectively between 4-19V, the twelfth diode C-D4 and the twenty-second diode F-D3 are both in a light emitting state, and the voltage range between the fourth output terminal 81Z2 and the eighth output terminal 22Z2H2 is between 150 and 218V; when the voltage between the sixth input terminal 31Z2B and the thirteenth input terminal 1F24 and the voltage between the eleventh input terminal 12Z2H2A and the thirteenth input terminal 1F24 are respectively between 20V and 28V, the twelfth diode C-D4 and the twenty-second diode F-D3 are both in a light emitting state, and the voltage range between the fourth output terminal 81Z2 and the eighth output terminal 22Z2H2 is between 218V and 222V.
When the voltage between the seventh input terminal 72H2A and the thirteenth input terminal 1F24 and the voltage between the twelfth input terminal 13Z2H2B and the thirteenth input terminal 1F24 are respectively between 0 and 3V, the sixteenth diode D-D4 and the twenty-second diode F-D3 are both in an off state, and the voltage between the fifth output terminal 82H2 and the eighth output terminal 22Z2H2 is 140V or less at this time; when the voltage between the seventh input terminal 72H2A and the thirteenth input terminal 1F24 and the voltage between the twelfth input terminal 13Z2H2B and the thirteenth input terminal 1F24 are respectively between 4-19V, the sixteenth diode D4 and the twenty-second diode F-D3 are both in a light-emitting state, and the voltage range between the fifth output terminal 82H2 and the eighth output terminal 22Z2H2 is between 150 and 218V; when the voltage between the seventh input terminal 72H2A and the thirteenth input terminal 1F24 and the voltage between the twelfth input terminal 13Z2H2B and the thirteenth input terminal 1F24 are respectively between 20V and 28V, the sixteenth diode D4 and the twenty-second diode F3 are both in a light emitting state, and the voltage range between the fifth output terminal 82H2 and the eighth output terminal 22Z2H2 is between 218V and 222V.
When the voltage between the eighth input terminal 73H2B and the thirteenth input terminal 1F24 and the voltage between the twelfth input terminal 13Z2H2B and the thirteenth input terminal 1F24 are respectively between 0 and 3V, the sixteenth diode D-D4 and the twenty-second diode F-D3 are both in an off state, and the voltage between the fifth output terminal 82H2 and the eighth output terminal 22Z2H2 is 140V or less at this time; when the voltage between the eighth input terminal 73H2B and the thirteenth input terminal 1F24 and the voltage between the twelfth input terminal 13Z2H2B and the thirteenth input terminal 1F24 are respectively between 4-19V, the sixteenth diode D4 and the twenty-second diode F-D3 are both in a light-emitting state, and the voltage range between the fifth output terminal 82H2 and the eighth output terminal 22Z2H2 is between 150 and 218V; when the voltage between the eighth input terminal 73H2B and the thirteenth input terminal 1F24 and the voltage between the twelfth input terminal 13Z2H2B and the thirteenth input terminal 1F24 are respectively between 20V and 28V, the sixteenth diode D4 and the twenty-second diode F-D3 are both in a light-emitting state, and the voltage range between the fifth output terminal 82H2 and the eighth output terminal 22Z2H2 is between 218V and 222V.
The vehicle speed reducer control box is installed on an indoor relay combination, four operations of foreground braking, background braking, foreground relieving, background relieving and the like of a station speed reducer are integrated together for control, and meanwhile negative electricity generated during the operation of the speed reducer is introduced into a control loop line, so that double-break of a power supply in the control process is realized. The vehicle speed reducer control box is internally provided with lightning protection and safety isolation measures at the output end, so that the normal and reliable work of the equipment is ensured. After the speed reducer control box is adopted, the circuit structure for controlling the speed reducer to operate is greatly simplified, the relay combination wiring is few, the occupied area is small, and the field maintenance is convenient.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A control circuit for a TW-2 hump system retarder, the control circuit comprising: a first control circuit and a second control circuit, wherein,
the first control circuit is connected with the front and the back stage speed reducers and is used for controlling the front and the back stage speed reducers to execute braking or release actions;
the second control circuit is respectively connected with the front and the back stage speed reducers and the first control circuit and is used as a control loop of the front and the back stage speed reducers to realize double control of the speed reducers.
2. The control circuit of claim 1,
the first control circuit comprises a foreground braking module, a foreground relieving module, a background braking module and a background relieving module;
the second control circuit comprises a foreground brake release module and a background brake release module;
the front stage brake module is matched with the front stage brake release module and used for controlling the front stage speed reducer to execute brake action;
the foreground relieving module is matched with the foreground brake relieving module and is used for controlling the foreground speed reducer to execute relieving actions;
the background brake module is matched with the background brake release module and used for controlling the background speed reducer to execute a brake action;
the background relieving module is matched with the background braking relieving module and used for controlling the background speed reducer to execute relieving actions.
3. The control circuit of claim 2,
foreground braking module, foreground alleviate module, backstage braking module, backstage alleviate module, foreground brake alleviate module and backstage brake alleviate the module and all include:
the first input positive terminal, the second input positive terminal, the first solid-state relay, the first diode, the second diode, the fourth diode, the first resistor, the second resistor, the third resistor, the first piezoresistor, the first output terminal and the second output terminal;
a first end of the first diode is connected with a first input positive terminal, and a first end of the second diode is connected with a second input positive terminal; the second end of the first diode and the second end of the second diode are respectively connected with the first end of the first resistor;
the second end of the first resistor is connected with the input positive end of the first solid-state relay; the second end of the first resistor is also connected with the first end of the second resistor, and the second end of the second resistor is connected with the first end of the fourth diode; a second end of the fourth diode is connected with an input negative end of the first solid-state relay;
the second end of the fourth diode is also connected with the first end of the third resistor, and the second end of the third resistor is connected with the input positive end of the first solid-state relay;
the output positive end of the first solid-state relay is connected with a first output terminal; the output negative end of the first solid-state relay is connected with a first end of a fourth resistor, and a second end of the fourth resistor is connected with a second output terminal;
the output positive end of the first solid-state relay is connected with the first end of the first piezoresistor, and the second end of the first piezoresistor is connected with the output negative end of the first solid-state relay.
4. The control circuit of claim 3,
the foreground brake module comprises a first knife switch;
the first end of the first knife switch is connected with the first end of a first resistor in the foreground brake module;
the second end of the first knife switch is connected with the first end of a third diode in the front stage brake module;
and the second end of a third diode in the foreground brake module is connected with the first end of a first resistor in the foreground brake release module.
5. The control circuit of claim 3,
the foreground mitigation module comprises a second knife switch;
the first end of the second knife switch is connected with the first end of the first resistor in the foreground relieving module;
the second end of the second knife switch is connected with the first end of a third diode in the foreground relieving module;
and the second end of a third diode in the foreground relieving module is connected with the first end of a first resistor in the foreground brake relieving module.
6. The control circuit of claim 3,
the background brake module comprises a third knife switch;
the first end of the third knife switch is connected with the first end of a first resistor in the background braking module;
the second end of the third knife switch is connected with the first end of a third diode in the background braking module;
and the second end of the third diode in the background brake module is connected with the first end of the first resistor in the background brake release module.
7. The control circuit of claim 3,
the background mitigation module comprises a fourth knife switch;
the first end of the fourth knife switch is connected with the first end of a first resistor in the background mitigation module;
the second end of the fourth knife switch is connected with the first end of a third diode in the background mitigation module;
and the second end of the third diode in the background relieving module is connected with the first end of the first resistor in the background braking relieving module.
8. The control circuit according to any one of claims 3-7,
the control circuit comprises a third input negative terminal;
the input negative terminal of the first solid-state relay in the foreground brake module, the input negative terminal of the first solid-state relay in the foreground release module, the input negative terminal of the first solid-state relay in the background brake module, the input negative terminal of the first solid-state relay in the background release module, the input negative terminal of the first solid-state relay in the foreground brake release module and the input negative terminal of the first solid-state relay in the background brake release module are respectively connected with the third input negative terminal.
9. The control circuit according to any one of claims 3-7,
the second output terminals in the foreground brake module, the foreground release module, the background brake module and the background release module are the same terminal;
and the second output terminals in the foreground brake release module and the background brake release module are the same terminal.
10. A retarder control box for a vehicle, the control box comprising a box body and a control circuit according to any one of claims 1 to 9, wherein the control circuit is disposed inside the box body;
and the input terminal and the output terminal of the control circuit are respectively connected with the wiring terminals on the box body.
CN201911000761.6A 2019-10-21 2019-10-21 Control circuit of TW-2 hump system reducer and reducer control box Active CN110920666B (en)

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RU2391241C1 (en) * 2009-05-12 2010-06-10 Государственное образовательное учреждение высшего профессионального образования "Самарский государственный университет путей сообщения" (СамГУПС) Hump rail circuit
US8413770B1 (en) * 2008-04-29 2013-04-09 Aaa Sales & Engineering, Inc. Systems and methods for retarding the speed of a railcar
CN203528514U (en) * 2013-09-29 2014-04-09 中铁二院武汉勘察设计研究院有限责任公司 System which is used for railway flat rolling speed regulation and prevents vehicles from runaway in process of hump rolling operation
CN107161180A (en) * 2017-06-20 2017-09-15 兰州交通大学 Novel control, supervision, the hump all-electronin automated system of monitoring integration
CN108569309A (en) * 2017-03-09 2018-09-25 华东交通大学 A kind of humping of cars speed control unit of novel railway hump marshalling station

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN2203942Y (en) * 1994-12-23 1995-07-26 铁道部科学研究院通信信号研究所 Fully electronized independent control unit for rail-vehicle brake
US8413770B1 (en) * 2008-04-29 2013-04-09 Aaa Sales & Engineering, Inc. Systems and methods for retarding the speed of a railcar
RU2391241C1 (en) * 2009-05-12 2010-06-10 Государственное образовательное учреждение высшего профессионального образования "Самарский государственный университет путей сообщения" (СамГУПС) Hump rail circuit
CN203528514U (en) * 2013-09-29 2014-04-09 中铁二院武汉勘察设计研究院有限责任公司 System which is used for railway flat rolling speed regulation and prevents vehicles from runaway in process of hump rolling operation
CN108569309A (en) * 2017-03-09 2018-09-25 华东交通大学 A kind of humping of cars speed control unit of novel railway hump marshalling station
CN107161180A (en) * 2017-06-20 2017-09-15 兰州交通大学 Novel control, supervision, the hump all-electronin automated system of monitoring integration

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