CN110911279A - Forming method of inclined hole - Google Patents
Forming method of inclined hole Download PDFInfo
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- CN110911279A CN110911279A CN201911156747.5A CN201911156747A CN110911279A CN 110911279 A CN110911279 A CN 110911279A CN 201911156747 A CN201911156747 A CN 201911156747A CN 110911279 A CN110911279 A CN 110911279A
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- oxide layer
- forming
- inclined hole
- inclination angle
- semiconductor substrate
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- 238000000034 method Methods 0.000 title claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 19
- 239000004065 semiconductor Substances 0.000 claims abstract description 15
- 238000000137 annealing Methods 0.000 claims abstract description 12
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000001257 hydrogen Substances 0.000 claims abstract description 10
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 10
- 238000001259 photo etching Methods 0.000 claims abstract description 9
- 238000005468 ion implantation Methods 0.000 claims abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 27
- 239000007789 gas Substances 0.000 claims description 16
- 235000012239 silicon dioxide Nutrition 0.000 claims description 13
- 239000000377 silicon dioxide Substances 0.000 claims description 13
- 238000001312 dry etching Methods 0.000 claims description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 7
- 238000002513 implantation Methods 0.000 claims description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 5
- 239000001301 oxygen Substances 0.000 claims description 5
- 229910052760 oxygen Inorganic materials 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 17
- 229910052710 silicon Inorganic materials 0.000 abstract description 17
- 239000010703 silicon Substances 0.000 abstract description 17
- 238000005516 engineering process Methods 0.000 abstract description 9
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 238000000151 deposition Methods 0.000 description 9
- 230000008021 deposition Effects 0.000 description 8
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 239000003054 catalyst Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910004014 SiF4 Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention discloses a method for forming an inclined hole, which comprises the following steps: step S01: providing a semiconductor substrate, and forming an oxide layer on the semiconductor substrate; step S02: forming a photoetching pattern on the oxide layer, taking the photoetching pattern as a mask, and performing ion implantation hydrogen on the oxide layer by adopting a first inclination angle; step S03: forming a reduction layer of the oxide layer having a second inclination angle in the oxide layer by annealing; step S04: and removing the oxide layer which remains between the reducing layers to form inclined holes in the reducing layers. The invention solves the problem that the prior etching technology can not etch inclined holes, is compatible with the conventional silicon-based super-large-scale integrated circuit manufacturing technology, has the characteristics of simplicity, convenience and short period, and can obviously reduce the process cost.
Description
Technical Field
The present invention relates to the field of semiconductor integrated circuit manufacturing technology, and more particularly, to a method for forming an inclined hole.
Background
In recent years, as MEMS devices and systems are more and more widely applied to the fields of automobiles and consumer electronics, and as Through Silicon Via (TSV) has a wide prospect in the future packaging field, the deep Silicon etching process gradually becomes one of the most popular processes in the MEMS processing field and the TSV technology.
Microdisplays are one application that is very important in MEMS, and Digital Micromirror Devices (DMDs) are the most successful of the MEMS microdisplay technologies. The structure includes a control matrix formed by integrated circuit process, and a micro mirror array composed of micro thin film mirrors is arranged above the control matrix. These matrices are typically achieved by etching, wherein an etching gas and a deposition gas are simultaneously introduced into the reaction chamber during the etching process, so that the etching operation and the deposition operation are performed simultaneously. And the proportion of the etching gas and the deposition gas is controlled through a process program, so that the control of the ratio of the etching rate to the deposition rate is realized, and the inclination angle type hole which is beneficial to the subsequent deposition process is obtained.
However, in practical applications, since the ratio of the etching rate to the deposition rate is not easy to control, the etching rate of the top region of the through hole is easily caused to be greater than the deposition rate, and the top of the through hole is caused to form a bowl-shaped (Bowing) shape; meanwhile, when the size of the opening at the top of the through hole is small, a flow field static area is formed at the top of the through hole due to the blocking of the mask, so that the deposition rate of the top area of the through hole is reduced, the Bowing appearance of the top area of the through hole is further increased, and the roughness of the side wall of the through hole is increased accordingly.
Therefore, it is highly desirable to find a new method for forming the inclined hole to eliminate the disadvantages of the prior art.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned drawbacks of the prior art and to provide a method for forming an inclined hole.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a method for forming an inclined hole comprises the following steps:
step S01: providing a semiconductor substrate, and forming an oxide layer on the semiconductor substrate;
step S02: forming a photoetching pattern on the oxide layer, taking the photoetching pattern as a mask, and performing ion implantation hydrogen on the oxide layer by adopting a first inclination angle;
step S03: forming a reduction layer of the oxide layer having a second inclination angle in the oxide layer by annealing;
step S04: and removing the oxide layer which remains between the reducing layers to form inclined holes in the reducing layers.
Further, in step S04, the oxide layer remaining between the reducing layers is removed by dry etching, and HF vapor is used as an etching gas.
Further, during the dry etching, ethanol vapor is introduced at the same time.
Further, the dry etching power is 260-550W.
Further, the photoetching pattern is a photoresist pattern.
Further, before step S04, the method further includes removing the photoresist by dry etching, where the etching gas is oxygen.
Further, in step S02, the first inclination angle is 60 degrees or less.
Further, in step S02, the implantation energy of the ion implantation hydrogen is 35 to 90Kev, and the implantation dose is 1 × 104～6×104Per cm2。
Further, in step S03, the annealing temperature is 1000 to 1100 degrees, and the annealing time is 25 to 40 seconds.
Further, the oxide layer is silicon dioxide.
According to the technical scheme, the oxide layer is formed on the semiconductor substrate, hydrogen is obliquely injected into the oxide layer through a large-angle ion injection process, the oxide layer is reduced through high-temperature annealing, the rest oxide layer is etched by using HF steam, simultaneously, ethanol steam is introduced as a catalyst, and generated gas is taken out of the inclined hole, so that the problem that the inclined hole cannot be etched by the existing etching technology is solved; meanwhile, the process of the invention is compatible with the conventional silicon-based ultra-large scale integrated circuit manufacturing technology, has the characteristics of simplicity, convenience and short period, and obviously reduces the process cost.
Drawings
FIG. 1 is a flow chart illustrating a method for forming a slant hole according to the present invention.
Fig. 2 to 6 are schematic views illustrating process steps for forming an inclined hole according to the method of fig. 1.
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
In the following detailed description of the embodiments of the present invention, in order to clearly illustrate the structure of the present invention and to facilitate explanation, the structure shown in the drawings is not drawn to a general scale and is partially enlarged, deformed and simplified, so that the present invention should not be construed as limited thereto.
In the following description of the present invention, please refer to fig. 1, fig. 1 is a flowchart illustrating a method for forming an inclined hole according to the present invention, and fig. 2 to 6 are schematic diagrams illustrating steps of forming an inclined hole according to the method of fig. 1. As shown in fig. 1, a method for forming an inclined hole of the present invention includes the steps of:
step S01: providing a semiconductor substrate, and forming an oxide layer on the semiconductor substrate.
Please refer to fig. 2. The semiconductor substrate 100 may be a semiconductor wafer of any diameter, such as 150 mm, 200 mm, and 300 mm silicon wafers. The semiconductor substrate 100 material may be silicon, germanium, gallium arsenide, or a silicon germanium compound; alternatively, the semiconductor substrate 100 has an epitaxial layer; alternatively, the semiconductor substrate 100 is a silicon-on-insulator substrate. The following description will be given taking a silicon substrate as an example.
A layer of silicon dioxide (SiO) may be deposited on the silicon substrate 100 by CVD2)200 act as an oxide layer. The deposition temperature can be 250-550 ℃, and the reaction gas can be Silane (SiH)4) And oxygen (O)2). Wherein the silane flow rate can be 5-30 sccm, the oxygen flow rate can be 15-50 sccm, the RF power can be 4500-6000W, and the RF bias power can be 1500-2500W. The thickness of the silicon dioxide 200 can be 100-300 nm.
Step S02: and forming a photoetching pattern on the oxide layer, taking the photoetching pattern as a mask, and performing ion implantation hydrogen on the oxide layer by adopting a first inclination angle.
Please refer to fig. 3. A photoresist is coated on the silicon oxide layer 200 and then is photolithographically developed to form a photoresist pattern consisting of a photoresist pattern 300.
Please refer to fig. 4. Next, hydrogen is ion implanted into the silicon dioxide layer 200 at a first tilt angle, wherein the first tilt angle is less than or equal to 60 degrees (the first tilt angle is defined by an included angle between the implantation direction and the surface of the silicon substrate 100).
The implantation energy of ion implantation of hydrogen is 35-90 Kev, and the implantation dosage is 1 × 104～6×104Per cm2。
Step S03: forming a reduced layer of the oxide layer having a second tilt angle in the oxide layer by annealing.
Please refer to fig. 5. Annealing the silicon substrate 100 at 1000-1100 deg.C for 25-40 s. The silicon dioxide in the implanted region is reduced to silicon by high temperature annealing, thereby forming a reduced silicon layer 400 having a second tilt angle in the silicon dioxide layer 200. Wherein, the second inclination angle is less than or equal to the first inclination angle.
Then, the photoresist pattern 300 is removed. The photoresist may be removed by dry etching, and the etching gas may be oxygen.
Step S04: and removing the oxide layer which remains between the reducing layers to form inclined holes in the reducing layers.
Please refer to fig. 6. The remaining silicon dioxide layer 200 may be removed by dry etching, and HF vapor may be used as an etching gas while introducing ethanol vapor, thereby forming the inclined hole 500 at a position originally occupied by the remaining silicon dioxide layer 200.
The dry etching power can be 260-550W.
In addition, after the above steps are completed, other processes for forming the CMOS device may be performed, and these process steps may be formed by methods familiar to those skilled in the art, and will not be described herein again.
Compared with the prior art, the method for forming the inclined hole comprises the steps of firstly depositing a silicon dioxide layer 200 on a silicon substrate 100, injecting hydrogen into a silicon wafer through a large-angle ion injection process, and reducing the silicon dioxide 200 in a hydrogen injection area into silicon 400 through high-temperature annealing; the remaining silicon dioxide 200 is then etched using vapor HF gas, the reaction equation being:
HF (gas) + SiO2——SiF4(gas) + H2O (gas)
Since plasma is not used during etching, damage to the silicon substrate 100 can be reduced; simultaneously, ethanol steam is introduced to be used as a catalyst, so that the generated SiF can be timely treated4The gas is carried out through the inclined holes 500.
The method solves the problem that the prior etching technology can not etch inclined holes, and simultaneously, the process of the invention can be compatible with the conventional silicon-based super-large-scale integrated circuit manufacturing technology, has the characteristics of simplicity, convenience and short period, and reduces the process cost.
The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.
Claims (10)
1. A method for forming an inclined hole is characterized by comprising the following steps:
step S01: providing a semiconductor substrate, and forming an oxide layer on the semiconductor substrate;
step S02: forming a photoetching pattern on the oxide layer, taking the photoetching pattern as a mask, and performing ion implantation hydrogen on the oxide layer by adopting a first inclination angle;
step S03: forming a reduction layer of the oxide layer having a second inclination angle in the oxide layer by annealing;
step S04: and removing the oxide layer which remains between the reducing layers to form inclined holes in the reducing layers.
2. The method of claim 1, wherein in step S04, the oxide layer remaining between the reducing layers is removed by dry etching, and HF vapor is used as an etching gas.
3. The method for forming the inclined hole according to claim 2, wherein during the dry etching, ethanol vapor is introduced.
4. The method for forming the inclined hole according to claim 2 or 3, wherein the dry etching power is 260-550W.
5. The method of claim 1, wherein the photoresist pattern is a photoresist pattern.
6. The method for forming the inclined hole according to claim 5, wherein before the step S04, the method further comprises removing the photoresist by dry etching, wherein the etching gas is oxygen.
7. The method of claim 1, wherein in step S02, the first inclination angle is 60 degrees or less.
8. The method of claim 1, wherein in step S02, the hydrogen gas is implanted at an implantation energy of 35 to 90Kev and an implantation dose of 1 x 104～6×104Per cm2。
9. The method of claim 1, wherein in step S03, the annealing temperature is 1000 to 1100 degrees, and the annealing time is 25 to 40 seconds.
10. The method according to claim 1, wherein the oxide layer is silicon dioxide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911156747.5A CN110911279A (en) | 2019-11-22 | 2019-11-22 | Forming method of inclined hole |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911156747.5A CN110911279A (en) | 2019-11-22 | 2019-11-22 | Forming method of inclined hole |
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| CN110911279A true CN110911279A (en) | 2020-03-24 |
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| CN201911156747.5A Withdrawn CN110911279A (en) | 2019-11-22 | 2019-11-22 | Forming method of inclined hole |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101752203A (en) * | 2008-12-17 | 2010-06-23 | 上海华虹Nec电子有限公司 | Preparation method of inclined groove |
| CN110456435A (en) * | 2019-08-23 | 2019-11-15 | 上海集成电路研发中心有限公司 | A kind of holographic grating template and preparation method thereof |
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2019
- 2019-11-22 CN CN201911156747.5A patent/CN110911279A/en not_active Withdrawn
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101752203A (en) * | 2008-12-17 | 2010-06-23 | 上海华虹Nec电子有限公司 | Preparation method of inclined groove |
| CN110456435A (en) * | 2019-08-23 | 2019-11-15 | 上海集成电路研发中心有限公司 | A kind of holographic grating template and preparation method thereof |
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Application publication date: 20200324 |