CN110907962A - Beidou double-frequency satellite signal radio frequency receiver - Google Patents

Beidou double-frequency satellite signal radio frequency receiver Download PDF

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Publication number
CN110907962A
CN110907962A CN201911290946.5A CN201911290946A CN110907962A CN 110907962 A CN110907962 A CN 110907962A CN 201911290946 A CN201911290946 A CN 201911290946A CN 110907962 A CN110907962 A CN 110907962A
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frequency
signal
radio frequency
conversion
receiver
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陈彬
范麟
陈华锋
杨津
黄开波
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Chongqing Southwest Integrated Circuit Design Co ltd
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Chongqing Southwest Integrated Circuit Design Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/32Multimode operation in a single same satellite system, e.g. GPS L1/L2
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/35Constructional details or hardware or software details of the signal processing chain
    • G01S19/37Hardware or software details of the signal processing chain

Abstract

The invention discloses a Beidou double-frequency satellite signal radio frequency receiver which is characterized in that: the radio frequency receiver adopts a circuit structure with one path of radio frequency input and two paths of analog intermediate frequency output, and receives satellite signals of two frequency points of the Beidou in parallel; the radio frequency receiver comprises a low noise amplifier, a power divider, two down-conversion channels, one local oscillator signal and one clock signal generation channel; each channel of down-conversion channel adopts a circuit structure of twice frequency conversion, and comprises a radio frequency filter, a first-stage mixer, a first intermediate frequency band-pass filter, a second-stage mixer, a second intermediate frequency low-pass filter and an automatic gain amplifier; satellite signals received by the active antenna are amplified by the low noise amplifier and then output to the power divider, and the power divider divides the received signals into two paths of satellite signals and outputs the two paths of satellite signals to two down-conversion channels respectively; in each channel of down-conversion channel, satellite signals are output to a first-stage mixer after being subjected to preselection filtering by a radio frequency filter; the invention can be widely applied to the field of Beidou satellite navigation.

Description

Beidou double-frequency satellite signal radio frequency receiver
Technical Field
The invention belongs to the technical field of satellite navigation radio frequency circuits, and particularly relates to a Beidou double-frequency satellite signal radio frequency receiver.
Background
The Beidou satellite navigation system is a global satellite navigation system which is autonomously built and independently operated in view of the development requirements of national security and economic society in China, and is a national important space infrastructure for providing all-weather, all-time and high-precision positioning, navigation and time service for global users. With the gradual improvement of the Beidou satellite navigation system, the positioning precision of the receiving terminal is required to be higher and higher in high-precision application fields such as surveying and mapping, geographic information, geological disaster monitoring and the like. The radio frequency receiver is used as an important component of a Beidou high-precision receiving terminal, and the performance of the radio frequency receiver is a key factor influencing the positioning precision of the terminal. The research on the influence of the Beidou radio frequency receiving circuit architecture and the frequency planning on the positioning precision has important significance in the development of the high-performance Beidou radio frequency receiver.
Currently, in a scheme of a dual-frequency or multi-frequency high-precision radio frequency receiver, independent local oscillation signals are adopted by different receiving channels. The scheme has the problem of unstable phase difference between radio frequency channels, and influences the carrier phase precision of the receiver. In addition, because the local oscillator signal frequency is many, there are the problems such as the receiver power consumption is high, bulky, electromagnetic compatibility is poor, can't satisfy current satellite positioning receiver low-power consumption, small-size and high accuracy requirement.
The technical scheme of the existing Beidou double-frequency high-precision radio frequency receiver adopts a circuit structure with one-time frequency conversion. Satellite signals received by the high-precision active antenna enter the radio frequency receiver, then are divided into two paths, and the two paths of signals pass through the radio frequency filter, the frequency mixer, the intermediate frequency filter and the intermediate frequency automatic gain amplifier and then output analog intermediate frequency signals, so that frequency conversion processing of Beidou B1 and B2 frequency point signals is realized. In the circuit structure of the scheme, three independent frequency synthesizers are included, wherein two frequency synthesizers respectively provide local oscillator signals for two receiving channels, and the other frequency synthesizer outputs sampling clock signals. Meanwhile, because two receiving channels adopt independent local oscillator signals, under the change of external factors such as environmental temperature, the phase difference between the phases of the two channels fluctuates, and the phase precision of the carrier wave of the receiver is further influenced.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: a Beidou double-frequency satellite signal radio frequency receiver which adopts a frequency synthesizer structure and simultaneously receives Beidou satellite signals with two frequency points.
In order to solve the technical problems, the invention adopts the following technical scheme:
the utility model provides a big dipper dual-frenquency satellite signal radio frequency receiver which characterized in that: the radio frequency receiver adopts a circuit structure of one path of radio frequency input and two paths of analog intermediate frequency output, and receives satellite signals of two frequency points of the Beidou in parallel; the radio frequency receiver comprises a low noise amplifier, a power divider, two down-conversion channels, one local oscillator signal and one clock signal generation channel; each channel of down-conversion channel adopts a circuit structure of twice frequency conversion, and comprises a radio frequency filter, a first-stage mixer, a first intermediate frequency band-pass filter, a second-stage mixer, a second intermediate frequency low-pass filter and an automatic gain amplifier.
Satellite signals received by the active antenna are amplified by the low noise amplifier and then output to the power divider, and the power divider divides the received signals into two paths of satellite signals and outputs the two paths of satellite signals to two down-conversion channels respectively.
In each down-conversion channel, satellite signals are output to the first-stage mixer after being subjected to preselection filtering by the radio frequency filter.
The first-stage frequency mixer performs frequency conversion processing on the received signal by using a first local oscillation signal and outputs the signal to a first intermediate frequency band-pass filter.
The first intermediate frequency band-pass filter performs intermediate frequency band-pass filtering on the received signal, and outputs an intermediate frequency signal needing to be demodulated in the bandwidth to the second-stage mixer by setting the bandwidth of the filter.
And the second-stage frequency mixer performs frequency conversion processing on the received signal by using a second local oscillation signal and outputs the signal to a second intermediate-frequency low-pass filter.
The second intermediate frequency low-pass filter performs intermediate frequency low-pass filtering on the received signal, and outputs an intermediate frequency signal which is lower than a cut-off frequency of the filter and needs to be demodulated to the automatic gain amplifier by setting the cut-off frequency of the filter.
The automatic gain amplifier amplifies the received signal and outputs the amplified signal.
The local oscillator signal and clock signal generating channel comprises a frequency synthesizer, a first frequency dividing circuit and a second frequency dividing circuit, and the frequency synthesizer provides a first local oscillator signal for the two paths of down-conversion channels; the first local oscillation signals adopted by the first-stage frequency mixers of the two down-conversion channels have the same frequency; meanwhile, a first local oscillation signal output by the frequency synthesizer is processed by a first frequency division circuit to obtain a second local oscillation signal; and the second local oscillator signal is processed by the second frequency division circuit to obtain a reference clock signal.
In the field of high-precision application of satellite navigation, in order to realize higher positioning precision, a carrier phase measurement value needs to be used, and whether the phase difference between two channels of a double-frequency radio frequency receiver is stable or not is a key factor influencing the carrier phase precision of the receiver. According to the invention, through reasonable frequency planning, the design of the same local oscillator signal is adopted, only one frequency synthesizer is integrated inside, and the two down-conversion channels and the clock signal are generated by using the same frequency synthesizer, so that the influence of the local oscillator signal on the phase difference between the channels is eliminated, and the carrier phase precision of the receiver is improved; in addition, the second local oscillator and the sampling clock signal are both obtained by frequency division of one local oscillator. By optimizing the circuit architecture of the receiver, the power consumption of the radio frequency receiver is reduced, and the size of the circuit is reduced.
According to the preferable scheme of the Beidou double-frequency satellite signal radio frequency receiver, the second local oscillation signals adopted by the second-stage frequency mixers of the two down-conversion channels have the same frequency and are obtained by frequency division of the first local oscillation signals.
According to the preferable scheme of the Beidou double-frequency satellite signal radio frequency receiver, when the radio frequency receiver receives satellite signals of two frequency points of Beidou B1 and B2 in parallel, the frequency range of the first local oscillation signal is 1395 MHz-1415 MHz.
According to the preferable scheme of the Beidou double-frequency satellite signal radio frequency receiver, the first frequency dividing circuit is an 8-frequency dividing circuit, and the second frequency dividing circuit is a 4-frequency dividing circuit.
The sampling clock, the second local oscillator and the first local oscillator are in a multiple relation, and the electromagnetic compatibility design difficulty of the receiver is reduced.
The Beidou double-frequency satellite signal radio frequency receiver has the beneficial effects that: according to the Beidou double-frequency high-precision radio frequency receiver, the design that two channels share the local oscillator is adopted, the problem of phase difference drift between the channels caused by local oscillator phase drift of the two receiving channels is solved, and the carrier phase precision of the Beidou double-frequency receiver is improved; the circuit structure of the system is simplified, and compared with the traditional technical scheme, the volume and the power consumption of the receiver can be reduced by about 20 percent; through reasonable frequency planning, the frequency of the internal signal of the receiver is more single, the electromagnetic compatibility design difficulty of the receiver is reduced, and the method can be widely applied to the field of Beidou satellite navigation.
Drawings
FIG. 1 is a schematic block diagram of a Beidou dual-frequency satellite signal radio frequency receiver according to the invention.
Detailed Description
Referring to fig. 1, a Beidou dual-frequency satellite signal radio frequency receiver adopts a circuit structure with one path of radio frequency input and two paths of analog intermediate frequency output, and receives satellite signals of two frequency points of Beidou in parallel; for example, two frequency points of Beidou B1 and B2; the radio frequency receiver comprises a low noise amplifier LNA, a Power divider Power Splitter, two down- conversion channels 1 and 2, a local oscillator signal and a clock signal generation channel 3; each channel of down-conversion channel adopts a circuit structure of twice frequency conversion, and comprises a radio frequency filter, a first-stage mixer, a first intermediate frequency band-pass filter, a second-stage mixer, a second intermediate frequency low-pass filter and an automatic gain amplifier.
Satellite signals received by the active antenna are amplified by the low noise amplifier LNA and then output to the Power divider Power Splitter, and the Power divider Power Splitter divides the received signals into two paths of satellite signals and outputs the two paths of satellite signals to the two down- conversion channels 1 and 2 respectively. For example, the signals divided into BDS B1 satellite signals and BDS B2 satellite signals are output to two down- conversion channels 1 and 2, respectively.
In each channel of down-conversion channel, satellite signals are output to the first-stage mixer after being subjected to preselection filtering by the radio frequency filter.
The first-stage mixer performs frequency conversion processing on the received signal by using a first local oscillator signal LO1, and outputs the signal to a first intermediate frequency band-pass filter.
The first intermediate frequency band-pass filter performs intermediate frequency band-pass filtering on the received signal, and outputs an intermediate frequency signal needing to be demodulated in the bandwidth to the second-stage mixer by setting the bandwidth of the filter.
The second-stage mixer performs frequency conversion processing on the received signal by using a second local oscillator signal LO2, and outputs the signal to a second intermediate frequency low-pass filter.
The second intermediate frequency low-pass filter performs intermediate frequency low-pass filtering on the received signal, and outputs an intermediate frequency signal which is lower than a cut-off frequency of the filter and needs to be demodulated to the automatic gain amplifier by setting the cut-off frequency of the filter.
The automatic gain amplifier amplifies the received signal and outputs the amplified signal.
The local oscillation signal and clock signal generating channel 3 comprises a frequency synthesizer PLL, a first frequency division circuit digital-BY-8 and a second frequency division circuit digital-BY-4, and the frequency synthesizer PLL provides a first local oscillation signal for the two paths of down- conversion channels 1 and 2; the first local oscillation signals LO1 adopted by the first-stage frequency mixers of the two down-conversion channels have the same frequency; meanwhile, a first local oscillation signal output by the frequency synthesizer is processed by a first frequency division circuit to obtain a second local oscillation signal; and the second local oscillator signal is processed by the second frequency division circuit to obtain a reference clock signal.
In a particular embodiment, the down conversion channel 1 comprises a radio frequency Filter RF Filter11, a first stage MIXER11, a first intermediate frequency band pass Filter IF Filter11, a second stage MIXER12, a second intermediate frequency low pass Filter IF Filter12, and an automatic gain amplifier AGC 11.
The down conversion channel 2 comprises a radio frequency Filter RF Filter21, a first stage MIXER21, a first intermediate frequency band pass Filter IF Filter21, a second stage MIXER22, a second intermediate frequency low pass Filter IF Filter22 and an automatic gain amplifier AGC 21.
In a specific embodiment, when the radio frequency receiver receives satellite signals of two frequency points of beidou B1 and B2 in parallel, the frequency of the first local oscillation signal may be 1395MHz to 1415 MHz. It is necessary to ensure that the first local oscillator signal LO1 used by the first stage mixer of the two down-conversion channels has the same frequency.
The frequencies of the second local oscillation signals LO2 adopted by the second-stage MIXERs MIXER12 and MIXER22 of the two down- conversion channels 1 and 2 are the same, and both are obtained by frequency division of the first local oscillation signal.
The first frequency division circuit Divide-BY-8 is a frequency division circuit of 8. The second frequency dividing circuit Divide-BY-4 is a frequency dividing circuit of 4.
In a specific embodiment, when the radio frequency receiver receives satellite signals of two frequency points, namely Beidou B1 and B2, in parallel, the frequency of the radio frequency receiver is planned as shown in the following table 1, so that the design that two frequency conversion channels adopt the same local oscillator signal is ensured.
TABLE 1 Beidou double-frequency high-precision radio frequency receiver frequency planning table
Figure BDA0002319074950000061
Through reasonable frequency planning, the Beidou double-frequency radio frequency receiver adopts the design of the same local oscillator, only one frequency synthesizer circuit is integrated inside the Beidou double-frequency radio frequency receiver, the first local oscillator of the two channels is generated, and the second local oscillator and the sampling clock signal are obtained through frequency division of the first local oscillator. Compared with the traditional Beidou dual-frequency radio frequency receiver scheme, the design has the following advantages:
the design of two channels sharing the local oscillator eliminates the problem of phase difference drift between the channels caused by local oscillator phase drift of the two channels, and improves the positioning accuracy of the receiver.
Only one frequency synthesizer is integrated in the radio frequency receiver, so that the size and the power consumption of the circuit are reduced.
The internal signal frequency of the radio frequency receiver is more single, and the sampling clock, the second local oscillator and the first local oscillator are in a multiple relation, so that the design difficulty of electromagnetic compatibility of the receiver is reduced.
By adopting the structure of twice frequency conversion, the high out-of-band rejection band-pass filter can be applied to the first intermediate frequency, so that compared with the traditional scheme, the center frequency of the intermediate frequency band-pass filter is improved, the size of the filter is reduced, and the size of the receiver is further reduced.
By utilizing the design idea, the method can be expanded and applied to a multimode multi-frequency GNSS high-precision radio frequency receiver system, and has great application value.
While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (4)

1. The utility model provides a big dipper dual-frenquency satellite signal radio frequency receiver which characterized in that: the radio frequency receiver adopts a circuit structure of one path of radio frequency input and two paths of analog intermediate frequency output, and receives satellite signals of two frequency points of the Beidou in parallel; the radio frequency receiver comprises a Low Noise Amplifier (LNA), a Power divider (Power Splitter), two down-conversion channels (1 and 2) and a local oscillator signal and clock signal generation channel (3); each channel of down-conversion channel adopts a circuit structure of twice frequency conversion, and comprises a radio frequency filter, a first-stage mixer, a first intermediate frequency band-pass filter, a second-stage mixer, a second intermediate frequency low-pass filter and an automatic gain amplifier;
satellite signals received by the active antenna are amplified by a Low Noise Amplifier (LNA) and then output to a Power divider (Power Splitter), and the Power divider (Power Splitter) divides the received signals into two paths of satellite signals and respectively outputs the two paths of satellite signals to two down-conversion channels (1 and 2);
in each channel of down-conversion channel, satellite signals are output to a first-stage mixer after being subjected to preselection filtering by the radio frequency filter;
the first-stage mixer carries out frequency conversion processing on the received signal by using a first local oscillator signal (LO1) and outputs the signal to a first intermediate frequency band-pass filter;
the first intermediate frequency band-pass filter performs intermediate frequency band-pass filtering on the received signal, and outputs an intermediate frequency signal needing to be demodulated in the bandwidth to the second-stage mixer by setting the bandwidth of the filter;
the second-stage mixer performs frequency conversion processing on the received signal by using a second local oscillator signal (LO2) and outputs the signal to a second intermediate-frequency low-pass filter;
the second intermediate frequency low-pass filter performs intermediate frequency low-pass filtering on the received signal, and outputs an intermediate frequency signal which is lower than a cut-off frequency and needs to be demodulated to the automatic gain amplifier by setting the cut-off frequency of the filter;
the automatic gain amplifier amplifies the received signal and outputs the amplified signal;
the local oscillator signal and clock signal generating channel (3) comprises a frequency synthesizer (PLL), a first frequency division circuit (Divide-BY-8) and a second frequency division circuit (Divide-BY-4), and the frequency synthesizer (PLL) provides a first local oscillator signal for the two paths of down-conversion channels (1 and 2); the first local oscillation signals (LO1) adopted by the first-stage mixers of the two down-conversion channels have the same frequency; meanwhile, a first local oscillation signal output by the frequency synthesizer is processed by a first frequency division circuit to obtain a second local oscillation signal; and the second local oscillator signal is processed by the second frequency division circuit to obtain a reference clock signal.
2. The Beidou dual-band satellite signal radio frequency receiver of claim 1, characterized in that: the second local oscillator signals (LO2) adopted by the second-stage mixers of the two down-conversion channels have the same frequency and are obtained by frequency division of the first local oscillator signals.
3. The Beidou dual-band satellite signal radio frequency receiver according to claim 1 or 2, characterized in that: when the radio frequency receiver receives satellite signals of two frequency points of Beidou B1 and B2 in parallel, the frequency range of the first local oscillation signal is 1395 MHz-1415 MHz.
4. The Beidou dual-band satellite signal radio frequency receiver of claim 1, characterized in that: the first frequency dividing circuit is a frequency dividing circuit of 8; the second frequency dividing circuit is a frequency dividing by 4 circuit.
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CN111399008A (en) * 2020-04-07 2020-07-10 华南理工大学 Multi-mode multi-channel navigation receiving device
CN111555998A (en) * 2020-04-21 2020-08-18 上海航天测控通信研究所 Down-conversion signal processing method and down-conversion assembly of satellite-borne atomic clock
CN112485762A (en) * 2020-10-14 2021-03-12 武汉大学 Dual-frequency radar
CN113691269A (en) * 2021-08-30 2021-11-23 上海航天测控通信研究所 Frequency point-variable high-sensitivity satellite measurement and control receiver
CN114047532A (en) * 2022-01-13 2022-02-15 龙旗电子(惠州)有限公司 Double-frequency-band processing circuit and positioning equipment

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CN111399008A (en) * 2020-04-07 2020-07-10 华南理工大学 Multi-mode multi-channel navigation receiving device
CN111399008B (en) * 2020-04-07 2020-12-04 华南理工大学 Multi-mode multi-channel navigation receiving device
CN111399009A (en) * 2020-04-08 2020-07-10 华南理工大学 Multimode navigation receiving device
CN111555998A (en) * 2020-04-21 2020-08-18 上海航天测控通信研究所 Down-conversion signal processing method and down-conversion assembly of satellite-borne atomic clock
CN111555998B (en) * 2020-04-21 2023-03-24 上海航天测控通信研究所 Down-conversion signal processing method and down-conversion assembly of satellite-borne atomic clock
CN112485762A (en) * 2020-10-14 2021-03-12 武汉大学 Dual-frequency radar
CN112485762B (en) * 2020-10-14 2024-01-16 武汉大学 Dual-frequency radar
CN113691269A (en) * 2021-08-30 2021-11-23 上海航天测控通信研究所 Frequency point-variable high-sensitivity satellite measurement and control receiver
CN113691269B (en) * 2021-08-30 2022-03-25 上海航天测控通信研究所 Frequency point-variable high-sensitivity satellite measurement and control receiver
CN114047532A (en) * 2022-01-13 2022-02-15 龙旗电子(惠州)有限公司 Double-frequency-band processing circuit and positioning equipment

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