CN110896571B - Optical fiber inertial navigation temperature control system and method based on CPU + FPGA - Google Patents
Optical fiber inertial navigation temperature control system and method based on CPU + FPGA Download PDFInfo
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- CN110896571B CN110896571B CN201911166012.0A CN201911166012A CN110896571B CN 110896571 B CN110896571 B CN 110896571B CN 201911166012 A CN201911166012 A CN 201911166012A CN 110896571 B CN110896571 B CN 110896571B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B1/00—Details of electric heating devices
- H05B1/02—Automatic switching arrangements specially adapted to apparatus ; Control of heating devices
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
- G01C21/00—Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00
- G01C21/10—Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00 by using measurements of speed or acceleration
- G01C21/12—Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00 by using measurements of speed or acceleration executed aboard the object being navigated; Dead reckoning
- G01C21/16—Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00 by using measurements of speed or acceleration executed aboard the object being navigated; Dead reckoning by integrating acceleration or speed, i.e. inertial navigation
- G01C21/18—Stabilised platforms, e.g. by gyroscope
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0421—Multiprocessor system
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Abstract
The invention discloses a system and a method for controlling the temperature of optical fiber inertial navigation based on a CPU + FPGA, wherein the system comprises: the device comprises an optical fiber inertial navigation element, a platinum resistor, an A/D acquisition conversion circuit, a power driving circuit, a heating plate, an FPGA, a CPU and a power supply; the element is a gyroscope, a accelerometer or a bracket; after the data interaction between the CPU and the FPGA, the CPU performs temperature compensation on the temperature information received by the FPGA, summarizes the temperature information of the elements after the temperature compensation, calculates the heating current required by the corresponding elements, divides the elements into a plurality of combinations, and alternately supplies power to the plurality of combinations by the power supply so that the elements reach the specified temperature. The invention improves the precision of the collected temperature by means of a CPU error compensation algorithm, improves the real-time performance of the temperature control system by the mutual cooperation of the FPGA and the CPU, reduces the power consumption and the working current by adopting a time-division complex control temperature control algorithm, and improves the safety and the control precision of the temperature control system.
Description
Technical Field
The invention relates to the field of temperature control, in particular to a system and a method for controlling optical fiber inertial navigation temperature based on a CPU + FPGA.
Background
In consideration of the problems of precision and reliability of the optical fiber inertial navigation under the complex external environment, the temperature of the optical fiber inertial navigation measuring element is controlled to ensure the precision requirement of the optical fiber inertial navigation, so that the optical fiber inertial navigation measuring element works under the optimal temperature environment. Meanwhile, the real-time performance is also an important precision guarantee factor of the optical fiber inertial navigation. Therefore, it is necessary to control the temperature of the fiber inertial navigation system and ensure real-time data.
At present, a commonly used temperature control scheme is realized by using an FPGA (field programmable gate array), a temperature sensor is adopted in design to acquire the internal temperature of the optical fiber inertial navigation, and on the basis, the output power of a heating sheet attached to the optical fiber inertial navigation is adjusted through simple PID (proportion integration differentiation) control to realize the maintenance of a temperature environment. For an aircraft, this temperature control circuit has four disadvantages: (1) the current is large: generally, the optical fiber inertial navigation system is composed of 3 gyroscopes, 3 adder meters and more than 1 bracket, and the initial heating current is increased due to the fact that a plurality of measuring elements start temperature control at the initial temperature control stage, the power consumption is serious, and the requirement on power supply of a superior system is high. (2) Real-time performance: in the early stage, the temperature difference between the temperature and the preset optimal temperature is large, so that the initial temperature of the temperature control working stage rises quickly, the temperature control precision gradually drops along with the gradual reduction of the temperature difference, and the whole temperature control process is long. (3) The precision is insufficient: the FPGA has limited computing capability, cannot realize temperature control by using a complex and reliable algorithm, and can only be realized by using a PID control algorithm singly.
In summary, the current commonly used temperature control circuit algorithm and circuit design have certain differences from the requirements in terms of safety, precision and real-time performance. Therefore, it is necessary to optimally design the temperature control of the fiber inertial navigation system.
Disclosure of Invention
The invention aims to optimally design the temperature control of the optical fiber inertial navigation to obtain a low-power-consumption high-precision temperature control circuit capable of rapidly processing data.
In order to achieve the above object, the present invention provides a CPU + FPGA-based fiber inertial navigation temperature control system, which includes: the device comprises a plurality of optical fiber inertial navigation elements, a plurality of platinum resistors, an A/D acquisition conversion circuit, a plurality of power driving circuits, a plurality of heating sheets for heating the elements, an FPGA, a CPU and a power supply; the element comprises a gyroscope, a accelerometer or a bracket; the heating plates are respectively fixed on the elements; the heating plates are respectively connected with the power driving circuit; the elements are also respectively connected with the platinum resistors so as to respectively output the temperature information of the elements; the A/D acquisition and conversion circuit is used for acquiring the temperature information; the FPGA is used for receiving the temperature information acquired by the A/D acquisition and conversion circuit, and regulating the current generated by the power driving circuit after data interaction is carried out on the temperature information and the CPU so as to control the heating temperature of the heating sheet; after the data interaction between the CPU and the FPGA, the CPU performs temperature compensation on the temperature information received by the FPGA, summarizes the temperature information of the elements after the temperature compensation, calculates the heating current required by the corresponding elements, divides the elements into a plurality of combinations, and alternately supplies power to the plurality of combinations by the power supply so that the elements reach the specified temperature.
Preferably, the temperature compensation comprises: and the CPU performs error compensation of the acquired temperature on the temperature information acquired by the A/D acquisition and conversion circuit according to the temperature parameter calibrated by the experiment.
Preferably, the temperature compensation further comprises: the CPU divides the temperature interval into three sections of curves, and corresponding temperature correction is carried out aiming at different temperature intervals so as to improve the temperature control precision.
Preferably, the element comprises: three gyros, three adding tables and a bracket are 7 paths of elements.
Preferably, when the element is heated, the 7-path elements are divided into two groups, wherein two gyros are divided into a first group, and one gyro and three adding tables and supports are divided into a second group.
Preferably, the CPU calculates the algorithm temperature of each group of elements according to a set algorithm, the power supply supplies power to the first group of elements, and after the algorithm temperature is reached and the temperature is stable, the power supply supplies power to the second group of elements to make the second group of elements reach the algorithm temperature, and then the power supply continues to alternately supply power to the first group of elements and the second group of elements to make the elements reach the specified temperature.
Preferably, the system further comprises: RS422 serial port; and after the FPGA and the CPU carry out data interaction, heating data are obtained, and the heating data are output to the power driving circuit through an RS422 serial port so as to adjust the current generated by the power driving circuit.
Preferably, the a/D acquisition conversion circuit includes: a differential amplifier and an AD converter; the platinum resistor outputs a resistance value signal to the differential amplifier, and the obtained analog voltage is converted into a temperature digital signal through the AD converter.
The invention also provides a CPU + FPGA-based optical fiber inertial navigation temperature control method, which comprises the following steps: step (1), an A/D acquisition conversion circuit acquires temperature information of an optical fiber inertial navigation element; the FPGA receives the temperature information acquired by the A/D acquisition and conversion circuit and performs data interaction with the CPU; step (2), the CPU carries out temperature compensation on the temperature information received by the FPGA, summarizes the temperature information of the elements after the temperature compensation, calculates the heating current needed by the corresponding elements, and divides the elements into a plurality of combinations; and (3) alternately supplying power to the plurality of combinations by the power supply so that the elements reach the specified temperature.
Preferably, the CPU calculates the algorithm temperature of each group of elements according to a set algorithm, the power supply supplies power to the first group of elements, and after the algorithm temperature is reached and the temperature is stable, the power supply supplies power to the second group of elements to make the second group of elements reach the algorithm temperature, and then the power supply continues to alternately supply power to the first group of elements and the second group of elements to make the elements reach the specified temperature.
The invention has the following remarkable advantages:
(1) the real-time performance is realized by adopting the combination of the FPGA and the CPU, the CPU makes up the algorithm deficiency of the FPGA, the FPGA makes up the time sequence of the CPU, and the FPGA and the CPU are combined to realize a rapid and accurate temperature control system.
(2) And high-precision temperature detection is realized by performing fitting compensation operation on the acquired temperature data by the CPU.
(3) The time-sharing complex control algorithm combines a plurality of gyros, an additional meter and a bracket in a single way, controls in a time-sharing way, avoids the problem of overlarge current during simultaneous heating in the traditional temperature control, and in the process, a CPU carries out real-time operation and reasonable distribution combination according to the acquired temperature data of each path of sensitive element, thereby realizing the heating effects of low power consumption, low current and high reliability.
Drawings
Fig. 1 is a schematic structural diagram of a temperature control system according to the present invention.
Fig. 2 is a schematic diagram of a time-sharing complex control algorithm.
Detailed Description
The technical solution of the present invention is further described below with reference to the accompanying drawings and examples.
With reference to fig. 1, the optical fiber inertial navigation multistage temperature composite control system based on the CPU + FPGA of the present invention is a programmable temperature control system as a whole, the combination of the CPU + FPGA can overcome the disadvantages of insufficient data processing speed of the FPGA and poor time sequence of the CPU, the two make up for each other, the FPGA is responsible for interface control, and the CPU is responsible for implementing a temperature control algorithm. The system comprises: the system comprises a plurality of optical fiber inertial navigation elements, a plurality of platinum resistors (not shown), an A/D acquisition conversion circuit 4, a plurality of power driving circuits 5, a plurality of heating sheets (not shown) for heating the elements, an FPGA, a CPU and a power supply; the elements are a top 1, a adding table 2 and a bracket 3. The components of the fiber optic inertial navigation system comprise three gyros 1, three accelerometers 2 and a support 3.
The heating plates are fixed on the elements of each top 1, each accelerometer 2, each bracket 3 and the like to provide heating temperature.
The heating plates are respectively connected with a power driving circuit 5, and the current of the power driving circuit 5 acts on the heating plates to heat the corresponding sensitive elements such as the gyroscope 1, the accelerometer 2, the bracket 3 and the like.
Each element of the optical fiber inertial navigation is also connected with a platinum resistor, the platinum resistor is a temperature sensor, and different resistance value signals are output according to the change of the environmental temperature and serve as temperature information of each element.
The A/D acquisition and conversion circuit 4 is used for acquiring temperature information provided by the platinum resistor, and specifically comprises the following steps: the A/D acquisition conversion circuit 4 comprises a differential amplifier and an AD converter; the platinum resistor outputs a resistance value signal to the differential amplifier, and the obtained analog voltage is converted into a temperature digital signal through the AD converter.
The FPGA is used for interface data interaction, receiving temperature information acquired by the A/D acquisition and conversion circuit 4, namely the temperature digital signal, storing data in the RAM, carrying out data communication with the CPU through the RAM, realizing output digital quantity (heating data) according to the algorithm of the CPU, outputting the heating data to the power driving circuit 5 through an RS422 serial port, and enabling the power driving circuit 5 to generate current with adjustable pulse width so as to control the heating temperature of the heating sheet.
The CPU is communicated with the FPGA and used for carrying out algorithm data processing on the acquired temperature information, fitting temperature drift curves in different temperature ranges according to the nonlinear characteristic of the platinum resistor (such as PT1000) generated along with temperature change, and establishing an accurate mathematical analysis relational expression to finish accurate temperature calculation.
And the CPU performs error compensation of temperature acquisition on the temperature information acquired by the A/D acquisition and conversion circuit 4 according to temperature parameters calibrated by experiments. The temperature interval is divided into three sections of curves, and corresponding temperature correction is carried out on different temperature intervals so as to improve the temperature control precision.
The CPU executes full-speed heating or full-speed refrigeration according to the fact that the difference value between the measured temperature and the set temperature is larger than 5 ℃, the heating or refrigeration speed is realized by means of digital quantity output by the FPGA, the heating current is larger when the digital quantity is larger, the heating is faster, and otherwise, the refrigeration output digital quantity is smaller, and the cooling is faster. And when the difference value of the two is within 5 ℃, the FPGA heats according to a designed PID control mode.
After temperature compensation, the CPU collects the temperature information of each element, calculates the heating current required by the corresponding element at different temperatures, and performs a plurality of combinations and time-sharing control on the elements to reduce the amplitude of the output current of the power supply.
Example 1
The method comprises the steps of carrying out optimization design on temperature control, adopting a time-sharing composite temperature control scheme, firstly, carrying out error compensation on acquired temperature data by a CPU according to temperature parameters calibrated by experiments in the aspect of temperature acquisition precision, dividing a temperature interval into three-section curves by adopting a three-section method for compensation, and carrying out corresponding temperature correction aiming at different temperature intervals so as to improve the precision of real-time temperature data and further achieve higher temperature control precision.
Time-sharing complex control algorithm: after temperature correction is carried out, the temperatures of the three-way gyroscope 1, the three-way adder-type gyroscope 2 and the support 3 are summarized, the heating current required by different temperatures of all elements is calculated in an algorithm, and the 7-way elements are combined in two ways and controlled in a time-sharing mode.
As shown in fig. 2, two combinations of 7-way elements are: the two ways of gyros 1 are divided into a first group, the one way of gyros 1, the three ways of gyroscopes 2 and the bracket 3 are divided into a second group, and the grouping principle is determined according to the current required by heating of each element, so that the currents required by the groups after combination are the same as much as possible. The current required to combine the first and second sets of the example of fig. 2 is nearly the same at each temperature segment.
And when the temperature control starts, the algorithm realizes that the power supply is controlled to supply power to the first group of element combination, the minimum heating digital quantity is output after the temperature of the algorithm is reached, the temperature control is carried out on the corresponding digital quantity output by the second group of element combination after the temperature is stabilized, and then the first group of temperature control and the second group of temperature control are continued. And circulating the two groups of combined temperature control for many times to finally reach the specified temperature point. The heating digital quantity output by the FPGA interface is realized by a CPU algorithm, the larger the heating digital quantity is, the larger the current is, the smaller the heating digital quantity is, and the smaller the current is.
According to the calculation principle, the heating digital quantity is output, the FPGA outputs heating data to the heating power driving circuit through the RS422 serial port, so that the amplitude of the output current of the power supply can be greatly reduced, the current change in the whole heating interval is more stable, the power consumption is lower, and the control precision can be improved.
In summary, according to the optical fiber inertial navigation multistage temperature composite control system and method based on the CPU + FPGA, the accuracy of temperature collection is improved by means of the CPU error compensation algorithm, the FPGA + CPU cooperate with each other to improve the real-time performance of the temperature control system, the power consumption and the working current are reduced by using the time-division multiplexing temperature control algorithm, the safety and the control accuracy of the temperature control system are improved, and the system and method are more suitable for temperature control of the optical fiber inertial navigation combination used by an aircraft.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.
Claims (6)
1. An optical fiber inertial navigation temperature control system based on a CPU + FPGA is characterized by comprising: the device comprises a plurality of optical fiber inertial navigation elements, a plurality of platinum resistors, an A/D acquisition conversion circuit, a plurality of power driving circuits, a plurality of heating sheets for heating the elements, an FPGA, a CPU and a power supply; the element comprises: three gyros, three adding tables and a bracket share 7 paths of elements;
the heating plates are respectively fixed on the elements; the heating plates are respectively connected with the power driving circuit;
the elements are also respectively connected with the platinum resistors so as to respectively output the temperature information of the elements;
the A/D acquisition and conversion circuit is used for acquiring the temperature information;
the FPGA is used for receiving the temperature information acquired by the A/D acquisition and conversion circuit, performing data interaction with the CPU and then adjusting the current generated by the power driving circuit so as to control the heating temperature of the heating plate;
after the data interaction between the CPU and the FPGA is carried out, the CPU carries out temperature compensation on temperature information received by the FPGA, the temperature information of the elements is gathered after the temperature compensation is carried out, the magnitude of heating current required by the corresponding elements is calculated, when the elements are heated, 7 paths of elements are divided into two groups, wherein two gyros are divided into a first group, one gyro and three adding tables and a support are divided into a second group, the CPU calculates the algorithm temperature of each group of elements according to a set algorithm, a power supply firstly supplies power to the first group of elements, and then supplies power to the second group of elements after the algorithm temperature is reached and the temperature is stable, so that the second group of elements reaches the algorithm temperature, and then the first group of elements and the second group of elements are continuously supplied with power alternately, so that the elements reach the designated temperature.
2. The CPU + FPGA-based fiber optic inertial navigation temperature control system according to claim 1, wherein the temperature compensation comprises: and the CPU performs error compensation of the acquired temperature on the temperature information acquired by the A/D acquisition and conversion circuit according to the temperature parameter calibrated by the experiment.
3. The CPU + FPGA-based fiber optic inertial navigation temperature control system according to claim 2, wherein the temperature compensation further comprises: the CPU divides the temperature interval into three sections of curves, and corresponding temperature correction is carried out aiming at different temperature intervals so as to improve the temperature control precision.
4. The system of claim 1, wherein the system further comprises: RS422 serial port; and after the FPGA and the CPU carry out data interaction, heating data are obtained, and the heating data are output to the power driving circuit through an RS422 serial port so as to adjust the current generated by the power driving circuit.
5. The CPU + FPGA-based fiber optic inertial navigation temperature control system according to claim 1, wherein the A/D acquisition and conversion circuit comprises: a differential amplifier and an AD converter; the platinum resistor outputs a resistance value signal to the differential amplifier, and the obtained analog voltage is converted into a temperature digital signal through the AD converter.
6. A method for controlling temperature of optical fiber inertial navigation based on CPU + FPGA is characterized by comprising the following steps:
the method comprises the following steps that (1) an A/D acquisition conversion circuit acquires temperature information of an optical fiber inertial navigation element; the FPGA receives the temperature information acquired by the A/D acquisition and conversion circuit and performs data interaction with the CPU;
step (2), the CPU carries out temperature compensation on the temperature information received by the FPGA, summarizes the temperature information of the elements after temperature compensation, calculates the magnitude of heating current required by the corresponding elements, and divides the elements into two groups;
and (3) the CPU calculates the algorithm temperature of each group of elements according to a set algorithm, the power supply supplies power to the first group of elements, the second group of elements is supplied with power after the algorithm temperature is reached and the temperature is stable, the second group of elements is enabled to reach the algorithm temperature, and the first group of elements and the second group of elements are continuously supplied with power alternately, so that the elements reach the specified temperature.
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| US20140215096A1 (en) * | 2013-01-28 | 2014-07-31 | Ge Intelligent Platforms, Inc. | Method and system for a configurable hardware module |
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