CN110896349B - Secret key safety device - Google Patents
Secret key safety device Download PDFInfo
- Publication number
- CN110896349B CN110896349B CN201811069330.0A CN201811069330A CN110896349B CN 110896349 B CN110896349 B CN 110896349B CN 201811069330 A CN201811069330 A CN 201811069330A CN 110896349 B CN110896349 B CN 110896349B
- Authority
- CN
- China
- Prior art keywords
- chip
- signal
- input pin
- pin
- wake
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0894—Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Storage Device Security (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
The invention discloses a key safety device, which comprises a first chip and a second chip, wherein the first chip comprises a first input pin, the second chip comprises a first output pin, and the first input pin is connected with the first output pin; when the input signal of the first input pin comprises a first preset wake-up signal, the first chip enters a communication mode and receives a data signal sent by the second chip through the first input pin. According to the key safety device provided by the invention, the first chip receives the wake-up signal and the data signal through one pin, so that the number of the pins on the chip is reduced, and chip resources are saved.
Description
Technical Field
The invention relates to the field of communication, in particular to secret key safety equipment.
Background
At present, key security devices are widely used for communication between terminal devices, but the existing key security devices have the following defects: communication between chips in the key security device can be realized only by connecting a plurality of pins, for example, a wake-up pin, a data receiving pin, a data sending pin, and the like are generally required to be arranged on each chip, that is, more chip pins are required to be used, which causes waste of chip resources.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide a key security device to solve the problem that communication between chips in the existing key security device can be realized only by a plurality of chip pins.
The purpose of the invention is realized by adopting the following technical scheme:
a key security device comprises a first chip and a second chip, wherein the first chip comprises a first input pin, the second chip comprises a first output pin, and the first input pin is connected with the first output pin;
when the input signal of the first input pin comprises a first preset wake-up signal, the first chip enters a communication mode and receives a data signal sent by the second chip through the first input pin.
Further, the first chip entering a communication mode includes: the first chip exits the low power mode and configures the first input pin for a data reception function.
Further, the first input pin is configured as a wake-up function when the first chip enters a low power mode.
Further, after the first chip receives at least one first preset synchronization signal through the first input pin, the first chip receives a data signal sent by the second chip through the first input pin, and stores data information obtained according to the data signal into a first data buffer area.
Further, the first preset synchronization signal is the same as the first preset wake-up signal.
Furthermore, the first chip and the second chip are security chips or bluetooth chips or fingerprint chips or MCU chips.
Further, the first chip further comprises a second output pin, the second chip further comprises a second input pin, and the second input pin is connected with the second output pin;
and when the input signal of the second input pin comprises a second preset wake-up signal, the second chip enters a communication mode and receives the data signal sent by the first chip through the second input pin.
Further, the second chip entering the communication mode includes: the second chip exits the low power mode and configures the second input pin for a data reception function.
Further, when the second chip enters a low power consumption mode, the second input pin is configured to be a wake-up function.
Further, after the second chip receives at least one second preset synchronization signal through the second input pin, the second chip receives a data signal sent by the first chip through the second input pin, and stores data information obtained according to the data signal into a second data buffer area.
Compared with the prior art, the invention has the beneficial effects that: in the key security device, a first chip comprises a first input pin, a second chip comprises a first output pin, the first input pin is connected with the first output pin, when an input signal of the first input pin comprises a first preset wake-up signal, the first chip enters a communication mode, receives a data signal sent by the second chip through the first input pin, and receives the preset wake-up signal and the data signal through one pin, so that the number of pins required by chip communication is reduced, and chip resources are saved.
Drawings
Fig. 1 is a schematic diagram of a key security device according to an embodiment of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and the detailed description, and it should be noted that any combination of the embodiments or technical features described below can be used to form a new embodiment without conflict.
As shown in fig. 1, the key security device provided in the embodiment of the present invention includes a first chip 1 and a second chip 2, where the first chip 1 includes a first input pin 11, the second chip 2 includes a first output pin 21, and the first input pin 11 is connected to the first output pin 21; when the input signal of the first input pin 11 includes a first preset wake-up signal, the first chip 1 enters a communication mode, and receives a data signal sent by the second chip 2 through the first input pin 11. The first chip 1 and the second chip 2 both store programs, and the programs are used for executing corresponding operations according to received instructions. For example, the first chip 1 is a bluetooth chip, the second chip 2 is an MCU chip, the MCU chip sends a preset bluetooth wake-up signal and a data signal to the bluetooth chip through the first output pin 21, the first input pin 11 on the bluetooth chip detects the input signal, and if the input signal includes the preset bluetooth wake-up signal, the bluetooth chip enters a communication mode and receives the data signal sent by the MCU chip through the first input pin 11. The first chip 1 receives the wake-up signal and the data signal through one pin, and data communication can be achieved without additionally adding pins, so that chip resources are saved.
Preferably, the first chip 1 and the second chip 2 may also be a security chip or a bluetooth chip or a fingerprint chip or an MCU chip.
Preferably, the entering of the first chip 1 into the communication mode includes: the first chip 1 exits the low power mode and configures the first input pin 11 as a data reception function. When the first chip 1 enters the low power mode, the first input pin 11 is configured as a wake-up function. Specifically, before the first chip 1 enters the low power consumption mode, the first input pin 11 is configured as a wake-up function, so that when the first chip 1 is in the low power consumption mode, the first input pin 11 configured as the wake-up function may receive a first preset wake-up signal, and when the first input pin 11 receives the first preset wake-up signal, the first chip 1 exits the low power consumption mode, and the first input pin 11 is configured as a data receiving function.
Preferably, after the first chip 1 receives at least one first preset synchronization signal through the first input pin 11, the first chip 1 receives a data signal sent by the second chip 2 through the first input pin 11, and stores data information obtained according to the data signal into the first data buffer. Specifically, the first preset wake-up signal and the data signal may be in the same input signal, a first preset synchronization signal is between the first preset wake-up signal and the data signal, the first input pin 11 receives the first preset wake-up signal, and after the first chip 11 is configured in the wake-up state, the first input pin 11 receives the first preset synchronization signal, then receives the data signal, and stores data information obtained according to the data signal in the first data buffer. For example, in one embodiment, the input signal may be FF00+000000+ xxxxxxxxxxxx, where FF00 is a first preset wake-up signal, 000000 is a first preset synchronization signal, and xxxxxxxxxx is a data signal. The first predetermined synchronization signal may also be a predetermined time interval, which is set to allow the first chip 1 to wake up and then have enough time to correctly receive the data signal.
It can be understood that the first preset wake-up signal and the data signal may not be in the same input signal, for example, the second chip 2 may first send the preset first wake-up signal through the first output pin 21 to wake up the first chip 1, and after the first chip 1 normally works for a period of time, if the second chip 2 needs to send data to the first chip 1, the first preset synchronization signal is first sent, and then the first output pin 21 sends the data signal to the first input pin 11 of the first chip 1.
Preferably, the first preset synchronization signal may be the same as the first preset wake-up signal, that is, after the first input pin 11 receives the first preset wake-up signal and is woken up, the first input pin continues to receive the plurality of first preset wake-up signals, and then receives the data signal. The first preset wake-up signal includes a level transition signal, which may be a rising edge signal, for example, and if the rising edge signal is detected by the first input pin 11, the first chip 1 is configured to be in a wake-up state.
Preferably, the first chip 1 further includes a second output pin 12, the second chip 2 further includes a second input pin 22, and the second input pin 22 is connected to the second output pin 12; the first chip 1 detects instruction information of the terminal equipment; the first chip 1 is further configured to transmit a preset wake-up signal and a data signal to the second chip 2 through the second output pin 12 when a preset data transmission condition is satisfied. When the input signal of the second input pin 22 includes a second preset wake-up signal, the second chip 2 enters a communication mode, and receives the data signal sent by the first chip 1 through the second input pin 22. For example, the first chip 1 is a bluetooth chip, the second chip 2 is an MCU chip, the bluetooth chip sends a preset MCU wake-up signal and a data signal through the second output pin 12 according to a data sending command of the terminal device, the second input pin 22 on the MCU chip receives the preset MCU wake-up signal and the data signal, and if the input signal includes the second preset wake-up signal, the second chip 2 enters a communication mode and receives the data signal sent by the bluetooth chip through the second input pin 22. The first chip 1 receives the wake-up signal and the data signal through one pin, and sends the wake-up signal and the data signal to the second chip 2 through one pin, and the second chip 2 receives the wake-up signal and the data signal through one pin, so that data communication can be realized without additionally adding pins, and chip resources are saved.
Preferably, the entering of the second chip 2 into the communication mode includes: the second chip 2 exits the low power mode and configures the second input pin 22 to a data receiving function. When the second chip 2 enters the low power consumption mode, the second input pin 22 is configured as a wake-up function, and when the second input pin 22 configured as the wake-up function receives a preset second wake-up signal, the second chip 2 exits the low power consumption mode, and configures the second input pin 22 as a data receiving function.
Preferably, after the second chip 2 receives at least one second preset synchronization signal through the second input pin 22, the second chip 2 receives the data signal sent by the first chip 1 through the second input pin 22, and stores data information obtained according to the data signal into the second data buffer. Specifically, the second preset wake-up signal and the data signal may be in the same input signal, a second preset synchronization signal is between the second preset wake-up signal and the data signal, after the second output pin 12 sends the second preset wake-up signal, a plurality of second preset synchronization signals are sent, then the data signal is sent, and data information obtained by the data signal is stored in the second data buffer, and the second preset synchronization signal may also be a preset time interval. It can be understood that the second preset wake-up signal and the data signal may not be in the same input signal, for example, the first chip 1 may first send the second preset wake-up signal through the second output pin 12 to wake up the second chip 2, and after the second chip 2 works for a period of time, if the first chip 1 needs to send data to the second chip 2, the second preset synchronization signal is sent first, and then the second output pin 12 sends the second preset synchronization signal and the data signal to the second chip 2.
Preferably, the second preset synchronization signal may be the same as the second preset wake-up signal, that is, after the first chip 1 sends the second preset wake-up signal through the second output pin 12, the plurality of second preset wake-up signals continue to be sent, and then the data signal is sent. The second preset wake-up signal includes a level transition signal, which may be a rising edge signal, for example. For the key security device, two chips which are communicated with each other are respectively provided with two pins, so that awakening and data transmission between the chips can be realized.
According to the key security device provided by the invention, a first chip 1 comprises a first input pin 11, a second chip 2 comprises a first output pin 21, the first input pin 11 is connected with the first output pin 21, and the first chip 1 is used for detecting an input signal on the first input pin 11; if the input signal is detected to include the first preset wake-up signal, the first chip 1 enters a communication mode and is configured to receive the data signal sent by the second chip 2 through the first input pin 11 and receive the wake-up signal and the data signal through one pin, so that the number of pins on the chip is reduced, and chip resources are saved.
It should be understood that the input pins described in the present invention refer to pins having at least an input function, and also include pins having an input/output function. Similarly, the output pin refers to a pin having at least an output function, and also includes a pin having an input/output function. The pin with the input and output functions can be a General Purpose Input and Output (GPIO) pin.
It can be understood that the key security device described in the present invention may be, for example, a bluetooth shield, a smart terminal supporting a bluetooth function, a mobile terminal supporting a bluetooth function, or the like.
The above embodiments are only preferred embodiments of the present invention, and the scope of the present invention should not be limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are intended to be covered by the claims.
Claims (9)
1. A key security device is characterized by comprising a first chip and a second chip, wherein the first chip comprises a first input pin, the second chip comprises a first output pin, and the first input pin is connected with the first output pin;
when the input signal of the first input pin comprises a first preset wake-up signal, the first chip enters a communication mode and receives a data signal sent by the second chip through the first input pin;
the first preset wake-up signal and the data signal are in the same input signal, at least one first preset synchronous signal is further arranged between the first preset wake-up signal and the data signal, after the first chip receives the at least one first preset synchronous signal through the first input pin, the first chip receives the data signal sent by the second chip through the first input pin, and data information obtained according to the data signal is stored in a first data buffer area;
the preset synchronization signal is a preset time interval.
2. The key security device of claim 1, wherein the first chip entering a communication mode comprises: the first chip exits the low power mode and configures the first input pin for a data reception function.
3. The key security device of claim 2, wherein the first input pin is configured as a wake-up function when the first chip enters a low power mode.
4. The key security device of claim 1, wherein the first predetermined synchronization signal is the same as the first predetermined wake-up signal.
5. The key security device of claim 1, wherein the first chip and the second chip are security chips or bluetooth chips or fingerprint chips or MCU chips.
6. The key security device of claim 1, wherein the first chip further comprises a second output pin, wherein the second chip further comprises a second input pin, and wherein the second input pin is connected to the second output pin;
and when the input signal of the second input pin comprises a second preset wake-up signal, the second chip enters a communication mode and receives the data signal sent by the first chip through the second input pin.
7. The key security device of claim 6, wherein the second chip entering a communication mode comprises: the second chip exits the low power mode and configures the second input pin for a data reception function.
8. The key security device of claim 7, wherein the second input pin is configured to wake up when the second chip enters a low power mode.
9. The key security device according to claim 6, wherein after the second chip receives at least one second predetermined synchronization signal through the second input pin, the second chip receives a data signal sent by the first chip through the second input pin, and stores data information obtained according to the data signal in a second data buffer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811069330.0A CN110896349B (en) | 2018-09-13 | 2018-09-13 | Secret key safety device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811069330.0A CN110896349B (en) | 2018-09-13 | 2018-09-13 | Secret key safety device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110896349A CN110896349A (en) | 2020-03-20 |
| CN110896349B true CN110896349B (en) | 2023-01-13 |
Family
ID=69785379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811069330.0A Active CN110896349B (en) | 2018-09-13 | 2018-09-13 | Secret key safety device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110896349B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104125315A (en) * | 2013-04-23 | 2014-10-29 | 深圳富泰宏精密工业有限公司 | Time sequence control system and method |
| CN106301712A (en) * | 2015-06-05 | 2017-01-04 | 国民技术股份有限公司 | A kind of synchronized communication method and application apparatus, system |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090204834A1 (en) * | 2008-02-11 | 2009-08-13 | Nvidia Corporation | System and method for using inputs as wake signals |
| CN102478940A (en) * | 2010-11-24 | 2012-05-30 | 英业达股份有限公司 | Control circuit for computer system multiplexing pins |
-
2018
- 2018-09-13 CN CN201811069330.0A patent/CN110896349B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104125315A (en) * | 2013-04-23 | 2014-10-29 | 深圳富泰宏精密工业有限公司 | Time sequence control system and method |
| CN106301712A (en) * | 2015-06-05 | 2017-01-04 | 国民技术股份有限公司 | A kind of synchronized communication method and application apparatus, system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110896349A (en) | 2020-03-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102693567B (en) | Coding-decoding method based on communication of access control system | |
| US20130254571A1 (en) | Power management method and apparatus for network access module | |
| US20130173836A1 (en) | Usb key device and method for realizing intelligent card communication using usb interface | |
| EP1880350A4 (en) | Contactless type integrated circuit card and method for communicating data by multiprotocol | |
| US11062634B2 (en) | Drive control method, assembly and display device | |
| JPH08202469A (en) | Microcontroller unit equipped with universal asychronous transmitting and receiving circuit | |
| CN111488305B (en) | Method and system for realizing rapid communication of security chip | |
| JP2019197598A (en) | Systems and methods for low voltage secure digital (sd) interfaces | |
| CN103558907B (en) | Electronic device and method for reducing power consumption of electronic device | |
| CN110896349B (en) | Secret key safety device | |
| US10095644B2 (en) | Data transfer device and wireless communication circuit | |
| CN113347691B (en) | Data transmission method and device | |
| US11157290B2 (en) | Method and circuit for waking up I2C device | |
| CN104123512A (en) | Method and device for switching between intelligent secrete key equipment modes | |
| EP2782400A1 (en) | NFC controller architecture for simultaneous emulation of multiple NFC technologies in one NFC listen device | |
| CN103702356A (en) | TDD (time division duplexing) system-based fault diagnosis device | |
| CN103885910A (en) | Method and system for multiple devices for IIC communication in main mode | |
| US20190051078A1 (en) | Method of Achieving Free-pairing Wireless Door Lock Based on DIP Switch, a Wireless Door Lock and a Communication Method for the Wireless Door Lock | |
| KR20110128730A (en) | Apparatus and method for transmitting and receiving for the body implantable medical devices | |
| CN210804414U (en) | Circuit with reusable communication interface | |
| CN109711519B (en) | Financial chip-based peripheral expansion method and financial card | |
| US20100057961A1 (en) | Network device and data transmitting method | |
| CN102955545A (en) | Computer | |
| CN201118577Y (en) | Wireless transparent transmission device | |
| CN103731888A (en) | Wireless communication method, device and system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |