CN110890410A - Array substrate, display panel and display device - Google Patents

Array substrate, display panel and display device Download PDF

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Publication number
CN110890410A
CN110890410A CN201911202647.1A CN201911202647A CN110890410A CN 110890410 A CN110890410 A CN 110890410A CN 201911202647 A CN201911202647 A CN 201911202647A CN 110890410 A CN110890410 A CN 110890410A
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display data
data line
display
data lines
test
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CN201911202647.1A
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CN110890410B (en
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周炟
张陶然
莫再隆
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention relates to the technical field of display, and provides an array substrate, a display panel and a display device. The array substrate comprises a display area, a test area, a binding area, a cutting line, a plurality of test data lines, a plurality of one-way conduction switches, a plurality of first display data lines and a plurality of second display data lines; the plurality of first display data lines and the plurality of second display data lines are arranged in parallel at intervals one by one and extend out of the display area to extend to the cutting line through the binding area; the plurality of test data lines are connected to the test area, one of the test data lines is in conductive connection with the plurality of first display data lines, and the other test data line is in conductive connection with the plurality of second display data lines; the plurality of one-way conduction switches are arranged on the first display data line and the second display data line in one-to-one correspondence, and the one-way conduction switches can prevent current from flowing from the test area to the binding area. The array substrate can avoid abnormal display caused by short circuit, improve yield and reduce cost.

Description

Array substrate, display panel and display device
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel provided with the array substrate and a display device provided with the display panel.
Background
Laser cutting is a widely used production process for flexible OLED (Organic Light-Emitting Diode) panels, and compared with physical cutting, the laser cutting method can effectively improve cutting accuracy, avoid warpage of the flexible PI rubber substrate caused by external force, reduce crack reliability risk caused by physical collision, and the like.
However, there are a lot of carbide residues inevitably existing in the PI (polyimide) substrate cut by picosecond laser, and a small amount of carbide residues also exist in femtosecond laser cutting, which causes electrical short circuit of adjacent wires after cutting, further causes abnormal display of the panel at the ET (Engineering debug — design verification) stage, and causes a reduction in yield in a factory.
Therefore, it is necessary to research a new array substrate, a display panel mounted with the array substrate, and a display device mounted with the display panel.
The above information disclosed in this background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not constitute prior art that is already known to a person of ordinary skill in the art.
Disclosure of Invention
The present invention is directed to overcome the defect of low yield in the factory in the prior art, and provides an array substrate with high yield in the factory, a display panel mounted with the array substrate, and a display device mounted with the display panel.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
According to an aspect of the present disclosure, there is provided an array substrate including a display region, a test region, a bonding region, and a cutting line, the array substrate further including:
the plurality of first display data lines and the plurality of second display data lines are arranged in parallel at intervals, extend out of the display area, extend through the binding area and extend to the cutting line;
a plurality of test data lines connected to the test region, wherein one of the test data lines is in conductive connection with the plurality of first display data lines, and the other test data line is in conductive connection with the plurality of second display data lines;
and the unidirectional conduction switches are arranged on the first display data line and the second display data line in a one-to-one correspondence manner, and can prevent current from flowing from the test area to the binding area.
In an exemplary embodiment of the present disclosure, the unidirectional conducting switch is a thin film transistor switch.
In an exemplary embodiment of the present disclosure, the gate of the thin film transistor switch is connected to the drain thereof.
In an exemplary embodiment of the present disclosure, a gate of the thin film transistor switch is connected to the test area so that a test circuit of the test area provides a switching voltage to the thin film transistor switch.
In an exemplary embodiment of the present disclosure, the unidirectional conducting switch is a diode.
In an exemplary embodiment of the present disclosure, the unidirectional conductive switch is located at a side of a connection point of the test data line and the first and second display data lines, which is close to the bonding region.
In an exemplary embodiment of the present disclosure, the first display data line is a green display data line, and the second display data line is a red or blue display data line.
In an exemplary embodiment of the present disclosure, the first display data line is a red display data line, and the second display data line is a blue display data line.
According to an aspect of the present disclosure, there is provided a display panel including:
the array substrate as set forth in any one of the above.
According to an aspect of the present disclosure, there is provided a display device including:
the display panel of any one of the above.
According to the technical scheme, the invention has at least one of the following advantages and positive effects:
according to the array substrate, the plurality of first display data lines and the plurality of second display data lines are arranged in parallel at intervals one by one, and extend out of the display area, pass through the binding area and extend to the cutting line; a plurality of test data lines are arranged in parallel in a spacing area between the display area and the binding area, wherein one of the test data lines is in conductive connection with the plurality of first display data lines, and the other test data line is in conductive connection with the plurality of second display data lines; the plurality of unidirectional conducting switches are arranged on the first display data line and the second display data line in a one-to-one correspondence mode and are located between the test data line and the binding area, and the unidirectional conducting switches can prevent current from flowing from the test area to the binding area. On one hand, after laser cutting, even if the adjacent first display data line and the second display data line are short-circuited, in a design verification stage, the current is prevented from flowing from the test area to the binding area through the one-way conduction switch, the current can only flow from the test area to the display area, the data signal of the first display data line cannot reach the second display data line through the short-circuit position, and of course, the data signal of the second display data line cannot reach the first display data line through the short-circuit position, so that abnormal display caused by short circuit can be avoided, and the yield in a factory is improved. On the other hand, on the basis of solving the display abnormality caused by the short circuit, the laser cutting process with higher cost can be replaced by the laser cutting process with lower cost, so that the cost is reduced and the productivity is improved.
Drawings
The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
Fig. 1 is a schematic structural view of an array substrate in the related art;
FIG. 2 is a schematic diagram showing the input signals, output signals and display conditions in the case where the data lines are not short-circuited;
FIG. 3 is a schematic diagram showing the input signals, output signals and display status of a data line with individual short circuits;
FIG. 4 is a schematic structural diagram of an array substrate according to an embodiment of the invention;
fig. 5 is a schematic structural diagram of another embodiment of the array substrate of the invention.
The reference numerals of the main elements in the figures are explained as follows:
1. a display area; 2. a test zone; 3. a binding region; 4. cutting a line; 5. a first display data line; 6. a second display data line; 7. testing the data line; 8. a one-way conduction switch; 9. short-circuit lines;
VI, inputting signals; VO, output signal.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus their detailed description will be omitted.
Referring to fig. 1, a schematic structural diagram of an array substrate in the related art is shown. The array substrate may include a display area 1, a test area 2, a bonding area 3, and a cutting line 4.
The array substrate may further include a plurality of first display data lines 5 and a plurality of second display data lines 6, and the plurality of first display data lines 5 and the plurality of second display data lines 6 extend from the display region 1 to the cutting lines 4 through the bonding region 3. The first display data lines 5 may be red display data lines, the second display data lines 6 may be blue display data lines, the red display data lines and the blue display data lines are arranged one by one at intervals and side by side, that is, one blue display data line is arranged between two adjacent red display data lines, and one red display data line is arranged between two adjacent blue display data lines, that is, one red display data line, one blue display data line, one red display data line, and one blue display data line, which are arranged in a circulating manner.
The display region 1 and the binding region 3 are spaced apart to form a spacer region. A plurality of test data lines 7 are disposed at the spacer region, the plurality of test data lines 7 are connected to the test region 2, and the plurality of test data lines 7 are also arranged side by side. The plurality of test data lines 7 may include one red test data line 7, one green test data line 7, and one blue test data line 7. One of the test data lines 7 is in conductive connection with the plurality of first display data lines 5, and the other test data line 7 is in conductive connection with the plurality of second display data lines 6; namely, the red test data line 7 is connected with a plurality of red display data lines in a conduction manner, the blue test data line 7 is connected with a plurality of blue display data lines in a conduction manner, and the green test data line 7 is connected with a plurality of green display data lines in a conduction manner.
A cutting line 4 is arranged on one side of the binding region 3 far away from the display region 1, the cutting line 4 is a line which is formed during laser cutting, and carbide remained after the laser cutting causes electrical short circuit of adjacent cut data lines, namely, the blue display data line and the red display data line may be short-circuited.
Referring to the schematic diagram of the input signal, the output signal and the display condition when the display data line is not short-circuited shown in fig. 2, the input signal vi (voltage input) is a rectangular wave, and the output signal vo (voltage output) is not affected and is normally output and displayed.
Referring to the schematic diagram of the input signal, the output signal and the display condition when the display data lines are individually short-circuited, a short-circuit line 9 is provided between the adjacent first display data line 5 and the second display data line 6 to short-circuit the first display data line 5 and the second display data line 6, the input signal vi (voltage input) is a rectangular wave, the output signal vo (voltage output) is affected, the output is abnormal, and the display is not normal. Specifically, the first display data line with low voltage inputAfter the display data line 5 is short-circuited with the second display data line 6, the first display data line 5 which is input with the low voltage should output the low voltage but output the high voltage, so that the display is not normal and a dark line appears. For example, in a monochrome blue picture, the red data voltage R written by the test circuit of the test zone 2VdataIs 6V, blue data voltage BVdata2V, blue data voltage B at the position of short circuitVdataIt approaches 6V, and finally forms dark lines under a monochromatic blue picture, resulting in a reduction in yield.
The invention firstly provides an array substrate, and the structure of the array substrate is schematically shown in figure 4; the array substrate comprises a display area 1, a test area 2, a binding area 3 and a cutting line 4, and the array substrate can comprise a plurality of test data lines 7, a plurality of one-way conduction switches 8, a plurality of first display data lines 5 and a plurality of second display data lines 6; the plurality of first display data lines 5 and the plurality of second display data lines 6 are arranged in parallel at intervals, and extend out of the display area 1, pass through the binding area 3 and extend to the cutting line 4; a plurality of test data lines 7 are arranged in parallel in a spacing area between the display area 1 and the binding area 3, the plurality of test data lines 7 are connected to the test area 2, one of the test data lines 7 is in conductive connection with the plurality of first display data lines 5, and the other test data line 7 is in conductive connection with the plurality of second display data lines 6; the plurality of unidirectional conducting switches 8 are arranged on the first display data line 5 and the second display data line 6 in a one-to-one correspondence manner, and the unidirectional conducting switches 8 can prevent current from flowing from the test area 2 to the binding area 3.
In the present exemplary embodiment, the bonding region 3 of the array substrate may be provided with two COF bonding regions. The second COF binding region is explained as an example.
A spacer region is formed between the display region 1 and the second COF bonding region at an interval. A plurality of test data lines 7 are disposed at the spacer region, the plurality of test data lines 7 are connected to the test region 2, and the plurality of test data lines 7 are also arranged side by side. The plurality of test data lines 7 may include one red test data line 7, one green test data line 7, and one blue test data line 7. One of the test data lines 7 is in conductive connection with the plurality of first display data lines 5, and the other test data line 7 is in conductive connection with the plurality of second display data lines 6; namely, the red test data line 7 is connected with a plurality of red display data lines in a conduction manner, and the blue test data line 7 is connected with a plurality of blue display data lines in a conduction manner.
The array substrate may further include a plurality of first display data lines 5 and a plurality of second display data lines 6, the plurality of first display data lines 5 and the plurality of second display data lines 6 extending from the display region 1 to the cutting lines 4 through the second COF bonding regions. The first display data lines 5 may be red display data lines, the second display data lines 6 may be blue display data lines, the red display data lines and the blue display data lines are arranged one by one at intervals and side by side, that is, one blue display data line is arranged between two adjacent red display data lines, and one red display data line is arranged between two adjacent blue display data lines, that is, one red display data line, one blue display data line, one red display data line, and one blue display data line, which are arranged in a circulating manner.
A cutting line 4 is arranged on one side of the second COF bonding region, which is far away from the display region 1, the cutting line 4 is a circuit which is formed during laser cutting, and carbide remained after the laser cutting causes electrical short circuit of adjacent cut data lines, that is, the blue display data line and the red display data line may be short-circuited.
In the present exemplary embodiment, the plurality of unidirectional conducting switches 8 are disposed on the first display data lines 5 and the second display data lines 6 in a one-to-one correspondence manner, that is, one unidirectional conducting switch 8 is disposed on each of the first display data lines 5 and each of the second display data lines 6. The unidirectional conducting switch 8 can prevent the current from flowing from the test area 2 to the second COF binding area, and the unidirectional conducting switch 8 is unidirectionally conducting from the second COF binding area to the display area 1.
The unidirectional conducting switch 8 is positioned at one side of the connection point of the test data line 7 and the first display data line 5 and the second display data line 6, which is close to the binding region 3. In other words: the unidirectional conducting switch 8 arranged on the first display data line 5 is positioned at one side of the connection point of the test data line 7 and the first display data line 5, which is close to the second COF binding region, and the unidirectional conducting switch 8 arranged on the second display data line 6 is positioned at one side of the connection point of the test data line 7 and the second display data line 6, which is close to the second COF binding region. In the present exemplary embodiment, the plurality of unidirectional conductive switches 8 are each located at a spaced space formed between the test data line 7 adjacent to the second COF bonding region and the second COF bonding region. Of course, in other exemplary embodiments of the present invention, the one-way conduction switch 8 may be located between two adjacent test data lines 7.
In the present exemplary embodiment, the unidirectional conducting switch 8 is a thin film transistor switch, which may be a P-type thin film transistor switch. And the gate of the tft switch is connected to the drain thereof, that is, the gate of the tft switch disposed on the first display data line 5 is connected to the side of the first display data line 5 close to the test data line 7, and the gate of the tft switch disposed on the second display data line 6 is connected to the side of the second display data line 6 close to the test data line 7. This connects the drain and gate of the tft switch such that Vth <0, Vgs <0, Vd ═ Vg, | Vds | > | Vgs-Vth | of the tft switch, i.e., the tft switch normally operates in the saturation region at all times. The P-type thin film transistor switch is switched on at a low level and switched off at a high level. In the design verification stage, power is supplied through the test area 2, the grid of the P-type thin film transistor switch is always in a high level and cannot be conducted, and the current of the test area 2 cannot flow to the binding area 3; in the production stage, the power is supplied through the binding region 3, and the grid of the P-type thin film transistor switch is always in a low level and can be conducted.
Of course, in other exemplary embodiments of the present invention, the gate of the tft switch may be connected to the test area 2, and the tft switch may be provided with a switching voltage by a test circuit in the test area 2. The unidirectional conducting switch 8 may also be arranged as a diode. The diode is also unidirectionally conducted from the second COF bonding region 3 to the display region 1.
The bonding region 3 of the array substrate may further be provided with a COF bonding region. In the case of only one COF bonding region, the first display data line 5 may be a green display data line, and the second display data line 6 may be a red or blue display data line.
In addition, refer to the schematic structural diagram of another embodiment of the array substrate of the present invention shown in fig. 5; this example embodiment differs from the previous example embodiment in that: the thin film transistor switch is an N-type thin film transistor switch. In this case, the gate of the tft switch is connected to the drain thereof, that is, the gate of the tft switch disposed on the first display data line 5 is connected to the side of the first display data line 5 near the bonding region 3, and the gate of the tft switch disposed on the second display data line 6 is connected to the side of the second display data line 6 near the bonding region 3. This connects the drain and gate of the thin film transistor switch. The N-type thin film transistor switch is switched on at a high level and switched off at a low level. In the design verification stage, power is supplied through the test area 2, the grid electrode of the N-type thin film transistor switch is always in a low level and cannot be conducted, and the current of the test area 2 cannot flow to the binding area 3; in the production stage, the gate of the N-type tft switch may be high and can be turned on by supplying power through the bonding region 3.
After the laser cutting, even if the first display data line 5 and the second display data line 6 adjacent to each other are short-circuited, in the design verification stage, the unidirectional conducting switch 8 prevents the current from flowing from the test area 2 to the bonding area 3, the current can only flow from the test area 2 to the display area 1, the data signal of the first display data line 5 cannot reach the second display data line 6 through the short-circuited position, and of course, the data signal of the second display data line 6 cannot reach the first display data line 5 through the short-circuited position, so that the abnormal display caused by the short circuit can be avoided, and the yield in a factory can be improved.
Microsecond laser cutting, on the other hand, pulse duration 10-6Second, the most carbides, the most damages and the lowest cost; pulse duration for nanosecond laser cutting 10-9Second, more carbides, larger damage and lower cost; pulse of picosecond laser cuttingDuration 10-12Second, the carbide is less, the damage is less, and the cost is moderate; pulse duration 10 for femtosecond laser cutting-15Second, there is little heat transfer, minimal carbides and damage, but the highest cost. Picosecond laser cutting can meet the cutting requirement of the flexible OLED panel, and only a large amount of residual carbide exists; the femtosecond laser cutting is used for replacing picosecond laser cutting to reduce residual carbide, so that the cost is high; on the basis of solving the display abnormity caused by short circuit, the array substrate does not need to replace a picosecond laser cutting process with lower cost by a femtosecond laser cutting process with higher cost during laser cutting, so that the cost can be reduced and the productivity can be improved.
Furthermore, the invention also provides a display panel, which comprises the array substrate. The specific structure of the array substrate has been described in detail above, and therefore, the detailed description thereof is omitted.
Furthermore, the invention also provides a display device, which comprises the display panel. The display panel comprises the array substrate. The specific structure of the array substrate has been described in detail above, and therefore, the detailed description thereof is omitted.
The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments, and the features discussed in connection with the embodiments are interchangeable, if possible. In the above description, numerous specific details are provided to give a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the invention.
Although relative terms, such as "upper" and "lower," may be used in this specification to describe one element of an icon relative to another, these terms are used in this specification for convenience only, e.g., in accordance with the orientation of the examples described in the figures. It will be appreciated that if the device of the icon were turned upside down, the element described as "upper" would become the element "lower". When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via another structure.
In this specification, the terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. other than the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and are not limiting on the number of their objects.
It is to be understood that the invention is not limited in its application to the details of construction and the arrangement of components set forth in the description. The invention is capable of other embodiments and of being practiced and carried out in various ways. The foregoing variations and modifications fall within the scope of the present invention. It will be understood that the invention disclosed and defined in this specification extends to all alternative combinations of two or more of the individual features mentioned or evident from the text and/or drawings. All of these different combinations constitute alternative aspects of the present invention. The embodiments described in this specification illustrate the best mode known for carrying out the invention and will enable those skilled in the art to utilize the invention.

Claims (10)

1. The array substrate comprises a display area, a test area, a binding area and a cutting line, and is characterized by further comprising:
the plurality of first display data lines and the plurality of second display data lines are arranged in parallel at intervals, extend out of the display area, extend through the binding area and extend to the cutting line;
a plurality of test data lines connected to the test region, wherein one of the test data lines is in conductive connection with the plurality of first display data lines, and the other test data line is in conductive connection with the plurality of second display data lines;
and the unidirectional conduction switches are arranged on the first display data line and the second display data line in a one-to-one correspondence manner, and can prevent current from flowing from the test area to the binding area.
2. The array substrate of claim 1, wherein the unidirectional conducting switch is a thin film transistor switch.
3. The array substrate of claim 2, wherein the gate of the thin film transistor switch is connected to the drain thereof.
4. The array substrate of claim 2, wherein the gate of the thin film transistor switch is connected to the test area such that a test circuit of the test area provides a switching voltage to the thin film transistor switch.
5. The array substrate of claim 1, wherein the unidirectional conducting switch is a diode.
6. The array substrate of claim 1, wherein the unidirectional conducting switch is located on a side of a connection point of the test data line and the first and second display data lines, which is close to the bonding region.
7. The array substrate of claim 1, wherein the first display data line is a green display data line, and the second display data line is a red or blue display data line.
8. The array substrate of claim 1, wherein the first display data line is a red display data line and the second display data line is a blue display data line.
9. A display panel, comprising:
an array substrate according to any one of claims 1 to 8.
10. A display device, comprising:
the display panel of claim 9.
CN201911202647.1A 2019-11-29 2019-11-29 Array substrate, display panel and display device Active CN110890410B (en)

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CN108807492A (en) * 2018-06-29 2018-11-13 京东方科技集团股份有限公司 Display panel and preparation method thereof, detection method and display device
CN109256073A (en) * 2018-11-09 2019-01-22 惠科股份有限公司 A kind of display panel detection structure and display equipment
CN110221491A (en) * 2019-05-06 2019-09-10 惠科股份有限公司 Array substrate and preparation method thereof, liquid crystal display panel

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WO2022198511A1 (en) * 2021-03-24 2022-09-29 京东方科技集团股份有限公司 Detection substrate and manufacturing method therefor, and flat panel detector and manufacturing method therefor
CN113555401A (en) * 2021-07-19 2021-10-26 京东方科技集团股份有限公司 Display substrate, detection method thereof and display device
CN113555401B (en) * 2021-07-19 2024-05-24 京东方科技集团股份有限公司 Display substrate, detection method thereof and display device

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