CN110888680A - Starting method and system of embedded processor - Google Patents
Starting method and system of embedded processor Download PDFInfo
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- CN110888680A CN110888680A CN201911176178.0A CN201911176178A CN110888680A CN 110888680 A CN110888680 A CN 110888680A CN 201911176178 A CN201911176178 A CN 201911176178A CN 110888680 A CN110888680 A CN 110888680A
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Abstract
The invention relates to the technical field of computer software, and discloses a starting method and a system of an embedded processor, which comprises the step of entering a normal starting mode, wherein the normal starting mode comprises a master starting mode and a slave starting mode, the starting mode of the embedded processor as a master computer is the master starting mode, the starting mode of the embedded processor as a slave computer is the slave starting mode, IO pin resources in a chip starting mode are saved, the mode function of single starting is enriched, a highly customizable starting mode is provided, the trouble that a developer needs to completely know and switch the starting modes is avoided, various different application schemes can be met, and complex starting requirements are realized.
Description
Technical Field
The invention relates to the technical field of computer software, in particular to a starting method and a starting system of an embedded processor.
Background
At present, an embedded processor is usually designed with a plurality of startup modes, and when the embedded processor is started, the embedded processor enters different working modes according to the startup modes so as to be suitable for different types of occasions such as a test mode and a working mode.
The general starting method of the embedded processor comprises the following steps:
1. the method comprises the steps that a startup mode is selected through a chip mode number Pin (only 0/1 states are needed, so that multiple pins are needed for mode selection generally), IO Pin resources are occupied to serve as the mode Pin, different modes are entered through recognizing the states of the mode Pin after power-on, the method needs to occupy the multiple modes Pin, the modes Pin are generally monopolized and cannot serve as other functions, the chip IO Pin resources are wasted, the mode function is single, the IO Pin, I represents input, O represents output, the IO Pin is an input/output Pin of a chip and is called Pin uniformly, namely the Pin.
2. Selecting a starting mode through mode simulation Pin (a plurality of states can correspondingly represent a plurality of modes), occupying IO Pin resources to be used as the mode Pin, and entering different modes through ADC identification mode Pin voltage after electrification; although only one IO pin is used, the method also needs to occupy the analog IO pin, which wastes IO pin resources, and the analog signal has poor anti-interference capability and single mode function.
3. Different starting modes are selected by configuring the mode storage unit, and different modes are entered by the value of the mode storage unit after the power-on, the method is more complicated than the method 1, because additional storage units are needed, and the value of a new mode storage unit is programmed again when the starting mode is switched, so the method is relatively complicated to realize, a chip IO pin is not needed, and the mode function is single.
4. Through the common selection of the chip mode Pin and the mode storage unit, after the power-on, different modes are entered by identifying the values of the mode Pin and the mode storage unit, so that part of chip IO Pin resources can be saved relatively, but the new value of the mode storage unit also needs to be rewritten, the implementation is relatively complex, a small number of chip IO pins are needed, and the mode function is single.
With the rapid development of chips, the starting method and system of embedded processing are urgently needed to solve the problems of chip IO pin resource occupation and single mode function.
Disclosure of Invention
The invention aims to provide a starting method and a starting system of an embedded processor, which save IO pin resources in a chip starting mode, enrich the mode functions of single starting, provide a highly customizable starting mode, avoid the trouble that a developer needs to completely know and switch the starting mode, and can deal with various different application schemes and realize complex starting requirements.
The first aspect of the present invention is implemented as such, and a method for starting an embedded processor includes a step of entering a normal start mode, where the normal start mode includes a master start mode and a slave start mode, the start mode when the embedded processor is used as a master is the master start mode, the start mode when the embedded processor is used as a slave is the slave start mode, and the step of the normal start mode specifically includes:
s110, entering a normal starting mode;
s120, reading and verifying a mode and a timeout storage unit;
s130, judging whether the mode storage unit value is valid, if so, setting a mode to be traversed by mode traversal as the mode storage unit value, otherwise, setting full-mode traversal, and setting mode default timeout time;
s140, traversing the mode to obtain the next effective starting mode;
s150, judging whether the starting mode is the last starting mode, if so, setting the starting mode timeout time to be infinite, not allowing the mode to quit overtime, otherwise, setting the starting mode timeout time to be finite;
s160, judging whether the current mode is a master starting mode, if so, entering the master starting mode, namely loading codes in a memory corresponding to the slave mode and running, and if not, entering the slave starting mode, namely waiting for receiving and executing a command sent by the external equipment;
s170, judging whether the starting mode is overtime and quitting, if yes, returning to the step S140, otherwise, continuously staying in the current mode.
Further, the method also comprises the step of identifying whether to enter a test mode:
s10, powering on the embedded processor and executing a starting code;
s20, the start code judges whether the test mode Pin is effective, if yes, the chip test mode is entered, otherwise, the normal start mode is entered:
s10, powering on the embedded processor and executing a starting code;
and S20, judging whether the test mode Pin is effective by the start code, if so, entering the chip test mode, and otherwise, entering the normal start mode.
Preferably, when the test mode Pin is at a low level, the start code determines that the test mode Pin is valid, and enters the test mode, and when the test mode Pin is at a high level, the start code determines that the test mode Pin is invalid, and enters the normal start mode.
Preferably, when the test mode Pin is at a high level, the start code determines that the test mode Pin is valid, and enters the test mode, and when the test mode Pin is at a low level, the start code determines that the test mode Pin is invalid, and enters the normal start mode.
Preferably, the flow of the main start mode includes the following steps:
s210, entering a main starting mode;
s220, reading and checking code header information through a corresponding mode interface;
s230, judging whether the code header information is valid, if so, reading and verifying the code body according to the code header information; otherwise, entering step S250;
s240, judging whether the code body is effective, if so, executing the loaded code; otherwise, entering step S250;
s250, setting to a next traversal address;
s260, judging whether the mode is overtime or not, and if yes, exiting the current mode; otherwise, the process returns to step S220.
Preferably, the flow of the slave start-up mode includes the following steps:
s310, entering a slave starting mode;
s320, initializing a slave mode interface and waiting for a command of an external device;
s330, judging whether a command of the external equipment is received, if so, checking command data, and if not, entering the step S350;
s340, judging whether the command passes the verification, if so, canceling the mode overtime control, executing the command of the external equipment, otherwise, returning to the step S330;
s350, judging whether the mode is overtime, and if yes, exiting the current mode; otherwise, the process returns to step S330.
Preferably, the embedded processor executes mode traversal according to a mode bitmap, which modes need to be traversed are marked in the mode bitmap, and the sequence of addresses needing to be traversed can be from low bit to high bit or from high bit to low bit.
A second aspect of the present invention is implemented as a system of an embedded processor connected to a memory through a master mode interface, connected to an external device through a slave mode interface, and connected to a test device through a test mode interface, the system performing the method of any one of the above.
Preferably, the master boot mode requires the embedded processor to actively load and execute a code from the memory through the master mode interface, the memory is an SPI flash, a NAND flash, an EPROM, an SD card, or a Udisk, and the corresponding embedded processor is a host on the SPI, the NAND flash, the IIC, the SD, or the USB master mode interface, respectively.
Preferably, when the slave start mode is started, the embedded processor needs to wait for a command of an external device to execute a corresponding function, the embedded processor is a slave of a slave mode interface of SPI, SDIO, UART, or USB, and the corresponding external device is a master on the slave mode interface of SPI, SDIO, UART, or USB.
The invention has the beneficial effects that:
compared with the prior art, the method has the advantages that the mode traversal is matched with the mode storage unit, the starting mode is selected, the IO pin resource in the chip starting mode is saved, the mode function of single starting is enriched, the highly customizable starting mode is provided, the trouble that a developer needs to completely know and switch the starting mode is avoided, various different application schemes can be met, and the complex starting requirement is realized.
Drawings
FIG. 1 is a schematic diagram of a system, according to a preferred embodiment of the present invention;
FIG. 2 is a flow chart of an embodiment of the present invention in determining a startup mode;
FIG. 3 is a flow chart of an embodiment of the present invention for an embedded processor to enter a normal boot mode;
FIG. 4 is a flow chart of an embodiment of the present invention for an embedded processor to enter a master boot mode;
FIG. 5 is a flow diagram of an embodiment of the present invention for an embedded processor to enter a slave boot mode;
the following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
Detailed Description
The preferred embodiments of the present invention are shown in fig. 1 to 5, which are intended to supplement the description of the text of the specification with figures for the understanding of the various features of the invention and the technical solutions as a whole, but are not to be construed as limiting the invention. Technical words not specifically explained may be regarded as broad meanings in the prior art.
As shown in fig. 1 to 5, a system of an embedded processor, also called an embedded microprocessor, which incorporates a plurality of functional blocks and implements functions on one chip, is connected to a memory through a master mode interface, an external device through a slave mode interface, and a test device through a test mode interface. The starting mode of the system of the embedded processor comprises a test mode and a normal starting mode, wherein the normal starting mode comprises a main starting mode and a slave starting mode, the starting mode when the embedded processor is used as a host is the main starting mode, and the starting mode when the embedded processor is used as a slave is the slave starting mode. The main starting mode requires the embedded processor to actively load and execute codes from the memory through the main mode interface, the memory is SPIflash, NAND flash, EPROM, SD card or Udisk, the corresponding embedded processor is a host on the SPI, NAND flash, IIC, SD or USB main mode interface, when the auxiliary starting mode is started, the embedded processor needs to wait for the command of the external equipment to execute the corresponding function, the embedded processor at the moment is a slave of the SPI, SDIO, UART or USB auxiliary mode interface, and the corresponding external equipment is a host on the SPI, SDIO, UART or USB auxiliary mode interface.
The SPI flash represents a serial peripheral register; the NAND flash represents a data storage type flash memory; EPROM stands for electrically programmable read-only memory; SD card denotes a secure digital card; udisk represents a U disk.
Wherein SPI represents a serial peripheral interface; IIC represents a built-in serial communication interface; SD represents a secure digital card; USB stands for universal serial bus.
Wherein SDIO represents secure digital input output; UART stands for asynchronous serial interface.
Firstly, a starting method of an embedded processor comprises the following steps:
the starting method comprises a mode judging and switching process, wherein the test mode is only used in the chip test process and is executed through a test mode Pin on an embedded processor, and the test mode Pin is packaged after the test is finished, so that the test mode Pin does not occupy IO Pin resources of the chip in normal use, and the mode judging and switching comprises the following steps:
s10, powering on the embedded processor and executing a starting code;
and S20, judging whether the test mode Pin is effective by the start code, if so, entering the chip test mode, and otherwise, entering the normal start mode.
In one preferred embodiment, when the test pattern Pin is at a low level, the start code determines that the test pattern Pin is valid, and enters the test pattern, and when the test pattern Pin is at a high level, the start code determines that the test pattern Pin is invalid, and enters the normal start mode.
In a second preferred embodiment, when the test pattern Pin is at a high level, the start code determines that the test pattern Pin is valid, and enters the test pattern, and when the test pattern Pin is at a low level, the start code determines that the test pattern Pin is invalid, and enters the normal start mode.
The steps of a normal startup mode of an embedded processor specifically include:
s110, entering a normal starting mode;
s120, reading and verifying a mode and a timeout storage unit;
s130, judging whether the mode storage unit value is valid, if so, setting a mode to be traversed by mode traversal as the mode storage unit value, otherwise, setting full-mode traversal, and setting mode default timeout time;
s140, traversing the mode to obtain the next effective starting mode;
s150, judging whether the starting mode is the last starting mode, if so, setting the starting mode timeout time to be infinite, not allowing the mode to quit overtime, otherwise, setting the starting mode timeout time to be finite;
s160, judging whether the current mode is a master starting mode, if so, entering the master starting mode, namely loading codes in a memory corresponding to the slave mode and running, and if not, entering the slave starting mode, namely waiting for receiving and executing a command sent by the external equipment;
s170, judging whether the starting mode is overtime and quitting, if yes, returning to the step S140, otherwise, continuously staying in the current mode.
According to the invention, through the mode traversal and matching with the mode storage unit, the mode of selecting the starting mode is adopted, the IO pin resource in the chip starting mode is saved, the mode function of single starting is enriched, the mode of highly customizable starting mode is provided, the trouble that a developer needs to completely know and switch the starting mode is avoided, and the method can cope with various different application schemes and realize complex starting requirements.
In a preferred embodiment, the process of the main start mode includes the following steps:
s210, entering a main starting mode;
s220, reading and checking code header information through a corresponding mode interface;
s230, judging whether the code header information is valid, if so, reading and verifying the code body according to the code header information; otherwise, entering step S250;
s240, judging whether the code body is effective, if so, executing the loaded code; otherwise, entering step S250;
s250, setting to a next traversal address;
s260, judging whether the mode is overtime or not, and if yes, exiting the current mode; otherwise, the process returns to step S220.
In a preferred embodiment, the flow from the start-up mode comprises the following steps:
s310, entering a slave starting mode;
s320, initializing a slave mode interface and waiting for a command of an external device;
s330, judging whether a command of the external equipment is received, if so, checking command data, and if not, entering the step S350;
s340, judging whether the command passes the verification, if so, canceling the mode overtime control, executing the command of the external equipment, otherwise, returning to the step S330;
s350, judging whether the mode is overtime, and if yes, exiting the current mode; otherwise, the process returns to step S330.
In the preferred embodiment, the embedded processor executes mode traversal according to a mode bitmap, which marks the modes to be traversed, and the sequence of addresses to be traversed can be from low bit to high bit or from high bit to low bit. The bit represents the minimum unit of information, and is information contained in one bit of a binary number, the pattern bitmap represents a set of the minimum unit of information, that is, a bitmap, and an embodiment of the information format of the pattern bitmap is shown in the following table.
| Bit address | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Mode cell value | SPI flash | Udisk | SD card | NAND flash | UART slave | SPI slave | SDIO slave | USB device |
The mode unit value in the table is the command that the embedded processor needs to execute, and when the bit address is 7, the SPIflash represents that the embedded processor is used as the host of the serial peripheral register; when the bit address is 6, Udisk represents that the embedded processor is used as a host of the U disk; when the bit address is 5, the SD card represents that the embedded processor is used as a host of the secure digital card; when the bit address is 4, the NAND flash represents that the embedded processor is used as a host of the data storage type flash memory; when the bit address is 3, the UART slave represents that the embedded processor is used as a slave connected with the asynchronous serial interface; when the bit address is 2, the SPI slave represents that the embedded processor is used as a slave connected with the serial peripheral interface; when the bit address is 1, SDIOchanger represents that the embedded processor is used as a slave connected with the secure digital input and output interface; when the bit address is 0, the USBdevice represents that the embedded processor is used as a slave connected with the universal serial interface.
In the actual use process, the default mode is fully traversed, and when a user needs a personalized starting mode, the value of the mode storage unit can be modified to realize the mode, wherein each Bit address is the mode storage unit. For example, in the above table, when the value of the mode that the client needs to start preferentially is SD card, and the traversal order of the mode is from high bit to low bit, the information format of the personalized mode bitmap can be as shown in the following table.
| Bit address | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Mode cell value | SD card | SPI flash | Udisk | NAND flash | UART slave | SPI slave | SDIO slave | USB device |
The above embodiments are merely preferred embodiments of the present invention, which should not be construed as limiting the scope of the present invention, and all modifications, equivalents, improvements and the like which are not inventive based on the spirit and principles of the present invention are intended to be covered by the scope of the present invention.
Claims (10)
1. A starting method of an embedded processor is characterized by comprising the step of entering a normal starting mode, wherein the normal starting mode comprises a master starting mode and a slave starting mode, the starting mode when the embedded processor is used as a host is the master starting mode, the starting mode when the embedded processor is used as a slave is the slave starting mode, and the step of the normal starting mode specifically comprises the following steps:
s110, entering a normal starting mode;
s120, reading and verifying a mode and a timeout storage unit;
s130, judging whether the mode storage unit value is valid, if so, setting a mode to be traversed by mode traversal as the mode storage unit value, otherwise, setting full-mode traversal, and setting mode default timeout time;
s140, traversing the mode to obtain the next effective starting mode;
s150, judging whether the starting mode is the last starting mode, if so, setting the starting mode timeout time to be infinite, not allowing the mode to quit overtime, otherwise, setting the starting mode timeout time to be finite;
s160, judging whether the current mode is a master starting mode, if so, entering the master starting mode, namely loading codes in a memory corresponding to the slave mode and running, and if not, entering the slave starting mode, namely waiting for receiving and executing a command sent by the external equipment;
s170, judging whether the starting mode is overtime and quitting, if yes, returning to the step S140, otherwise, continuously staying in the current mode.
2. The method of starting according to claim 1, further comprising the step of identifying whether to enter a test mode:
s10, powering on the embedded processor and executing a starting code;
and S20, the start code judges whether the test mode Pin is effective, if so, the chip test mode is entered, otherwise, the normal start mode is entered.
3. The method as claimed in claim 2, wherein the boot code determines that the test pattern Pin is valid when the test pattern Pin is at a low level, and enters the test pattern, and determines that the test pattern Pin is invalid when the test pattern Pin is at a high level, and enters the normal boot mode.
4. The method as claimed in claim 2, wherein the boot code determines that the test pattern Pin is valid when the test pattern Pin is at a high level, and enters the test pattern, and determines that the test pattern Pin is invalid when the test pattern Pin is at a low level, and enters the normal boot mode.
5. A method according to any one of claims 1 to 4, characterized in that the flow of the main start-up mode comprises the following steps:
s210, entering a main starting mode;
s220, reading and checking code header information through a corresponding mode interface;
s230, judging whether the code header information is valid, if so, reading and verifying the code body according to the code header information; otherwise, entering step S250;
s240, judging whether the code body is effective, if so, executing the loaded code; otherwise, entering step S250;
s250, setting to a next traversal address;
s260, judging whether the mode is overtime or not, and if yes, exiting the current mode; otherwise, the process returns to step S220.
6. The startup method according to any one of claims 1 to 4, characterized in that the flow of the slave startup mode comprises the following steps:
s310, entering a slave starting mode;
s320, initializing a slave mode interface and waiting for a command of an external device;
s330, judging whether a command of the external equipment is received, if so, checking command data, and if not, entering the step S350;
s340, judging whether the command passes the verification, if so, canceling the mode overtime control, executing the command of the external equipment, otherwise, returning to the step S330;
s350, judging whether the mode is overtime, and if yes, exiting the current mode; otherwise, the process returns to step S330.
7. The method according to any one of claims 1 to 4, wherein the embedded processor performs a mode traversal according to a mode bitmap, which marks which modes need to be traversed in the mode bitmap, and the sequence of addresses to be traversed can be from a low bit to a high bit or from a high bit to a low bit.
8. A system of embedded processors connected to a memory via a master mode interface, to an external device via a slave mode interface, and to a test device via a test mode interface, characterized in that the system performs the method of any of claims 1-7.
9. The system of claim 8, wherein the master boot mode requires the embedded processor to actively load and execute code from the memory via the master mode interface, the memory is an SPI flash, an NANDflash, an EPROM, an SD card, or a Udisk, and the corresponding embedded processor is a host on the SPI, NAND flash, IIC, SD, or USB master mode interface, respectively.
10. The system according to claim 8 or 9, wherein the slave start-up mode is started up by waiting for the command of the external device, the embedded processor is a slave of the slave mode interface of SPI, SDIO, UART or USB, and the corresponding external device is a master on the slave mode interface of SPI, SDIO, UART or USB.
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| CN112433895A (en) * | 2020-11-02 | 2021-03-02 | 广州粒子微电子有限公司 | Chip starting mode control method and control circuit |
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