CN110880867A - Multi-machine parallel current-sharing circuit and digital control switch power supply - Google Patents
Multi-machine parallel current-sharing circuit and digital control switch power supply Download PDFInfo
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- CN110880867A CN110880867A CN201811032772.8A CN201811032772A CN110880867A CN 110880867 A CN110880867 A CN 110880867A CN 201811032772 A CN201811032772 A CN 201811032772A CN 110880867 A CN110880867 A CN 110880867A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0012—Control circuits using digital or numerical techniques
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Abstract
The application belongs to the technical field of switching power supplies and relates to a multi-machine parallel current-sharing circuit and a digital control switching power supply. The multi-machine parallel current equalizing circuit comprises: the parallel current equalizing circuit comprises a first differential mode amplifier circuit, a parallel current equalizing bus circuit, a protection circuit, a second differential mode amplifier circuit, an RC filter circuit and a processor; the first differential mode amplifier circuit is electrically connected with the parallel machine current-sharing bus circuit; the first differential mode amplifier circuit is also electrically connected with the second differential mode amplifier circuit; the parallel current equalizing bus circuit is electrically connected with the protection circuit; the parallel machine current equalizing bus circuit is also connected with the processor; the second differential mode amplifier circuit is electrically connected with the RC filter circuit; the RC filter circuit is electrically connected with the processor. The multi-machine parallel current equalizing circuit has the advantages of strong universality, low cost and the like.
Description
Technical Field
The application belongs to the technical field of switching power supplies and relates to a multi-machine parallel current-sharing circuit and a digital control switching power supply.
Background
At present, in the place where the switching power supply needs to be used in parallel, the used switching power supply must be provided with the parallel current sharing circuit technology. A common technique is to use a dedicated current sharing chip, such as a UC1902 series chip. Generally speaking, the use of the dedicated current sharing chip has the disadvantages of high cost, difficult purchase, inflexible use and the like. Or other types of current share circuit techniques used in analog control mode switching power supplies.
The inventor finds that the switching power supply in the prior art has the defects of poor universality, high cost and the like because a special current-sharing chip is used for multi-machine parallel current-sharing control in the process of researching the application. Or the mode of using analog control mode, it is not high to have the precision of flow equalizing, is difficult for discharging various interference signal.
Disclosure of Invention
The embodiment of the application discloses a multi-machine parallel current-sharing circuit and a digital control switch power supply, and aims to solve the problems in the prior art mentioned in the background technology.
One or more embodiments of the application disclose a multi-machine parallel current sharing circuit. The multi-machine parallel current equalizing circuit comprises: the parallel current sharing circuit comprises a first differential mode amplifier circuit, a parallel current sharing bus circuit, a protection circuit, a second differential mode amplifier circuit, an RC (Resistor-capacitor circuit) filter circuit and a processor; the first differential mode amplifier circuit is electrically connected with the parallel machine current-sharing bus circuit; the first differential mode amplifier circuit is also electrically connected with the second differential mode amplifier circuit; the parallel current equalizing bus circuit is electrically connected with the protection circuit; the parallel machine current equalizing bus circuit is also connected with the processor; the second differential mode amplifier circuit is electrically connected with the RC filter circuit; the RC filter circuit is electrically connected with the processor; the voltage drop signal is input into the first differential mode amplifier circuit, and the voltage drop signal is amplified by the first differential mode amplifier circuit; the parallel current-sharing bus circuit is used for outputting a current-sharing bus signal and closing power supply output when the power supply is abnormal; the protection circuit is used for protecting the second differential mode amplifier circuit; the second differential mode amplifier circuit is used for amplifying a voltage drop signal generated by the parallel current sharing bus circuit and inhibiting common mode voltage input by the parallel current sharing bus circuit; the RC filter circuit is used for filtering interference signals input by the second differential mode amplifier circuit; the processor samples the current equalizing signal input by the RC filter circuit through an ADC (analog-to-digital converter), and outputs a pulse width modulation signal to adjust the current output of the power supply.
In one or more embodiments of the present application, the first differential-mode amplifier circuit includes: a resistor R1, a resistor R2, a resistor R3, a resistor R4 and an operational amplifier U1; one end of the resistor R1 is connected with a current sampling negative terminal, and the other end of the resistor R1 is connected with the same-direction input end of the operational amplifier U1; one end of the resistor R2 is connected with a positive current sampling end, and the other end of the resistor R2 is connected with an inverting input end of the operational amplifier U1; one end of the resistor R3 is connected between the resistor R2 and the inverting input end of the operational amplifier U1, and the other end of the resistor R3 is grounded; one end of the resistor R4 is connected between the resistor R1 and the equidirectional input end of the operational amplifier U1, and the other end of the resistor R4 is connected with the output end of the operational amplifier U1.
In one or more embodiments of the present application, the parallel current sharing bus circuit includes: the circuit comprises a resistor R5, a resistor R6, a relay J1, a diode D1 and a triode Q1; one end of the resistor R5 is connected with the output end of the operational amplifier U1, the other end of the resistor R5 is connected with one end of the resistor R6, and the other end of the resistor R6 is connected with the movable contact of the relay J1; the static contact of the relay J1 is connected with a current equalizing bus; the diode D1 is connected in parallel with the coil of the relay J1; the collector of the triode Q1 is connected with one end of the coil of the relay J1, and the other end of the coil of the relay J1 is connected with a power supply; the base of the transistor Q1 is connected to the processor, and the emitter of the transistor Q1 is grounded.
In one or more embodiments of the present application, the protection circuit includes: a resistor R7, a diode D2, and a diode D3; one end of the resistor R7 is connected between the resistor R5 and the resistor R6, and the other end of the resistor R7 is connected to the second differential amplifier circuit and is connected with the anode of the diode D2 and the cathode of the diode D3; the cathode of the diode D2 is grounded, and the anode of the diode D3 is grounded.
In one or more embodiments of the present application, the second differential-mode amplifier circuit includes: an operational amplifier U2, an operational amplifier U3, a resistor R8, a resistor R9, a resistor R10 and a resistor R11; the positive input end of the operational amplifier U2 is connected with the resistor R7, the anode of the diode D2 and the cathode of the diode D3; the inverting input end of the operational amplifier U2 is connected with the output end of the operational amplifier U2; one end of the resistor R8 is connected with the output end of the operational amplifier U2, and the other end of the resistor R8 is connected with the inverting input end of the operational amplifier U3; one end of the resistor R9 is connected with the output end of the operational amplifier U1, and the other end of the resistor R9 is connected with the positive input end of the operational amplifier U3; one end of the resistor R10 is connected between the resistor R9 and the positive input end of the operational amplifier U3, and the other end of the resistor R10 is grounded; one end of the resistor R11 is connected between the resistor R8 and the inverting input end of the operational amplifier U3, and the other end of the resistor R11 is connected with the output end of the operational amplifier U3; the output end of the operational amplifier U3 is connected to the RC filter circuit.
In one or more embodiments of the present application, the RC filter circuit includes a resistor R12 and a capacitor C1; one end of the resistor R12 is connected with the output end of the operational amplifier U3, the other end of the resistor R12 is connected with the capacitor C1, and the capacitor C1 is grounded; the processor samples between the resistance R12 and the capacitance C1 through an ADC.
One or more embodiments of the present application disclose a digitally controlled switching power supply, which includes a multi-machine parallel current equalizing circuit, the multi-machine parallel current equalizing circuit including: the parallel current equalizing circuit comprises a first differential mode amplifier circuit, a parallel current equalizing bus circuit, a protection circuit, a second differential mode amplifier circuit, an RC filter circuit and a processor; the first differential mode amplifier circuit is electrically connected with the parallel machine current-sharing bus circuit; the first differential mode amplifier circuit is also electrically connected with the second differential mode amplifier circuit; the parallel current equalizing bus circuit is electrically connected with the protection circuit; the parallel machine current equalizing bus circuit is also connected with the processor; the second differential mode amplifier circuit is electrically connected with the RC filter circuit; the RC filter circuit is electrically connected with the processor; the voltage drop signal is input into the first differential mode amplifier circuit, and the voltage drop signal is amplified by the first differential mode amplifier circuit; the parallel current-sharing bus circuit is used for outputting a current-sharing bus signal and closing power supply output when the power supply is abnormal; the protection circuit is used for protecting the second differential mode amplifier circuit; the second differential mode amplifier circuit is used for amplifying a voltage drop signal generated by the parallel current sharing bus circuit and inhibiting common mode voltage input by the parallel current sharing bus circuit; the RC filter circuit is used for filtering interference signals input by the second differential mode amplifier circuit; the processor samples the current-sharing signal input by the RC filter circuit through the ADC and outputs a pulse width modulation signal to adjust the current output of the power supply.
Compared with the prior art, the technical scheme disclosed by the application mainly has the following beneficial effects:
in an embodiment of the present application, the voltage drop signal is input to the first differential mode amplifier circuit, and the voltage drop signal is amplified by the first differential mode amplifier circuit. The current sampling negative terminal and the current sampling positive terminal connected with the first differential mode amplifier circuit can introduce common mode interference signals due to PCB wiring. The first differential-mode amplifier circuit is able to suppress the common-mode interference signal well compared to a normal amplifier. The parallel current sharing bus circuit is controlled by the processor to close the power supply with abnormal conditions, but the work of the rest power supplies is not influenced. Under a complex working environment, the parallel current sharing bus circuit is coupled with a high-frequency interference signal, the protection circuit can play a clamping role, and then the second differential mode amplifier circuit is realized. The second differential mode amplifier circuit can suppress a common mode voltage and avoid the common mode voltage from being converted into a component mode voltage. The RC filter circuit is used for enabling the parallel current equalizing bus circuit to be coupled with high-frequency interference signals, so that the processor samples signals without interference through the ADC. In the embodiment of the application, the multi-machine parallel current equalizing circuit does not need to use a special current equalizing chip to carry out multi-machine parallel current equalizing control, and has the advantages of strong universality, low cost and the like. Compared with the mode using an analog control mode, the current sharing method has high current sharing precision and can discharge various interference signals.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.
FIG. 1 is a schematic diagram of a multi-parallel current sharing circuit according to an embodiment of the present application;
fig. 2 is a specific structure diagram of a multi-parallel current sharing circuit according to an embodiment of the present application.
Description of reference numerals:
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
At present, in the place where the switching power supply needs to be used in parallel, the used switching power supply must be provided with the parallel current sharing circuit technology. A common technique is to use a dedicated current sharing chip, such as a UC1902 series chip. Generally speaking, the use of the dedicated current sharing chip has the disadvantages of high cost, difficult purchase, inflexible use and the like. Or other types of current share circuit techniques used in analog control mode switching power supplies. The inventor finds that the switching power supply in the prior art has the defects of poor universality, high cost and the like because a special current-sharing chip is used for multi-machine parallel current-sharing control in the process of researching the application. Or the mode of using analog control mode, it is not high to have the precision of flow equalizing, is difficult for discharging various interference signal.
An embodiment of the application discloses a multi-machine parallel current-sharing circuit, which is applied to a digital control switch power supply.
Referring to fig. 1, a schematic diagram of a multi-parallel current sharing circuit according to an embodiment of the present application is shown.
As illustrated in fig. 1, the multi-parallel current sharing circuit includes: a first differential mode amplifier circuit 100, a parallel current sharing bus circuit 200, a protection circuit 300, a second differential mode amplifier circuit 400, an RC (Resistor-capacitor) filter circuit 500 and a processor 600; the first differential mode amplifier circuit 100 is electrically connected with the parallel current sharing bus circuit 200; the first differential mode amplifier circuit 100 is also electrically connected to the second differential mode amplifier circuit 400; the parallel current sharing bus circuit 200 is electrically connected with the protection circuit 300; the parallel current sharing bus circuit 200 is also connected with the processor 600; the second differential mode amplifier circuit 400 is electrically connected to the RC filter circuit 500; the RC filter circuit 500 is electrically connected to the processor 600.
A voltage drop signal is input into the first differential mode amplifier circuit 100, and the voltage drop signal is amplified by the first differential mode amplifier circuit 100; the parallel current-sharing bus circuit 200 is used for outputting a current-sharing bus signal and closing power supply output when the power supply is abnormal; the protection circuit 300 is used for protecting the second differential mode amplifier circuit 400; the second differential mode amplifier circuit 400 is configured to amplify a voltage drop signal generated by the parallel current sharing bus circuit 200, and suppress a common mode voltage input by the parallel current sharing bus circuit 200; the RC filter circuit 500 is configured to filter an interference signal input by the second differential amplifier circuit 400; the processor 600 samples the current sharing signal input by the RC filter circuit 500 through an ADC (analog-to-digital converter), and outputs a pulse width modulation signal to adjust the current output of the power supply.
In the embodiment of the present application, a voltage drop signal is input to the first differential mode amplifier circuit 100, and the voltage drop signal is amplified by the first differential mode amplifier circuit 100. The negative current sampling terminal and the positive current sampling terminal connected to the first differential amplifier circuit 100 will introduce common mode interference signals due to PCB traces. The first differential mode amplifier circuit 100 is able to reject the common mode interference signal well compared to a normal amplifier. The parallel current sharing bus circuit 200 shuts down the power supply with abnormal conditions under the control of the processor 600, but does not affect the operation of the rest power supplies. In a complex working environment, the parallel current sharing bus circuit 200 is coupled with a high-frequency interference signal, and the protection circuit 300 can play a role in clamping, so that the second differential-mode amplifier circuit 400 is further provided. The second differential mode amplifier circuit 400 is capable of rejecting the common mode voltage and preventing the common mode voltage from transforming into a split mode voltage. The RC filter circuit 500 is used for receiving a high-frequency interference signal from the parallel current sharing bus circuit 200, so that the processor 600 samples a signal without interference through an ADC. In the embodiment of the application, the multi-machine parallel current equalizing circuit does not need to use a special current equalizing chip to carry out multi-machine parallel current equalizing control, and has the advantages of strong universality, low cost and the like. Compared with the mode using an analog control mode, the current sharing method has high current sharing precision and can discharge various interference signals.
Referring to fig. 2, a specific structure diagram of a multi-parallel current sharing circuit according to an embodiment of the present application is shown.
As illustrated in fig. 2, the first differential-mode amplifier circuit 100 includes: a resistor R1, a resistor R2, a resistor R3, a resistor R4 and an operational amplifier U1; one end of the resistor R1 is connected with a current sampling negative terminal, and the other end of the resistor R1 is connected with the same-direction input end of the operational amplifier U1; one end of the resistor R2 is connected with a positive current sampling end, and the other end of the resistor R2 is connected with an inverting input end of the operational amplifier U1; one end of the resistor R3 is connected between the resistor R2 and the inverting input end of the operational amplifier U1, and the other end of the resistor R3 is grounded; one end of the resistor R4 is connected between the resistor R1 and the equidirectional input end of the operational amplifier U1, and the other end of the resistor R4 is connected with the output end of the operational amplifier U1.
As illustrated in fig. 2, the parallel current sharing bus circuit 200 includes: the circuit comprises a resistor R5, a resistor R6, a relay J1, a diode D1 and a triode Q1; one end of the resistor R5 is connected with the output end of the operational amplifier U1, the other end of the resistor R5 is connected with one end of the resistor R6, and the other end of the resistor R6 is connected with the movable contact of the relay J1; the static contact of the relay J1 is connected with a current equalizing bus; the diode D1 is connected in parallel with the coil of the relay J1; the collector of the triode Q1 is connected with one end of the coil of the relay J1, and the other end of the coil of the relay J1 is connected with a power supply; the base of the transistor Q1 is connected to the processor 600, and the emitter of the transistor Q1 is grounded.
The signal of the parallel current sharing bus circuit 200 is derived from the first differential amplifier circuit 100 and is finally output as a current sharing bus signal. In order not to affect the current sharing accuracy, the resistance value of the resistor R5 is more than 100 times of the resistance value of the resistor R6. In practical use, the current sharing buses of each switching power supply are connected together, and the output negative terminals of each power supply are connected together as the ground line. When the output current value of each power supply is the same, the voltage drop of the resistor R5 is 0V. When current does not flow between the power supplies, the voltage drop of the resistor R5 is not 0. The processor 600 drives the relay J1 to close or open through the transistor Q1. When a certain power supply has an abnormality and needs to close the output, but the output end is connected with the system, the relay J1 needs to be disconnected so as to achieve the purpose of not influencing the normal work of other power supplies.
As illustrated in fig. 2, the protection circuit 300 includes: a resistor R7, a diode D2, and a diode D3; one end of the resistor R7 is connected between the resistor R5 and the resistor R6, and the other end of the resistor R7 is connected to the second differential amplifier circuit 400, and is connected to the anode of the diode D2 and the cathode of the diode D3; the cathode of the diode D2 is grounded, and the anode of the diode D3 is grounded.
As illustrated in fig. 2, the second differential-mode amplifier circuit 400 includes: an operational amplifier U2, an operational amplifier U3, a resistor R8, a resistor R9, a resistor R10 and a resistor R11; the positive input end of the operational amplifier U2 is connected with the resistor R7, the anode of the diode D2 and the cathode of the diode D3; the inverting input end of the operational amplifier U2 is connected with the output end of the operational amplifier U2; one end of the resistor R8 is connected with the output end of the operational amplifier U2, and the other end of the resistor R8 is connected with the inverting input end of the operational amplifier U3; one end of the resistor R9 is connected with the output end of the operational amplifier U1, and the other end of the resistor R9 is connected with the positive input end of the operational amplifier U3; one end of the resistor R10 is connected between the resistor R9 and the positive input end of the operational amplifier U3, and the other end of the resistor R10 is grounded; one end of the resistor R11 is connected between the resistor R8 and the inverting input end of the operational amplifier U3, and the other end of the resistor R11 is connected with the output end of the operational amplifier U3; the output end of the operational amplifier U3 is connected to the RC filter circuit 500.
The protection circuit 300 mainly protects the operational amplifier U2 in the second differential amplifier circuit 400. The diode D2 and the diode D3 in the protection circuit 300 are connected to a positive power supply terminal (+ VCC) and ground, and can play a role in clamping, thereby protecting the operational amplifier U2.
The second differential-mode amplifier circuit 400 is capable of amplifying the voltage drop across the resistor R5. The operational amplifier U2 acts as a voltage follower and can perform an isolation function. Due to the isolation of the operational amplifier U2, the resistor R7 has almost no voltage drop, and therefore the resistor R7 has no influence on the amplification accuracy of the second differential amplifier circuit 400. The voltage signal from the resistor R5 includes a common mode voltage component and a differential mode voltage component. Since the second differential mode amplifier circuit 400 can suppress the common mode voltage component, and since the operational amplifier U2 has an isolation function, the common mode voltage component from the resistor R5 is prevented from being converted into a differential mode voltage component through the resistor R8 and the resistor R11.
As illustrated in fig. 2, the RC filter circuit 500 includes a resistor R12 and a capacitor C1; one end of the resistor R12 is connected with the output end of the operational amplifier U3, the other end of the resistor R12 is connected with the capacitor C1, and the capacitor C1 is grounded; the processor 600 samples between the resistor R12 and the capacitor C1 through an ADC.
The processor 600 uses the current-sharing signal without interference from the RC filter circuit 500 through the ADC, and then adjusts the output PMW1 and PMW2, so that the current output of each power supply achieves the current-sharing effect. When the output current of each power supply is uniform in magnitude, or when only a single power supply operates, the voltage signal output from the second differential amplifier circuit 400 is 0V. When the current output of each power supply is not uniform, the voltage signal output from the second differential amplifier circuit 400 is not 0V, and if the current value of the current output from the power supply is larger than the current values output from the other power supplies, the voltage output from the second differential amplifier circuit 400 is a positive voltage with respect to the ground voltage, otherwise, the voltage output is a negative voltage. The larger the degree of flow through each power supply unevenness, the larger the absolute value of the voltage to ground output by the second differential amplifier circuit 400.
One embodiment of the present application discloses a digitally controlled switching power supply.
With reference to fig. 1 and 2, the digitally controlled switching power supply includes a multi-parallel current-sharing circuit, and the multi-parallel current-sharing circuit includes: the parallel current sharing circuit comprises a first differential mode amplifier circuit 100, a parallel current sharing bus circuit 200, a protection circuit 300, a second differential mode amplifier circuit 400, an RC filter circuit 500 and a processor 600; the first differential mode amplifier circuit 100 is electrically connected with the parallel current sharing bus circuit 200; the first differential mode amplifier circuit 100 is also electrically connected to the second differential mode amplifier circuit 400; the parallel current sharing bus circuit 200 is electrically connected with the protection circuit 300; the parallel current sharing bus circuit 200 is also connected with the processor 600; the second differential mode amplifier circuit 400 is electrically connected to the RC filter circuit 500; the RC filter circuit 500 is electrically connected to the processor 600.
A voltage drop signal is input into the first differential mode amplifier circuit 100, and the voltage drop signal is amplified by the first differential mode amplifier circuit 100; the parallel current-sharing bus circuit 200 is used for outputting a current-sharing bus signal and closing power supply output when the power supply is abnormal; the protection circuit 300 is used for protecting the second differential mode amplifier circuit 400; the second differential mode amplifier circuit 400 is configured to amplify a voltage drop signal generated by the parallel current sharing bus circuit 200, and suppress a common mode voltage input by the parallel current sharing bus circuit 200; the RC filter circuit 500 is configured to filter an interference signal input by the second differential amplifier circuit 400; the processor 600 samples the current-sharing signal input by the RC filter circuit 500 through the ADC, and outputs a pulse width modulation signal to adjust the current output of the power supply.
Further, the first differential-mode amplifier circuit 100 includes: a resistor R1, a resistor R2, a resistor R3, a resistor R4 and an operational amplifier U1; one end of the resistor R1 is connected with a current sampling negative terminal, and the other end of the resistor R1 is connected with the same-direction input end of the operational amplifier U1; one end of the resistor R2 is connected with a positive current sampling end, and the other end of the resistor R2 is connected with an inverting input end of the operational amplifier U1; one end of the resistor R3 is connected between the resistor R2 and the inverting input end of the operational amplifier U1, and the other end of the resistor R3 is grounded; one end of the resistor R4 is connected between the resistor R1 and the equidirectional input end of the operational amplifier U1, and the other end of the resistor R4 is connected with the output end of the operational amplifier U1.
Further, the parallel current sharing bus circuit 200 includes: the circuit comprises a resistor R5, a resistor R6, a relay J1, a diode D1 and a triode Q1; one end of the resistor R5 is connected with the output end of the operational amplifier U1, the other end of the resistor R5 is connected with one end of the resistor R6, and the other end of the resistor R6 is connected with the movable contact of the relay J1; the static contact of the relay J1 is connected with a current equalizing bus; the diode D1 is connected in parallel with the coil of the relay J1; the collector of the triode Q1 is connected with one end of the coil of the relay J1, and the other end of the coil of the relay J1 is connected with a power supply; the base of the transistor Q1 is connected to the processor 600, and the emitter of the transistor Q1 is grounded.
Further, the protection circuit 300 includes: a resistor R7, a diode D2, and a diode D3; one end of the resistor R7 is connected between the resistor R5 and the resistor R6, and the other end of the resistor R7 is connected to the second differential amplifier circuit 400, and is connected to the anode of the diode D2 and the cathode of the diode D3; the cathode of the diode D2 is grounded, and the anode of the diode D3 is grounded.
Further, the second differential-mode amplifier circuit 400 includes: an operational amplifier U2, an operational amplifier U3, a resistor R8, a resistor R9, a resistor R10 and a resistor R11; the positive input end of the operational amplifier U2 is connected with the resistor R7, the anode of the diode D2 and the cathode of the diode D3; the inverting input end of the operational amplifier U2 is connected with the output end of the operational amplifier U2; one end of the resistor R8 is connected with the output end of the operational amplifier U2, and the other end of the resistor R8 is connected with the inverting input end of the operational amplifier U3; one end of the resistor R9 is connected with the output end of the operational amplifier U1, and the other end of the resistor R9 is connected with the positive input end of the operational amplifier U3; one end of the resistor R10 is connected between the resistor R9 and the positive input end of the operational amplifier U3, and the other end of the resistor R10 is grounded; one end of the resistor R11 is connected between the resistor R8 and the inverting input end of the operational amplifier U3, and the other end of the resistor R11 is connected with the output end of the operational amplifier U3; the output end of the operational amplifier U3 is connected to the RC filter circuit 500.
Further, the RC filter circuit 500 includes a resistor R12 and a capacitor C1; one end of the resistor R12 is connected with the output end of the operational amplifier U3, the other end of the resistor R12 is connected with the capacitor C1, and the capacitor C1 is grounded; the processor 600 samples between the resistor R12 and the capacitor C1 through an ADC.
When the techniques in the various embodiments described above are implemented using software, the computer instructions and/or data to implement the various embodiments described above may be stored on a computer-readable medium or transmitted as one or more instructions or code on a readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that a computer can store. Taking this as an example but not limiting: computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Further, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium.
Finally, it should be noted that: the above examples are only for illustrating the technical solutions of the present application, and are not limited thereto. Although the present application has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. And such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (7)
1. A multi-parallel current sharing circuit is characterized by comprising: the parallel current sharing circuit comprises a first differential mode amplifier circuit (100), a parallel current sharing bus circuit (200), a protection circuit (300), a second differential mode amplifier circuit (400), an RC filter circuit (500) and a processor (600); the first differential mode amplifier circuit (100) is electrically connected with the parallel current sharing bus circuit (200); the first differential mode amplifier circuit (100) is further electrically connected with the second differential mode amplifier circuit (400); the parallel current sharing bus circuit (200) is electrically connected with the protection circuit (300); the parallel current sharing bus circuit (200) is also connected with the processor (600); the second differential mode amplifier circuit (400) is electrically connected with the RC filter circuit (500); the RC filter circuit (500) is electrically connected with the processor (600);
a voltage drop signal is input into the first differential mode amplifier circuit (100), and the voltage drop signal is amplified by the first differential mode amplifier circuit (100); the parallel operation current-sharing bus circuit (200) is used for outputting a current-sharing bus signal and closing power supply output when a power supply is abnormal; the protection circuit (300) is used for protecting the second differential mode amplifier circuit (400); the second differential mode amplifier circuit (400) is used for amplifying a voltage drop signal generated by the parallel current sharing bus circuit (200) and inhibiting a common mode voltage input by the parallel current sharing bus circuit (200); the RC filter circuit (500) is used for filtering interference signals input by the second differential mode amplifier circuit (400); the processor (600) samples the current sharing signal input by the RC filter circuit (500) through the ADC, and outputs a pulse width modulation signal to adjust the current output of the power supply.
2. A multi-parallel current share circuit according to claim 1, wherein the first differential mode amplifier circuit (100) comprises: a resistor R1, a resistor R2, a resistor R3, a resistor R4 and an operational amplifier U1; one end of the resistor R1 is connected with a current sampling negative terminal, and the other end of the resistor R1 is connected with the same-direction input end of the operational amplifier U1; one end of the resistor R2 is connected with a positive current sampling end, and the other end of the resistor R2 is connected with an inverting input end of the operational amplifier U1; one end of the resistor R3 is connected between the resistor R2 and the inverting input end of the operational amplifier U1, and the other end of the resistor R3 is grounded; one end of the resistor R4 is connected between the resistor R1 and the equidirectional input end of the operational amplifier U1, and the other end of the resistor R4 is connected with the output end of the operational amplifier U1.
3. A multi-parallel current share circuit according to claim 2, wherein the parallel current share bus circuit (200) comprises: the circuit comprises a resistor R5, a resistor R6, a relay J1, a diode D1 and a triode Q1; one end of the resistor R5 is connected with the output end of the operational amplifier U1, the other end of the resistor R5 is connected with one end of the resistor R6, and the other end of the resistor R6 is connected with the movable contact of the relay J1; the static contact of the relay J1 is connected with a current equalizing bus; the diode D1 is connected in parallel with the coil of the relay J1; the collector of the triode Q1 is connected with one end of the coil of the relay J1, and the other end of the coil of the relay J1 is connected with a power supply; the base of the transistor Q1 is connected to the processor (600), and the emitter of the transistor Q1 is grounded.
4. A multi-parallel current share circuit according to claim 3, wherein the protection circuit (300) comprises: a resistor R7, a diode D2, and a diode D3; one end of the resistor R7 is connected between the resistor R5 and the resistor R6, and the other end of the resistor R7 is connected to the second differential amplifier circuit (400) and is connected with the anode of the diode D2 and the cathode of the diode D3; the cathode of the diode D2 is grounded, and the anode of the diode D3 is grounded.
5. A multi-parallel current share circuit according to claim 4, wherein the second differential mode amplifier circuit (400) comprises: an operational amplifier U2, an operational amplifier U3, a resistor R8, a resistor R9, a resistor R10 and a resistor R11; the positive input end of the operational amplifier U2 is connected with the resistor R7, the anode of the diode D2 and the cathode of the diode D3; the inverting input end of the operational amplifier U2 is connected with the output end of the operational amplifier U2; one end of the resistor R8 is connected with the output end of the operational amplifier U2, and the other end of the resistor R8 is connected with the inverting input end of the operational amplifier U3; one end of the resistor R9 is connected with the output end of the operational amplifier U1, and the other end of the resistor R9 is connected with the positive input end of the operational amplifier U3; one end of the resistor R10 is connected between the resistor R9 and the positive input end of the operational amplifier U3, and the other end of the resistor R10 is grounded; one end of the resistor R11 is connected between the resistor R8 and the inverting input end of the operational amplifier U3, and the other end of the resistor R11 is connected with the output end of the operational amplifier U3; the output end of the operational amplifier U3 is connected to the RC filter circuit (500).
6. The multi-parallel current sharing circuit according to claim 5, wherein the RC filter circuit (500) comprises a resistor R12 and a capacitor C1; one end of the resistor R12 is connected with the output end of the operational amplifier U3, the other end of the resistor R12 is connected with the capacitor C1, and the capacitor C1 is grounded; the processor (600) samples between the resistance R12 and the capacitance C1 through an ADC.
7. A digital control switch power supply, the digital control switch power supply includes the multimachine parallel current-sharing circuit, characterized by, the multimachine parallel current-sharing circuit includes: the parallel current sharing circuit comprises a first differential mode amplifier circuit (100), a parallel current sharing bus circuit (200), a protection circuit (300), a second differential mode amplifier circuit (400), an RC filter circuit (500) and a processor (600); the first differential mode amplifier circuit (100) is electrically connected with the parallel current sharing bus circuit (200); the first differential mode amplifier circuit (100) is further electrically connected with the second differential mode amplifier circuit (400); the parallel current sharing bus circuit (200) is electrically connected with the protection circuit (300); the parallel current sharing bus circuit (200) is also connected with the processor (600); the second differential mode amplifier circuit (400) is electrically connected with the RC filter circuit (500); the RC filter circuit (500) is electrically connected with the processor (600);
a voltage drop signal is input into the first differential mode amplifier circuit (100), and the voltage drop signal is amplified by the first differential mode amplifier circuit (100); the parallel operation current-sharing bus circuit (200) is used for outputting a current-sharing bus signal and closing power supply output when a power supply is abnormal; the protection circuit (300) is used for protecting the second differential mode amplifier circuit (400); the second differential mode amplifier circuit (400) is used for amplifying a voltage drop signal generated by the parallel current sharing bus circuit (200) and inhibiting a common mode voltage input by the parallel current sharing bus circuit (200); the RC filter circuit (500) is used for filtering interference signals input by the second differential mode amplifier circuit (400); the processor (600) samples the current sharing signal input by the RC filter circuit (500) through the ADC, and outputs a pulse width modulation signal to adjust the current output of the power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811032772.8A CN110880867A (en) | 2018-09-05 | 2018-09-05 | Multi-machine parallel current-sharing circuit and digital control switch power supply |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811032772.8A CN110880867A (en) | 2018-09-05 | 2018-09-05 | Multi-machine parallel current-sharing circuit and digital control switch power supply |
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| CN110880867A true CN110880867A (en) | 2020-03-13 |
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| CN201811032772.8A Pending CN110880867A (en) | 2018-09-05 | 2018-09-05 | Multi-machine parallel current-sharing circuit and digital control switch power supply |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111478570A (en) * | 2020-05-08 | 2020-07-31 | 中国南方电网有限责任公司超高压输电公司天生桥局 | PMOS-based low-power-consumption redundant current-sharing circuit |
-
2018
- 2018-09-05 CN CN201811032772.8A patent/CN110880867A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111478570A (en) * | 2020-05-08 | 2020-07-31 | 中国南方电网有限责任公司超高压输电公司天生桥局 | PMOS-based low-power-consumption redundant current-sharing circuit |
| CN111478570B (en) * | 2020-05-08 | 2021-03-19 | 中国南方电网有限责任公司超高压输电公司天生桥局 | PMOS-based low-power-consumption redundant current-sharing circuit |
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