CN110874989B - Display panel, display device and test method - Google Patents
Display panel, display device and test method Download PDFInfo
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- CN110874989B CN110874989B CN201911207083.0A CN201911207083A CN110874989B CN 110874989 B CN110874989 B CN 110874989B CN 201911207083 A CN201911207083 A CN 201911207083A CN 110874989 B CN110874989 B CN 110874989B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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Abstract
The embodiment of the application provides a display panel, a display device and a test method, relates to the technical field of display, and can accurately find the defects of a special-shaped display area, so that timely repair is realized, and the product yield of the display panel is improved. The display panel includes: the display device comprises a first special-shaped display area, a first non-display area and a second special-shaped display area, wherein the first non-display area is positioned between the first special-shaped display area and the second special-shaped display area; a normal display area and a second non-display area, the first non-display area, the normal display area and the second non-display area being arranged along a second direction; a test circuit located in the second non-display area; the test circuit comprises a first data bus which is electrically connected with a plurality of first special-shaped area data lines through transistors; the test circuit also comprises a second data bus which is electrically connected with a plurality of second special-shaped area data lines through transistors; the first data bus and the second data bus are disconnected.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel, a display device and a test method.
Background
At present, the design of electronic devices such as mobile phones and tablet computers is developed towards a high screen ratio, and the screen ratio is used for representing a relative ratio of a screen to the area of a front panel of the electronic device, so how to improve the screen ratio becomes a problem to be solved by those skilled in the art. In order to improve the screen occupation ratio and simultaneously realize the functions of front-facing camera shooting and the like, a special-shaped display panel is provided, the special-shaped display panel comprises a non-display area embedded at the edge of or in the display area, and at least part of the non-display area is surrounded by the display area, so that optical devices such as a front-facing camera and the like can be arranged in the non-display area to realize the front-facing camera shooting function, and at the same time, the non-display area is at least partially surrounded by the display area, so that the screen occupation ratio is improved. However, in the odd-shaped display area around the non-display area, a display failure is likely to occur, and it is not easy to detect.
Disclosure of Invention
The embodiment of the application provides a display panel, a display device and a test method, which can more accurately find the defects of a special-shaped display area, so that timely repair is realized, and the product yield of the display panel is improved.
In one aspect, an embodiment of the present application provides a display panel, including:
a first special-shaped display area, a first non-display area and a second special-shaped display area arranged along a first direction, wherein the first non-display area is positioned between the first special-shaped display area and the second special-shaped display area;
a normal display area and a second non-display area, the first non-display area, the normal display area and the second non-display area being arranged along a second direction, the normal display area being located between the first non-display area and the second non-display area;
a plurality of data lines extending in a second direction, the plurality of data lines including a plurality of first shaped area data lines and a plurality of second shaped area data lines, each of the first shaped area data lines extending from the first shaped display area and extending through the normal display area to the second non-display area, each of the second shaped area data lines extending from the second shaped display area and extending through the normal display area to the second non-display area;
the test circuit is positioned in the second non-display area;
the test circuit comprises a first data bus which is electrically connected with a plurality of first special-shaped area data lines through transistors;
the test circuit also comprises a second data bus which is electrically connected with a plurality of second special-shaped area data lines through transistors;
the first data bus and the second data bus are disconnected.
Optionally, the test circuit further comprises a partition transistor connected in series between the first data bus and the second data bus.
Optionally, the test circuit includes two first test contacts, one of the first test contacts is electrically connected to a first node of the first data bus, the other first test contact is electrically connected to a second node of the first data bus, and the first data bus is electrically connected to the transistors corresponding to the plurality of first special-shaped area data lines between the first node and the second node;
the test circuit comprises two second test contacts, wherein one second test contact is electrically connected to a third node of the second data bus, the other second test contact is electrically connected to a fourth node of the second data bus, and the second data bus is electrically connected to the transistors corresponding to the second special-shaped area data lines between the third node and the fourth node.
Optionally, the test circuit includes a first test contact electrically connected to a first node and a second node of the first data bus, and between the first node and the second node, the first data bus is electrically connected to transistors corresponding to the plurality of first special-shaped area data lines;
the test circuit comprises a second test contact which is electrically connected to a third node and a fourth node of the second data bus, and the second data bus is electrically connected to the transistors corresponding to the second special-shaped area data lines between the third node and the fourth node.
Optionally, the first data buses include a green first data bus, a red first data bus and a blue first data bus, the green first data bus is electrically connected to the corresponding first special-shaped area data line through the corresponding transistor, the red first data bus is electrically connected to the corresponding first special-shaped area data line through the corresponding transistor, and the blue first data bus is electrically connected to the corresponding first special-shaped area data line through the corresponding transistor;
the second data buses comprise green second data buses, red second data buses and blue second data buses, the green second data buses are electrically connected to the corresponding second special-shaped area data lines through the corresponding transistors, the red second data buses are electrically connected to the corresponding second special-shaped area data lines through the corresponding transistors, and the blue second data buses are electrically connected to the corresponding second special-shaped area data lines through the corresponding transistors;
the test circuit comprises a green partition transistor, a red partition transistor and a blue partition transistor, wherein the green partition transistor is connected in series between the green first data bus and the green second data bus, the red partition transistor is connected in series between the red first data bus and the red second data bus, and the blue partition transistor is connected in series between the blue first data bus and the blue second data bus.
Optionally, the plurality of data lines further include a plurality of normal area data lines, the plurality of normal area data lines being located between the first shaped area data line and the second shaped area data line, the plurality of normal area data lines extending from the normal display area to the second non-display area;
one part of the plurality of normal area data lines is electrically connected with the first data bus through a transistor, and the other part of the plurality of normal area data lines is electrically connected with the second data bus through a transistor;
the number of data lines electrically connected to the first data bus through a transistor is equal to the number of data lines electrically connected to the second data bus through a transistor.
On the other hand, the application also provides a display device which comprises the display panel.
In another aspect, the present application further provides a testing method for the display panel, where the method includes:
performing a local lighting test, the performing the local lighting test comprising:
independently lightening the first special-shaped display area and judging whether the current in the display panel is abnormal or not;
independently lightening the second special-shaped display area and judging whether the current in the display panel is abnormal or not;
and if the current in the display panel is normal when the first special-shaped display area is independently lightened and the current in the display panel is normal when the second special-shaped display area is independently lightened, carrying out an aging test.
Optionally, after the performing the aging test, the method further includes:
and judging whether brightness difference exists between the display areas, if so, lightening the display area with higher brightness, and carrying out aging compensation.
Optionally, the separately illuminated display area displays red or green when the local illumination test is performed.
Optionally, the individually illuminating the first specially shaped display area comprises:
providing a first area test signal to the first data bus, so that the sub-pixels in a first special-shaped display area corresponding to a first special-shaped area data line connected with the first data bus emit light, and the sub-pixels in a normal display area corresponding to the first special-shaped area data line connected with the first data bus do not emit light;
providing a non-display test signal to the second data bus, so that the sub-pixels in a second special-shaped display area corresponding to a second special-shaped area data line connected with the second data bus do not emit light, and the sub-pixels in the normal display area corresponding to the second special-shaped area data line connected with the second data bus do not emit light;
said individually illuminating said second shaped display area comprises:
providing a non-display test signal to the first data bus, so that the sub-pixels in the first special-shaped display area corresponding to the first special-shaped area data lines connected with the first data bus do not emit light, and the sub-pixels in the normal display area corresponding to the first special-shaped area data lines connected with the first data bus do not emit light;
and providing a second area test signal to the second data bus, so that the sub-pixels in the second special-shaped display area corresponding to the second special-shaped area data line connected with the second data bus emit light, and the sub-pixels in the normal display area corresponding to the second special-shaped area data line connected with the second data bus do not emit light.
In the display panel, the display device and the test method in the embodiment of the application, when the test is performed, the independent first data bus can be used for independently performing the lighting test on the first special-shaped area, and the independent second data bus can be used for independently performing the lighting test on the second special-shaped area, so that the defect of the first special-shaped area or the second special-shaped area can be accurately and independently determined, the timely repair can be realized, and the product yield of the display panel is further improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an equivalent circuit of a test circuit in the display panel of FIG. 1;
FIG. 3 is a schematic diagram of an equivalent circuit of another test circuit in the display panel of FIG. 1;
FIG. 4 is a schematic diagram of an equivalent circuit of another test circuit in the display panel of FIG. 1;
FIG. 5 is a schematic diagram of an equivalent circuit of another test circuit in the display panel of FIG. 1;
FIG. 6 is a schematic diagram of an equivalent circuit of another test circuit in the display panel of FIG. 1;
FIG. 7 is a schematic structural diagram of a display device according to an embodiment of the present application;
FIG. 8 is a flow chart of a testing method in an embodiment of the present application;
FIG. 9 is a flow chart of another testing method in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
As shown in fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a display panel in an embodiment of the present application, and fig. 2 is a schematic equivalent circuit diagram of a test circuit in the display panel of fig. 1, an embodiment of the present application provides a display panel, including: a first specially shaped display area 11, a first non-display area 21 and a second specially shaped display area 12 arranged in a first direction h1, the first non-display area 21 being located between the first specially shaped display area 11 and the second specially shaped display area 12; a normal display area 3 and a second non-display area 22, the first non-display area 21, the normal display area 3 and the second non-display area 22 being arranged in the second direction h2, the normal display area 3 being located between the first non-display area 21 and the second non-display area 22; a plurality of data lines 4 extending in the second direction h2, the plurality of data lines 4 including a plurality of first shaped area data lines 41 and a plurality of second shaped area data lines 42, each of the first shaped area data lines 41 extending from the first shaped display area 11 and extending through the normal display area 3 to the second non-display area 22, each of the second shaped area data lines 42 extending from the second shaped display area 12 and extending through the normal display area 3 to the second non-display area 22; a test circuit located in the second non-display area 22; the test circuit comprises a first data bus 51, the first data bus 51 being electrically connected to a plurality of first profiled region data lines 41 via transistors (not shown in fig. 1); the test circuit further includes a second data bus 52, the second data bus 52 being electrically connected to the plurality of second profiled region data lines 42 through transistors (not shown in fig. 1); the first data bus 51 and the second data bus 52 are disconnected.
Specifically, each of the display regions is provided with a sub-pixel, the sub-pixels form a pixel, the pixel is used for displaying a picture, and the data line 4 is used for transmitting a data signal to the corresponding sub-pixel to control the gray scale of the sub-pixel. The data lines 4 are used in the second non-display region 22 for bonding connection to driver chips (not shown in the figure), and in addition, between the bonding of the driver chips, a test of the display panel is required, and the test of the display panel can be performed before the bonding of the driver chips by the test circuit. The first data bus 51 is electrically connected to the plurality of first special-shaped area data lines 41 through transistors, and is used for transmitting a test signal to the first special-shaped area data lines 41 during testing to perform a lighting test on the sub-pixels corresponding to the first special-shaped area data lines 41, and the second data bus 52 is electrically connected to the plurality of second special-shaped area data lines 42 through transistors, and is used for transmitting a test signal to the second special-shaped area data lines 42 during testing to perform a lighting test on the sub-pixels corresponding to the second special-shaped area data lines 42. It should be noted that, in fig. 2, only the connection manner that each first special-shaped area data line 41 is electrically connected to the first data bus 51 through a corresponding transistor and each second special-shaped area data line 42 is electrically connected to the second data bus 52 through a corresponding transistor is illustrated, however, the present embodiment is not limited to what kind of circuit the data line 4 is electrically connected to the first data bus 51 and the second data bus 52, for example, in other realizable embodiments, the first special-shaped area data line 41 may be electrically connected to the first data bus 51 through a more complicated circuit, and the second special-shaped area data line 42 may be electrically connected to the second data bus 52 through a more complicated circuit, but these circuit transistors are all made up, which is not limited in the present embodiment, as long as the first special-shaped area data line 41 is electrically connected to the first data bus 51 through a transistor, the second data bus 52 may be electrically connected to the second data line 42 through a transistor. Due to the disconnection between the first data bus 51 and the second data bus 52, that is, the first data bus 51 and the second data bus 52 are independent from each other, different test signals can be transmitted to the first special-shaped area data line 41 and the second special-shaped area data line 42 through the first data bus 51 and the second data bus 52, respectively, so as to realize a single lighting test on the first special-shaped display area 11 or the second special-shaped display area 12, so that the display abnormality existing in the first special-shaped display area 11 or the second special-shaped display area 12 can be more accurately determined, and particularly, the abnormality caused by the unstable pressure welding between a test component and a display panel in the test process can be more accurately determined. For example, in the prior art, signals are provided for all data lines through the same data bus for testing, and independent testing in different regions cannot be performed, and before testing, a testing component is required, such as a testing plugboard and a display panel, to be plugged, if poor crimping exists between the two, but due to the overall current testing, poor crimping on one side may cause current abnormality to be compensated and cannot be detected due to poor crimping on the other side.
In the display panel of the embodiment of the application, when testing, the first special-shaped area can be independently lighted through the independent first data bus, and the second special-shaped area can be independently lighted through the independent second data bus, so that the defect of the first special-shaped area or the second special-shaped area can be accurately and independently determined, timely repair can be realized, and the product yield of the display panel is improved.
Alternatively, as shown in fig. 3, fig. 3 is an equivalent circuit schematic diagram of another test circuit in the display panel of fig. 1, the test circuit further includes a partition transistor 6, and the partition transistor 6 is connected in series between the first data bus 51 and the second data bus 52.
Specifically, when the first special-shaped display area 11 is tested separately or the second special-shaped display area 12 is tested separately, the partition transistor 6 is controlled to be turned off, so that the first data bus 51 and the second data bus 52 are disconnected, and different test signals can be transmitted to the first special-shaped display area 11 and the second special-shaped display area 12 through the first data bus 51 and the second data bus 52, respectively, so as to achieve the purpose of separately lighting and detecting the partition areas. When the sub-area detection is not required, for example, when the test is performed on the whole screen, that is, the lighting test is performed on all the display areas including the first special-shaped display area 11 and the second special-shaped display area 12 at the same time, at this time, the partition transistors 6 can be controlled to be turned on, so that the same test signal is transmitted to the first special-shaped area data line 41 and the second special-shaped area data line 42 through the first data bus 51 and the second data bus, and the uniformity of signal transmission can be improved, thereby improving the test effect.
Alternatively, as shown in fig. 2 and 3, the test circuit includes two first test contacts 71, one of the first test contacts 71 is electrically connected to the first node O1 of the first data bus 51, the other first test contact 71 is electrically connected to the second node O2 of the first data bus 51, and the first data bus 51 is electrically connected to the transistors corresponding to the plurality of first heteromorphic data lines 41 between the first node O1 and the second node O2; the test circuit includes two second test contacts 72, one of the second test contacts 72 is electrically connected to the third node O3 of the second data bus 52, the other second test contact 72 is electrically connected to the fourth node O4 of the second data bus 52, and the second data bus 52 is electrically connected to the transistors corresponding to the second plurality of data lines 42 between the third node O3 and the fourth node O4.
Specifically, the first test contact 71 and the second test contact 72 are used for contacting an external test component during testing to obtain an external test signal, in order to improve the uniformity of the signal during testing, two first test contacts 71 are respectively arranged at two ends of the first data bus 51 to obtain a required signal, two second test contacts 72 are respectively arranged at two ends of the second data bus 52 to obtain the required signal, and original test signals are respectively transmitted from two ends of the data bus, so that the uniformity of test signal transmission is improved, and defects caused by loss of the test signals in the transmission process are improved.
Alternatively, as shown in fig. 4, fig. 4 is an equivalent circuit diagram of another test circuit in the display panel of fig. 1, the test circuit includes a first test contact 71, the first test contact 71 is electrically connected to the first node O1 and the second node O2 of the first data bus 51, and between the first node O1 and the second node O2, the first data bus 51 is electrically connected to the transistors corresponding to the first heteromorphic data lines 41; the test circuit includes a second test contact 72, the second test contact 72 being electrically connected to the third node O3 and the fourth node O4 of the second data bus 52, the second data bus 52 being electrically connected to the transistors corresponding to the second plurality of shaped area data lines 42 between the third node O3 and the fourth node O4.
Specifically, the structure shown in fig. 4 is similar to the structure shown in fig. 2, except that in the structure shown in fig. 4, the first data bus 51 is connected to only one test contact, the second data bus 52 is connected to only one test contact, and at the time of testing, the first test contact 71 transmits a test signal to the plurality of data lines 4 from the first node O1 and the second node O2 at the same time, and the second test contact 72 transmits a test signal to the plurality of data lines 4 at the same time as the third node O3 and the fourth node O4, so as to improve the uniformity of the test signal, compared to the structure shown in fig. 2, since the strip data bus is connected to only one test contact, the number of signal terminals of an external test component is saved at the time of testing, there is no need to provide two terminals providing the same signal, and since the contacts require a large space occupation, there is only one test contact connected to each data bus in the structure shown in fig. 4, the space is saved, and the design of a narrow frame is facilitated.
Alternatively, as shown in fig. 5 and 6, fig. 5 is an equivalent circuit schematic diagram of another test circuit in the display panel of fig. 1, and fig. 6 is an equivalent circuit schematic diagram of another test circuit in the display panel of fig. 1, where the first data bus 51 includes a green first data bus 51G, a red first data bus 51R, and a blue first data bus 51B, the green first data bus 51G is electrically connected to the corresponding first special-shaped area data line 41 through the corresponding transistor, the red first data bus 51R is electrically connected to the corresponding first special-shaped area data line 41 through the corresponding transistor, and the blue first data bus 51B is electrically connected to the corresponding first special-shaped area data line 41 through the corresponding transistor; the second data buses 52 include a green second data bus 52G, a red second data bus 52R, and a blue second data bus 52B, the green second data bus 52G being electrically connected to the corresponding second shaped area data line 42 through the corresponding transistor, the red second data bus 52R being electrically connected to the corresponding second shaped area data line 42 through the corresponding transistor, the blue second data bus 52B being electrically connected to the corresponding second shaped area data bus 52 through the corresponding transistor; as shown in fig. 6, the test circuit includes a green partition transistor 6G, a red partition transistor 6R, and a blue partition transistor 6B, the green partition transistor 6G being connected in series between the green first data bus 51G and the green second data bus 52G, the red partition transistor 6R being connected in series between the red first data bus 51R and the red second data bus 52R, and the blue partition transistor 6B being connected in series between the blue first data bus 51B and the blue second data bus 52B.
Specifically, for example, fig. 5 and 6 also illustrate sub-pixels located in the display area, including a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B, where multiple columns of sub-pixels form a repeating unit 8, the multiple repeating units 8 are arranged along a first direction h1, each repeating unit 8 includes a first mixed-color sub-pixel column 81, a second mixed-color sub-pixel column 82, and a pure-color sub-pixel column 83, an ith sub-pixel in each sub-pixel column is connected to an ith scanning line (not shown in the figure), i has a value of 1, 2, 3, …, n, and n is a total number of sub-pixels in the sub-pixel column, and when the ith scanning line provides an on level, a voltage on the data line is transmitted to the corresponding sub-pixel for data writing. In the first mixed-color sub-pixel column 81, odd sub-pixels are red sub-pixels R, and even sub-pixels are blue sub-pixels B; in the second mixed-color sub-pixel column 82, the odd sub-pixels are blue sub-pixels B, the even sub-pixels are red sub-pixels R, and the sub-pixels in the pure-color sub-pixel column 83 are green sub-pixels G. Each first color mixing sub-pixel column 81 corresponds to one first transistor M1 and one second transistor M2, each second color mixing sub-pixel column 82 corresponds to one third transistor M3 and one fourth transistor M4, and each pure color sub-pixel column 83 corresponds to one fifth transistor M5.
In the test circuit corresponding to the first data bus 51, the first transistor M1 is connected in series between the data line 4 (including the first shaped area data line 41) corresponding to the corresponding first mixed color sub-pixel column 81 and the red first data bus 51R, the second transistor M2 is connected in series between the data line 4 (including the first shaped area data line 41) corresponding to the first mixed color sub-pixel column 81 and the blue first data bus 51B, the third transistor M3 is connected in series between the data line 4 (including the first shaped area data line 41) corresponding to the second mixed color sub-pixel column 82 and the blue first data bus 51B, and the fourth transistor M4 is connected in series between the data line 4 (including the first shaped area data line 41) corresponding to the pure color sub-pixel column 83 and the green first data bus 51G. Control terminals of all the first transistors M1 and the third transistor M3 are electrically connected to a first control line SW1, control terminals of all the second transistors M2 and the fourth transistor M4 are electrically connected to a second control line SW2, and control terminals of all the fifth transistors M5 are electrically connected to a third control line SW 3.
Similarly, in the test circuit corresponding to the second data bus 52, the first transistor M1 is connected in series between the data line 4 (including the second shaped area data line 42) corresponding to the corresponding first mixed color sub-pixel column 81 and the red second data bus 52R, the second transistor M2 is connected in series between the data line 4 (including the second shaped area data line 42) corresponding to the first mixed color sub-pixel column 81 and the blue second data bus 52B, the third transistor M3 is connected in series between the data line 4 (including the second shaped area data line 42) corresponding to the second mixed color sub-pixel column 82 and the blue second data bus 52B, and the fourth transistor M4 is connected in series between the data line 4 (including the second shaped area data line 42) corresponding to the pure color sub-pixel column 83 and the green second data bus 52G. Control terminals of all the first transistors M1 and the third transistor M3 are electrically connected to a fourth control line SW4, control terminals of all the second transistors M2 and the fourth transistor M4 are electrically connected to a fifth control line SW5, and control terminals of all the fifth transistors M5 are electrically connected to a sixth control line SW 6.
Here, the first control line SW1 and the fourth control line SW4 may be connected together, the second control line SW2 and the fifth control line SW5 may be connected together, and the third control line SW3 and the sixth control line SW6 may be connected together, as needed.
The following description will take the example of the test signals transmitted through the first data bus 51 as an example, where the first scan line 1 provides an on level, the other scan lines provide off signals, the first control line SW1 and the third control line SW3 provide an on level, the first transistor M1, the third transistor M3 and the fifth transistor M5 are controlled to be turned on, the second control line SW2 provides an off level, the second transistor M2 and the fourth transistor M4 are controlled to be turned off, the red test signal on the red first data bus 51R is transmitted to the red subpixel R in the first row, the blue test signal on the blue first data bus 51B is transmitted to the blue subpixel B in the first row, the test signal on the green first data bus 51G is transmitted to the green subpixel G in the first row, that is, the data writing of the subpixel in the first row 1 is completed, then entering the data writing of the sub-pixels of the next row; the 2 nd scan line provides an on level, the other scan lines provide an off level, the second control line SW2 and the third control line SW3 provide an on level, the second transistor M2, the fourth transistor M4 and the fifth transistor M5 are controlled to be turned on, the first control line SW1 provides an off level, the first transistor M1 and the third transistor M3 are controlled to be turned off, a red test signal on the red first data bus 51R is transmitted to the red subpixels R in the second row, a blue test signal on the blue first data bus 51B is transmitted to the blue subpixels B in the second row, a test signal on the green first data bus 51G is transmitted to the green subpixels G in the second row, that is, the data writing of the 2 nd row subpixels is completed, then the data writing of the next row subpixels is performed, and so on, the control is performed by the respective transistors, so that data signals of different colors can be transmitted to the subpixels of the corresponding colors for data writing, it should be understood that, according to different test frames, the data signal acquired by the sub-pixel may be a black signal, that is, a signal for controlling the sub-pixel not to emit light, for example, if a pure red frame is to be displayed, only the red sub-pixel R acquires the data voltage corresponding to light emission, and the data voltages acquired by the green sub-pixel G and the blue sub-pixel B are the data voltages corresponding to black.
It should be noted that the arrangement of the sub-pixels and the connection of the transistors shown in fig. 5 and fig. 6 are only examples, as long as the data bus can write the data of the corresponding color into the corresponding sub-pixel by controlling the transistors, and the arrangement of the sub-pixels and the connection structure between the data lines and the data bus are not limited in the embodiments of the present application.
As shown in fig. 1 and 6, the green partition transistor 6G, the red partition transistor 6R, and the blue partition transistor 6B are controlled to be turned off when the first irregularly shaped display area 11 alone or the second irregularly shaped display area 12 alone is tested. When the sub-area detection is not needed, for example, when the whole screen is tested, that is, all the display areas including the first special-shaped display area 11 and the second special-shaped display area 12 are simultaneously subjected to the lighting test, at this time, the green sub-area transistor 6G, the red sub-area transistor 6R and the blue sub-area transistor 6B can be controlled to be on, so that the uniformity of signal transmission can be improved, and the test effect can be improved.
Alternatively, as shown in fig. 1 to 4, the plurality of data lines 4 further include a plurality of normal area data lines 43, the plurality of normal area data lines 43 are located between the first special-shaped area data lines 41 and the second special-shaped area data lines 42, and the plurality of normal area data lines 43 extend from the normal display area 3 to the second non-display area 22; a part of the plurality of normal area data lines 43 is electrically connected to the first data bus line 51 through a transistor, and the other part is electrically connected to the second data bus line 52 through a transistor; the number of data lines 4 electrically connected to the first data bus 51 through transistors is equal to the number of data lines 4 electrically connected to the second data bus 52 through transistors.
Specifically, the first irregular area data line 41 is used to transmit data signals to the sub-pixels in the first irregular display area 11 and the area corresponding to the first irregular display area 11 in the normal display area 3, the second irregular area data line 42 is used to transmit data signals to the sub-pixels in the second irregular display area 12 and the area corresponding to the second irregular display area 12 in the normal display area 3, and the normal area data line 43 is used to transmit data signals to the sub-pixels in the area corresponding to the first non-display area 21 in the normal display area 3. In order to save space and circuit complexity, the normal area data line 43 may also be electrically connected to the first data bus 51 and the second data bus 52 through a transistor, the normal area data line 43 may be divided into two parts, one part corresponds to the first data bus 51, the other part corresponds to the second data bus 52, the first data bus 51 and the second data bus 52 may be disconnected in the middle of the first direction h1 of the display panel, wherein the number of the data lines 4 electrically connected to the first data bus 51 is equal to the number of the data lines 4 electrically connected to the second data bus 52, so as to improve the uniformity of signal transmission.
As shown in fig. 7, fig. 7 is a schematic structural diagram of a display device in an embodiment of the present application, and the embodiment of the present application further provides a display device including the display panel 100 in the embodiment.
The specific structure and principle of the display panel 100 are the same as those of the above embodiments, and are not described herein again. The display device may be any electronic device with a display function, such as a touch display screen, a mobile phone, a tablet computer, a notebook computer, or a television.
The display device in the embodiment of the application can independently carry out the lighting test on the first special-shaped area through the independent first data bus and independently carry out the lighting test on the second special-shaped area through the independent second data bus when the display panel is tested, so that the defect of the first special-shaped area or the second special-shaped area can be accurately and independently determined, the timely repair can be realized, and the product yield of the display panel is improved.
As shown in fig. 1 to 8, fig. 8 is a flowchart of a testing method in an embodiment of the present application, and the embodiment of the present application further provides a testing method for the display panel 100, where the method includes:
103, carrying out aging test;
and step 104, generating abnormal information.
Specifically, that is, if the current in the display panel is normal when the first irregularly shaped display area 11 is lit alone and the current in the display panel is normal when the second irregularly shaped display area 12 is lit alone, the burn-in test is performed. The independent lighting of the first special-shaped display area 11 means that only the first special-shaped display area 11 is lighted and displayed in all the display areas, and other display areas including the normal display area 3 and the second special-shaped display area 12 are not lighted, namely are in a black state; similarly, lighting the second shaped display area 12 alone means that only the second shaped display area 12 is illuminated and displayed, and no other display area is illuminated. When the first special-shaped display area 11 is independently lightened or the second special-shaped display area 12 is independently lightened, whether the first special-shaped display area 11 and the second special-shaped display area 12 are abnormal or not can be judged by a method for detecting current, and the judgment method is more accurate. When the two special-shaped display areas are judged to be abnormal, an aging test can be performed, wherein the aging test refers to that a larger current is used for lighting the whole display area (comprising the first special-shaped display area 11, the second special-shaped display area 12 and the normal display area 3). In the prior art, a test process of separately lighting by regions is not performed, but an aging test is directly performed, poor display is easily generated in a special-shaped display region, and if the poor display is found after the aging test, the repair cost is increased or the display cannot be repaired, so that the product yield of the display panel is reduced. In the embodiment of the present application, if the current corresponding to the first special-shaped display area 11 or the second special-shaped display area 12 is found to be abnormal in step 102, the abnormal information is generated, and a subsequent repairing process can be performed according to the abnormal information, so as to avoid further deterioration of the abnormality of the display panel caused by the aging test or other processes, or the display panel is abandoned, thereby avoiding waste of subsequent processes.
According to the test method in the embodiment of the application, on one hand, the test of independently lighting up the display panel in different areas is carried out before the aging test, so that the defects of the special-shaped display area can be found in advance, the timely repair is realized, and the product yield of the display panel is improved; on the other hand, the first special-shaped area can be independently subjected to the lighting test through the independent first data bus, and the second special-shaped area can be independently subjected to the lighting test through the independent second data bus, so that the defects of the first special-shaped area or the second special-shaped area can be accurately and independently determined, timely repair can be realized, and the product yield of the display panel is improved.
As shown in fig. 9, fig. 9 is a flowchart of another testing method in this embodiment, after the step 103 of performing the burn-in test, the method further includes:
and 105, judging whether brightness difference exists between the display areas, if so, entering 106, lighting the display area with higher brightness, and performing aging compensation.
Specifically, after the aging test, different light emitting regions may have brightness differences due to the aging test, for example, if it is determined in step 105 that the brightness of the first special-shaped display region 11 is high, and the brightness of the second special-shaped display region 12 and the normal display region 3 is close to and lower than the brightness of the first special-shaped display region 11, the first special-shaped display region 11 may be independently turned on for a period of time, so that the light emitting devices in the first special-shaped display region 11 are further aged, and the second special-shaped display region 12 and the normal display region 3 are not turned on, wherein the lifetime of the light emitting devices is kept unchanged, so as to make the brightness of the first special-shaped display region 11 close to the brightness of other display regions.
Optionally, in step 101, when the local lighting test is performed, the separately lit display area displays red or green.
Specifically, in step 101, since the first special-shaped display area 11 and the second special-shaped display area 12 need to be separately lighted, the lighting time of the light emitting devices in the special-shaped display area is longer than that of the light emitting devices in the normal display area 3, and if the picture test is performed by the blue pure color, the life of the blue light emitting devices is shorter, so that the lighting luminance of the first special-shaped display area 11 and the second special-shaped display area 12 is lower than that of the normal display area 3, therefore, in the embodiment of the present application, the local lighting test is selected to be performed by lighting the red sub-pixel or the green sub-pixel, so that the display defect caused by the local lighting test can be improved.
Optionally, the lighting the first specially shaped display area 11 alone comprises:
providing a first area test signal to the first data bus 51, so that the sub-pixels in the first special-shaped display area 11 corresponding to the first special-shaped area data lines 41 connected with the first data bus 51 emit light, and the sub-pixels in the normal display area 3 corresponding to the first special-shaped area data lines 41 connected with the first data bus 51 do not emit light;
providing a non-display test signal to the second data bus 52 to make the sub-pixels in the second special-shaped display area 12 corresponding to the second special-shaped area data lines 42 connected with the second data bus 52 not emit light and make the sub-pixels in the normal display area 3 corresponding to the second special-shaped area data lines 42 connected with the second data bus 52 not emit light;
illuminating the second shaped display area 12 alone comprises:
providing a non-display test signal to the first data bus 51, so that the sub-pixels in the first special-shaped display area 11 corresponding to the first special-shaped area data lines 41 connected with the first data bus 51 do not emit light, and the sub-pixels in the normal display area 3 corresponding to the first special-shaped area data lines 41 connected with the first data bus 51 do not emit light;
the second data bus 52 is provided with a second area test signal, so that the sub-pixels in the second special-shaped display area 12 corresponding to the second special-shaped area data lines 42 connected with the second data bus 52 emit light, and the sub-pixels in the normal display area 3 corresponding to the second special-shaped area data lines 42 connected with the second data bus 52 do not emit light.
Specifically, for example, in the configuration shown in fig. 5, when the first special-shaped display region 11 is lit alone using a red screen, in the entire display region, the scan lines sequentially increase the on level, and scan all the sub-pixels, and when scanning the rows of sub-pixels in the first special-shaped display region 11 and the second special-shaped display region 12, the red first data bus line 51R provides the lighting level, the green first data bus line 51G and the blue first data bus line 51B provide the black state level, and even if the red sub-pixel in the first special-shaped display region 11 lights up, displays red, the second data bus lines 52 corresponding to the three colors each provide the black state level, even if the sub-pixels in the second special-shaped display region 12 do not light up in the black state, until when scanning to the normal display region 3, all the first data bus lines 51 and the second data bus lines 52 provide the black state level, even if the sub-pixels in the normal display area 3 are all in the black state and do not emit light, it is achieved that the first special-shaped display area 11 is lit up separately using red.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.
Claims (11)
1. A display panel, comprising:
a first special-shaped display area, a first non-display area and a second special-shaped display area arranged along a first direction, wherein the first non-display area is positioned between the first special-shaped display area and the second special-shaped display area;
a normal display area and a second non-display area, the first non-display area, the normal display area and the second non-display area being arranged along a second direction, the normal display area being located between the first non-display area and the second non-display area;
a plurality of data lines extending in a second direction, the plurality of data lines including a plurality of first shaped area data lines and a plurality of second shaped area data lines, each of the first shaped area data lines extending from the first shaped display area and extending through the normal display area to the second non-display area, each of the second shaped area data lines extending from the second shaped display area and extending through the normal display area to the second non-display area;
the test circuit is positioned in the second non-display area;
the test circuit comprises a first data bus which is electrically connected with a plurality of first special-shaped area data lines through a first group of transistors;
the test circuit further comprises a second data bus which is electrically connected with a plurality of second special-shaped area data lines through a second group of transistors;
the first data bus and the second data bus are disconnected.
2. The display panel according to claim 1,
the test circuit also includes a partition transistor connected in series between the first data bus and the second data bus.
3. The display panel according to claim 1,
the test circuit comprises two first test contacts, wherein one first test contact is electrically connected to a first node of the first data bus, the other first test contact is electrically connected to a second node of the first data bus, and the first data bus is electrically connected to transistors corresponding to the first special-shaped area data lines between the first node and the second node;
the test circuit comprises two second test contacts, wherein one second test contact is electrically connected to a third node of the second data bus, the other second test contact is electrically connected to a fourth node of the second data bus, and the second data bus is electrically connected to the transistors corresponding to the second special-shaped area data lines between the third node and the fourth node.
4. The display panel according to claim 1,
the test circuit comprises a first test contact, the first test contact is electrically connected to a first node and a second node of the first data bus, and the first data bus is electrically connected to the transistors corresponding to the first special-shaped area data lines between the first node and the second node;
the test circuit comprises a second test contact which is electrically connected to a third node and a fourth node of the second data bus, and the second data bus is electrically connected to the transistors corresponding to the second special-shaped area data lines between the third node and the fourth node.
5. The display panel according to claim 1,
the first data buses comprise green first data buses, red first data buses and blue first data buses, the green first data buses are electrically connected to corresponding first special-shaped area data lines through corresponding transistors, the red first data buses are electrically connected to corresponding first special-shaped area data lines through corresponding transistors, and the blue first data buses are electrically connected to corresponding first special-shaped area data lines through corresponding transistors;
the second data buses comprise green second data buses, red second data buses and blue second data buses, the green second data buses are electrically connected to the corresponding second special-shaped area data lines through the corresponding transistors, the red second data buses are electrically connected to the corresponding second special-shaped area data lines through the corresponding transistors, and the blue second data buses are electrically connected to the corresponding second special-shaped area data lines through the corresponding transistors;
the test circuit comprises a green partition transistor, a red partition transistor and a blue partition transistor, wherein the green partition transistor is connected in series between the green first data bus and the green second data bus, the red partition transistor is connected in series between the red first data bus and the red second data bus, and the blue partition transistor is connected in series between the blue first data bus and the blue second data bus.
6. The display panel according to claim 1,
the plurality of data lines further include a plurality of normal area data lines between the first special-shaped area data line and the second special-shaped area data line, the plurality of normal area data lines extending from the normal display area to the second non-display area;
one part of the plurality of normal area data lines is electrically connected with the first data bus through a third group of transistors, and the other part of the plurality of normal area data lines is electrically connected with the second data bus through a fourth group of transistors;
the number of data lines electrically connected with the first data bus through the third group of transistors is equal to the number of data lines electrically connected with the second data bus through the fourth group of transistors.
7. A display device characterized by comprising the display panel according to any one of claims 1 to 6.
8. A testing method for a display panel according to any one of claims 1 to 6, the method comprising:
performing a local lighting test, the performing the local lighting test comprising:
independently lightening the first special-shaped display area and judging whether the current in the display panel is abnormal or not;
independently lightening the second special-shaped display area and judging whether the current in the display panel is abnormal or not;
and if the current in the display panel is normal when the first special-shaped display area is independently lightened and the current in the display panel is normal when the second special-shaped display area is independently lightened, carrying out an aging test.
9. The method of claim 8, further comprising, after the performing the burn-in test,:
and judging whether brightness difference exists between the display areas, if so, lightening the display area with higher brightness, and carrying out aging compensation.
10. The method of claim 8,
when the partial lighting test is performed, the display area which is lighted up separately displays red or green.
11. The method of claim 8,
said individually illuminating said first shaped display area comprises:
providing a first area test signal to the first data bus, so that the sub-pixels in a first special-shaped display area corresponding to a first special-shaped area data line connected with the first data bus emit light, and the sub-pixels in a normal display area corresponding to the first special-shaped area data line connected with the first data bus do not emit light;
providing a non-display test signal to the second data bus, so that the sub-pixels in a second special-shaped display area corresponding to a second special-shaped area data line connected with the second data bus do not emit light, and the sub-pixels in the normal display area corresponding to the second special-shaped area data line connected with the second data bus do not emit light;
said individually illuminating said second shaped display area comprises:
providing a non-display test signal to the first data bus, so that the sub-pixels in the first special-shaped display area corresponding to the first special-shaped area data lines connected with the first data bus do not emit light, and the sub-pixels in the normal display area corresponding to the first special-shaped area data lines connected with the first data bus do not emit light;
and providing a second area test signal to the second data bus, so that the sub-pixels in the second special-shaped display area corresponding to the second special-shaped area data line connected with the second data bus emit light, and the sub-pixels in the normal display area corresponding to the second special-shaped area data line connected with the second data bus do not emit light.
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| CN113327529B (en) * | 2021-05-26 | 2023-11-28 | 京东方科技集团股份有限公司 | Display panel, pixel detection method and display device |
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