CN110867459A - Display panel, manufacturing method thereof and display device - Google Patents
Display panel, manufacturing method thereof and display device Download PDFInfo
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- CN110867459A CN110867459A CN201911184320.6A CN201911184320A CN110867459A CN 110867459 A CN110867459 A CN 110867459A CN 201911184320 A CN201911184320 A CN 201911184320A CN 110867459 A CN110867459 A CN 110867459A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1237—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a different composition, shape, layout or thickness of the gate insulator in different devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1229—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with different crystal properties within a device or between different devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
Abstract
The invention has described a display panel and its preparation method, display device, including, the drive circuit includes driving thin-film transistor and switching thin-film transistor, the gate dielectric of the driving thin-film transistor is the first insulating layer, the gate dielectric of the switching thin-film transistor is the second gate dielectric, the thickness of the first gate dielectric is greater than the thickness of the second gate dielectric, the first gate dielectric includes barrier layer and first insulating layer at least, the second gate dielectric includes the first insulating layer at least, the barrier layer locates at the first insulating layer and is close to the active layer one side of the driving thin-film transistor. Compared with the prior art, the driving capability of the driving thin film transistor is improved, and the starting speed of the switching thin film transistor is increased.
Description
Technical Field
The present invention relates to the field of display, and in particular, to a display panel, a manufacturing method thereof, and a display device.
Background
An Organic Light-Emitting Diode (OLED) display, also called an Organic electroluminescent display, is a new flat panel display device, and has the advantages of simple manufacturing process, low cost, low power consumption, high brightness, wide application range of operating temperature, Light and thin volume, fast response speed, easy realization of color display and large-screen display, easy realization of matching with an integrated circuit driver, easy realization of flexible display, and the like, so that the OLED display has a wide application prospect.
OLEDs can be classified into two major categories, namely, direct addressing and Thin Film Transistor (TFT) Matrix addressing, namely, Passive Matrix OLEDs (PMOLEDs) and Active Matrix OLEDs (AMOLEDs) according to driving methods. The AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a large-sized display device with high definition.
The thin film transistor in the Driving circuit comprises a Driving thin film transistor (Driving TFT) and a switching thin film transistor (Switch TFT), and when the organic electroluminescent device is manufactured, the gate insulating layer of the Driving thin film transistor and the gate insulating layer of the switching thin film transistor are basically arranged the same, so that the subthreshold swing of the Driving thin film transistor and the switching thin film transistor is similar, the subthreshold swing refers to an important parameter when the transistor works in a subthreshold state or is used as a logic Switch and can also be called an S factor, the S factor can be defined as S ═ dVgs/d (1og10Id), S is equal to the gate voltage increment △ Vgs required when the drain current Id of the thin film transistor is changed by one order of magnitude, and the unit of the subthreshold swing can be [ mV/decade ].
The larger the sub-threshold swing of the driving thin film transistor is, the more accurate the driving thin film transistor can control the gray scale of the organic light emitting display panel. The smaller the subthreshold swing of the switching thin film transistor is, the faster the switching thin film transistor is switched on.
Therefore, there is a contradiction between the subthreshold swing of the driving thin film transistor and the subthreshold swing of the switching thin film transistor, so that a scheme for solving the contradiction between the subthreshold swing and the switching thin film transistor is invented and is very necessary for further improving the quality of the organic light-emitting display panel.
Disclosure of Invention
In view of this, the present invention provides a display panel, a manufacturing method thereof and a display device, which solve the problem of achieving the driving capability of a driving thin film transistor and satisfying the fast turn-on capability of a switching thin film transistor.
In a first aspect, an embodiment of the present invention provides a display panel, including:
a substrate base plate;
the thin film transistors are positioned on one side of the substrate base plate and comprise driving thin film transistors and switching thin film transistors;
the grid electrode insulating layer of the driving thin film transistor is a first grid electrode insulating layer, the grid electrode insulating layer of the switching thin film transistor is a second grid electrode insulating layer, and the thickness of the first grid electrode insulating layer is larger than that of the second grid electrode insulating layer;
the first grid electrode insulating layer at least comprises a blocking layer and a first insulating layer, the second grid electrode insulating layer at least comprises the first insulating layer, and the blocking layer is located on one side, close to the active layer of the driving thin film transistor, of the first insulating layer.
Based on the same inventive concept, in a second aspect, the invention further provides a display device comprising any one of the display panels provided by the invention.
In a third aspect, the present invention further provides a method for manufacturing a display panel, including:
providing a substrate base plate;
forming a plurality of thin film transistors on the substrate, wherein the thin film transistors include a driving thin film transistor and a switching thin film transistor;
the gate insulating layer of the driving thin film transistor is a first gate insulating layer, the gate insulating layer of the switching thin film transistor is a second gate insulating layer, and the thickness of the first gate insulating layer is greater than that of the second gate insulating layer;
the first gate insulating layer at least comprises a blocking layer and a first insulating layer, the second gate insulating layer at least comprises the first insulating layer, and the blocking layer is positioned on one side, close to the active layer of the driving thin film transistor, of the first insulating layer.
Compared with the prior art, the invention also provides a display panel, a manufacturing method thereof and a display device, and at least the following beneficial effects are realized:
according to the display panel manufactured by the manufacturing method, on one hand, the driving circuit comprises the driving thin film transistor and the switch thin film transistor, the grid electrode insulating layer of the driving thin film transistor is a first insulating layer, the grid electrode insulating layer of the switch thin film transistor is a second grid electrode insulating layer, the thickness of the first grid electrode insulating layer is larger than that of the second grid electrode insulating layer, namely the thickness of the grid electrode insulating layer of the driving thin film transistor is larger than that of the grid electrode insulating layer of the switch thin film transistor, the subthreshold swing amplitude of the driving thin film transistor can be increased, further, under the condition that the operating voltage and the circuit operating speed are not influenced, the gray scale definition is facilitated, the driving capability of the driving thin film transistor is improved, and the display performance; meanwhile, the sub-threshold swing amplitude of the switch thin film transistor can be reduced, and the starting speed of the switch thin film transistor is increased; the problem that the thicknesses of the gate insulation layers of the driving thin film transistor and the switching thin film transistor are incompatible is balanced, the respective gate insulation layers of the driving thin film transistor and the switching thin film transistor are guaranteed to be in the optimal thickness, the stability of a driving circuit is improved, and the display quality is improved. On the other hand, the first gate insulating layer at least comprises a blocking layer and a first insulating layer, the second gate insulating layer at least comprises the first insulating layer, the blocking layer is positioned on one side, close to the active layer of the driving thin film transistor, of the first insulating layer, the first gate insulating layer and the second gate insulating layer both comprise the first insulating layer, namely the first insulating layer of the second gate insulating layer and the first insulating layer in the first gate insulating layer can be prepared from the same material on the same layer, extra preparation processes are not needed for preparing the gate insulating layers of the driving thin film transistor and the switching thin film transistor step by step, the preparation processes are simplified, and the manufacturing cost is reduced.
Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above-described technical effects simultaneously.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of an alternative implementation of a display panel according to an embodiment of the present invention;
FIG. 2 is a graph showing a comparison of the crystallinity of the active layer of the driving TFT and the crystallinity of the active layer of the switching TFT in the display panel shown in FIG. 1;
FIG. 3 is a schematic diagram of yet another alternative embodiment of a display panel according to an embodiment of the present invention;
fig. 4 is a schematic diagram of an alternative embodiment of a driving tft of a display panel according to an embodiment of the present invention;
fig. 5 is a schematic diagram of another alternative embodiment of a driving thin film transistor of a display panel according to an embodiment of the present invention;
fig. 6 is a schematic diagram of another alternative embodiment of a driving thin film transistor of a display panel according to an embodiment of the present invention;
FIG. 7 is a diagram illustrating an alternative embodiment of a driving TFT of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic diagram illustrating a graph of the light reflectivity of the barrier layer and the thickness of the barrier layer in the display panel according to the embodiment of the invention;
FIG. 9 is a schematic view of another alternative embodiment of a display panel according to an embodiment of the present invention;
FIG. 10 is a schematic view of a display device according to an embodiment of the present invention;
fig. 11 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present invention;
FIG. 12 is a structural diagram of a display panel corresponding to the manufacturing method shown in FIG. 11;
FIG. 13 is a flowchart illustrating a method for fabricating a display panel according to another embodiment of the present invention;
FIG. 14 is a structural diagram of a display panel corresponding to the manufacturing method shown in FIG. 13;
FIG. 15 is a flowchart illustrating a method for fabricating a display panel according to another embodiment of the present invention;
fig. 16 is a structural diagram of a display panel corresponding to the manufacturing method shown in fig. 15.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Fig. 1 is a schematic diagram of an alternative implementation of a display panel according to an embodiment of the present invention. As shown in fig. 1, the display panel includes a substrate 10, a plurality of thin film transistors disposed on one side of the substrate, wherein the thin film transistors include a driving thin film transistor 20 and a switching thin film transistor 30, a gate insulating layer of the driving thin film transistor 20 is a first gate insulating layer 401, a gate insulating layer of the switching thin film transistor 30 is a second gate insulating layer 402, and the first gate insulating layer 401 and the second gate insulating layer 402 have a thickness greater than that of the first gate insulating layer 401.
The Gate insulating layer of the thin film transistor is understood to be a Gate insulating layer (GI) of the thin film transistor, which is a commonly known insulating layer between an active layer of the thin film transistor and a Gate electrode of the thin film transistor. It should be noted that the thickness of the gate insulating layer may be understood as the film thickness of the gate insulating layer in the direction perpendicular to the plane of the substrate.
With continued reference to fig. 1, the first gate insulating layer 401 includes at least a barrier layer 4022 and a first insulating layer 4011, the second gate insulating layer 402 includes at least a first insulating layer 4011, wherein the barrier layer 4022 is located on a side of the first insulating layer 4011 close to the active layer 201 of the driving thin film transistor 20, i.e., the barrier layer 4022 is located between the active layer 201 of the driving thin film transistor 20 and the first insulating layer 4011, and the gate insulating layer 402 of the switching thin film transistor 30 does not include the barrier layer 4022. On one hand, the thickness of the gate insulating layer of the driving thin film transistor is larger than that of the gate insulating layer of the switching thin film transistor, so that the subthreshold swing of the driving thin film transistor can be increased, further, under the condition that the operating voltage and the circuit operating speed are not influenced, the gray scale definition is favorably realized, the driving energy of the driving thin film transistor is improved, and the display performance of the display panel is improved; meanwhile, the sub-threshold swing amplitude of the switch thin film transistor can be reduced, and the starting speed of the switch thin film transistor is increased; the problem that the thicknesses of the gate insulation layers of the driving thin film transistor and the switching thin film transistor are incompatible is balanced, the respective gate insulation layers of the driving thin film transistor and the switching thin film transistor are ensured to be in the optimal thickness, the stability of a driving circuit is improved, and the display quality is improved; on the other hand, the barrier layer is positioned on one side of the first insulating layer, which is close to the active layer of the driving thin film transistor, and the first gate insulating layer and the second gate insulating layer both comprise the first insulating layer, namely the first insulating layer of the second gate insulating layer and the first insulating layer in the first gate insulating layer can be prepared from the same material in the same layer, so that the gate insulating layers of the driving thin film transistor and the switching thin film transistor are prepared step by step without extra preparation processes, the preparation processes are simplified, and the manufacturing cost is reduced; on the other hand, the grid insulating layer of the driving thin film transistor comprises a blocking layer which can absorb or reflect part of laser in an ELA process, so that the crystallization degree of the polycrystalline silicon layer on the active layer of the driving thin film transistor is smaller than that of the switching thin film transistor, the working current of the driving thin film transistor is reduced, different gray scales can be displayed better, and the display quality is improved.
The driving TFT 20 is a Low Temperature polysilicon thin Film Transistor (LTPS-TFT), and in the preparation process of the Low Temperature polysilicon thin Film Transistor, an Excimer Laser Annealing (ELA) is performed on an active layer of the LTPS-TFT, and an amorphous silicon layer of the active layer is annealed to crystallize the amorphous silicon layer, so that a polysilicon layer with a certain grain size and in regular arrangement is formed. In the display panel, the driving thin film transistor in the driving circuit needs to have a lower leakage current property, and if the grain size of the polysilicon layer is larger, the polysilicon layer is not favorable for manufacturing the thin film transistor with the lower leakage current property, so the grain size of the polysilicon layer of the driving thin film transistor cannot be too large. On the contrary, the switching thin film transistor needs higher carrier mobility and on-state current characteristics, which is beneficial to the on-off capability of the switching thin film transistor and improves the on-speed.
As shown in fig. 1, a blocking layer is disposed on a surface of the first active layer 201 of the driving thin film transistor 20, which is away from the substrate 10, on one hand, the blocking layer can increase the thickness of the gate insulating layer of the driving thin film transistor, ensure that the thickness of the gate insulating layer 401 of the driving thin film transistor is greater than that of the gate insulating layer of the switching thin film transistor, improve the driving capability of the driving thin film transistor, better display different gray scales, and ensure the on/off rate of the switching thin film transistor; on the other hand, the blocking layer covers the surface of one side of the active layer 201, after the active layer is prepared, ELA process is performed on the amorphous silicon layer of the thin film transistor (i.e. the active layer is formed by depositing a layer of amorphous silicon and then crystallizing the amorphous silicon layer into a polysilicon layer), the blocking layer 4022 at the driving thin film transistor 20 can absorb a part of laser light, a certain exposure is reduced, compared with the exposure of the driving thin film transistor 20, the exposure of the blocking portion of the switching thin film transistor due to the absence of the blocking layer 4022 is reduced, and in the same exposure process, the crystallization degree of the second active layer 301 (polysilicon layer) of the switching thin film transistor 30 is greater than that of the first active layer 201 (polysilicon layer) of the driving thin film transistor 20.
The display panel further comprises a light emitting device, the light emitting device comprises an anode, a light emitting layer and a cathode, the driving thin film transistor drives the light emitting device to emit light, and the switching thin film transistor swimsuit transmits signals to perform a switching function. The driving thin film transistor is illustrated as a transistor connected to the anode 80 in fig. 1, but the structure of the present application is not limited thereto.
Optionally, the grain size of the first active layer of the driving thin film transistor is smaller than the grain size of the second active layer.
Fig. 2 is a graph comparing the crystallinity of the active layer of the driving thin film transistor and the crystallinity of the active layer of the switching thin film transistor in the display panel shown in fig. 1. The grain size of the polysilicon layer (the second active layer 301) of the switching thin film transistor 30 is larger than that of the polysilicon layer (the first active layer 201) of the driving thin film transistor 20 as shown in fig. 2. The blocking layer 4022 is used for blocking the first active layer 201 of the driving transistor 20, and in the ELA process, the blocking layer 4022 absorbs or reflects part of energy of laser, so that the energy absorbed by the first active layer 201 is small, the capability of solidifying crystal grains is low due to the low melting degree of the laser, and the formed crystal grains are small; meanwhile, since the switching thin film transistor 30 has no barrier layer in the ELA process, the original amorphous silicon layer of the switching thin film transistor has large energy absorption, and the formed polysilicon layer (the second active layer 301) has good crystallization capability and large crystal grains. Through setting up the barrier layer, guarantee that switch thin film transistor and drive thin film transistor have different crystallization degree, not only guaranteed that switch thin film transistor has great operating current, improved switch thin film transistor's opening and closing speed, still guaranteed that drive thin film transistor has less operating current concurrently, different grey scales of better demonstration, improvement display quality.
With continuing reference to fig. 1, as shown in fig. 1, an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, and a source drain layer are sequentially disposed on the substrate 10, wherein the gate electrode of the driving thin film transistor 20 is the first gate electrode 202, the active layer of the driving thin film transistor 20 is the first active layer 201, the driving thin film transistor 20 further includes a first source electrode 203S and a first drain electrode 203D, and the switching thin film transistor 30 includes a second gate electrode 302, a second active layer 301, and a second source drain electrode 303, wherein the source electrode 303S and the drain electrode 303D. The first active layer 201 of the driving thin film transistor 20 and the second active layer 301 of the switching thin film transistor 30 are disposed in the same layer and made of the same material, and the first gate electrode 202 of the driving thin film transistor 20 and the second gate electrode 302 of the switching thin film transistor 30 are fabricated in the same layer. Optionally, the switching thin film transistor is an LTPS-TFT, and the driving thin film transistor is an LTPS-TFT. The switch thin film transistor and the drive thin film transistor can be prepared from the same material in the same layer, the process is simplified, in order to respectively ensure that the drive thin film transistor and the switch thin film transistor are in the optimal performance, the ELA process is utilized to set the barrier layer, the crystallization degree difference of the drive thin film transistor and the switch thin film transistor can be ensured, the gate insulation layers of the drive thin film transistor and the switch thin film transistor can be ensured to be in the respective optimal thickness through the barrier layer, and the stability of a drive circuit and the reliability of a display panel are improved.
With reference to fig. 1, optionally, the display panel may further include a storage capacitor, the first plate Cst1 of the storage capacitor and the gate of the driving thin film transistor are made of the same material, and the second plate Cst2 of the storage capacitor and the first plate Cst1 are overlapped in a direction perpendicular to the substrate to form the storage capacitor. Optionally, the display panel includes some interlayer insulating layers, as shown in fig. 1, the first interlayer insulating layer 501, the second interlayer insulating layer 502, the second interlayer insulating layer, and a partial insulating layer 60 and a planarization layer 70, where the planarization layer 70 is located on a side of the thin film transistor source/drain, which is far away from the substrate, to implement a planarization function, ensure stability of a subsequent display panel manufacturing process, and improve performance of the display panel. Optionally, the display panel further includes a light emitting layer, the light emitting layer is located on one side of the thin film transistor source drain, which is far away from the substrate, and the light emitting layer includes an anode 80, a light emitting device and a cathode (only the anode 80 is shown in the figure, and the rest structures are not shown); optionally, the light emitting device includes an OLED light emitting device and an LED light emitting device, which is not limited in this application.
It should be noted that the position of the barrier layer is defined between the first insulating layer and the active layer, but the type of the thin film transistor is not limited, that is, the thin film transistor in this application may be a top gate or a bottom gate structure.
Optionally, the active layer of the driving thin film transistor includes a lap joint region, an ohmic contact region and a channel region, the ohmic contact region connects the channel region and the lap joint region, and the blocking layer at least covers the channel region.
Fig. 3 is a schematic diagram of another alternative implementation of the display panel according to the embodiment of the present invention. As shown in fig. 3, the active layer 201 of the driving tft 20 includes a strap 2011, an ohmic contact region 2012 and a channel region 2013, the ohmic contact region 2012 connects the channel region 2013 and the strap 2011, the strap 2011 is a connection region between the source 203S and the drain 203D of the driving tft 20 and the active layer, and the channel region 2013 is a region overlapping with the first gate 202. Optionally, there is only one channel region 2013, two ohmic contact regions 2012 are respectively disposed on two sides of the channel region 2013 to connect to the overlapping regions 2011 on two sides, generally to avoid generation of a carrier effect, the overlapping regions 2011 are heavily doped ion implantation, the channel region 2012 is lightly doped ion implantation, and the ohmic contact regions 2012 are ion doping transition regions where a heavily doped ion implantation region is transitioned to a lightly doped ion implantation region. Optionally, barrier layer 4022 covers at least channel region 2013.
Fig. 4 is a schematic diagram of an alternative embodiment of a driving thin film transistor of a display panel according to an embodiment of the present invention. For the sake of clarity and description of the relative position relationship between the blocking layer and the active layer, the present inventors omit or simplify other layers of the display panel, and do not limit the structure of the present invention. Referring to fig. 4, the driving tft 20 includes a first active layer 201 (including a plurality of partitions), a first gate insulating layer 401 (including a blocking layer 4022 and a first insulating layer 4011), a first gate 202, and a source drain (including a source 203S and a drain 203D), wherein the blocking layer 4022 covers a channel region 2013, i.e., an orthographic projection of the blocking layer 4022 on the first active layer 201 covers the channel region 2013, when heavily doped ion implantation is performed on a landing area of the first active layer 201, the blocking layer just can block excessive ion implantation during heavily doped ion implantation into the channel region, which affects ion implantation in the channel region 2013, affects electric driving capability of the driving tft, does not need to additionally use other film layers or perform patterning again to prepare shielding layers, and the ELA blocking layer of ion implantation is multiplexed with the ELA blocking layer, which reduces one mask, reduces alignment accuracy, the process is simplified, a Half Tone eye Mask (HTM) is not needed, and the manufacturing cost is saved. Meanwhile, the barrier layer is used as a shielding layer for ion implantation, symmetrical overlapping regions can be naturally formed on two sides of the polycrystalline silicon layer, and grid region deviation caused by doped ion implantation deviation is avoided.
Optionally, the barrier layer covers the ohmic contact region.
Fig. 5 is a schematic diagram of another alternative embodiment of a driving thin film transistor of a display panel according to an embodiment of the present invention. As shown in fig. 5, the barrier layer 4022 covers the ohmic contact region 2012 and the channel region 2013, and an orthographic projection of the barrier layer 4022 on the plane of the first active layer 201 covers the channel region 2013 and the ohmic contact region 2012. When the polycrystalline silicon layer of the driving thin film transistor 20 is subjected to ion implantation, the first gate 202 and the barrier layer 4022 shield the channel region 203, the barrier layer 4022 partially shields the ohmic contact region 2013, the overlapping region 2011 does not have film shielding, heavy concentration ion doping in the overlapping region 2011 is facilitated, and low concentration ion doping in the channel region 2013 is achieved.
Optionally, the thickness of the barrier layer in the channel region is greater than the thickness of the barrier layer in the ohmic contact region.
Fig. 6 is a schematic diagram of another alternative embodiment of a driving thin film transistor of a display panel according to an embodiment of the present invention. As shown in fig. 6, the thickness of barrier layer 4022 located in channel region 2013 is greater than the thickness of barrier layer 4022 located in ohmic contact region 2012, where the thickness is defined as the thickness of the barrier layer in a direction perpendicular to the plane of the substrate. By adjusting the thicknesses of the barrier layers in different areas differently, different doping concentrations in different areas can be realized in the same ion implantation preparation process.
Optionally, the barrier layer covers the lap zone.
Fig. 7 is a schematic diagram of another alternative embodiment of a driving thin film transistor of a display panel according to an embodiment of the present invention. As shown in fig. 7, the barrier layer 4022 covers the strap 2011, the ohmic contact region 2012 and the channel region 2013, and the barrier layer 4022 entirely covers the first active layer 201, so as to ensure the uniformity of the crystallization degree of the amorphous silicon layer in the ELA process. Optionally, the thickness of the barrier layer 4022 covering the channel region 2013, the thickness of the barrier layer 4022 covering the ohmic contact region 2012, and the thickness of the barrier layer 4022 covering the overlapping region 2011 are gradually reduced, so that the difference of doping concentrations of the respective regions is realized.
Optionally, the barrier layer comprises indium gallium zinc oxide.
With continued reference to fig. 1, the material of the barrier layer 4022 includes Indium Gallium Zinc Oxide (IGZO), and IGZO is used as the barrier layer 4022, which has good absorption and reflection capability for laser light in the ELA process, and is beneficial to incomplete exposure of the driving thin film transistor in the ELA process; meanwhile, the main body material of the IGZO is Zinc oxide (ZnO), the melting point of the ZnO is 1975 ℃, and the melting point of silicon (Si) in the active layer is 1410 ℃, so that impurities cannot be brought to the active layer in the ELA crystallization process, and the driving capability of the driving thin film transistor is improved.
Optionally, the thickness of the barrier layer is between 30nm and 50 nm.
The barrier layer material is IGZO, and the thickness of the barrier layer material is between 30nm and 50 nm. The barrier layer reflects or absorbs certain energy of laser in the ELA process, so that the energy absorbed by the first active layer 201 is small, the melting degree of the laser is low, the ability of the laser to condense crystal grains is low, the formed crystal grains are small, the driving thin film transistor is guaranteed to have small working current, different gray scales are displayed better, and the display quality is improved. Fig. 8 is a graph illustrating the light reflectivity of the barrier layer and the thickness of the barrier layer in the display panel according to the embodiment of the invention. As shown in fig. 8, the abscissa (unit: nm) represents the thickness d of the barrier layer, and the ordinate represents the transmittance of the barrier layer for laser, when the barrier layer thickness d of the barrier layer is between 30nm and 50nm, the transmittance of the barrier layer is the lowest, the ELA energy image received by the amorphous silicon layer is the smallest, the grain size is the smallest, which is beneficial to driving the thin film transistor, and displaying gray scale better. When the thickness of the barrier layer is larger than 50nm or smaller than 30nm, the transmittance of the barrier layer is increased, the barrier effect on ELA laser is weak, the crystallization degree of the active layer is influenced greatly, and gray scale display of the thin film transistor is not facilitated.
Optionally, the driving thin film transistor is a polysilicon thin film transistor, and the switching thin film transistor is an oxide thin film transistor; the active layer and the barrier layer of the oxide thin film transistor are made of the same material at the same layer.
Fig. 9 is a schematic view of another alternative embodiment of the display panel according to the embodiment of the invention. As shown in fig. 9, the driving thin film transistor 20 is a polysilicon thin film transistor (LTPS-TFT), and the switching thin film transistor 30 is an Oxide thin film transistor (Oxide thin film transistor), wherein the active layer 301 and the barrier layer 4022 of the Oxide thin film transistor are made of the same material in the same layer, i.e., the second active layer 301 and the barrier layer 4022 are both IGZO, which saves the process and reduces the cost. In addition, the oxide thin film transistor has higher electron mobility compared with a polysilicon thin film transistor, the switch thin film transistor for realizing the switch in the pixel driving circuit provided by the embodiment of the invention has the advantages of simple manufacturing process, low cost and high large-area uniformity and is an oxide thin film transistor.
Fig. 10 is a schematic view of a display device according to an embodiment of the present invention. As shown in fig. 10, the display device includes the display panel provided in any embodiment of the present invention. The display device provided by the invention includes but is not limited to the following categories: the mobile terminal comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, a mobile phone, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like.
Based on the same inventive concept, the invention also provides a manufacturing method of the display panel, which comprises the step of providing a substrate base plate. Forming a plurality of thin film transistors on the provided substrate base plate, wherein the thin film transistors comprise a driving thin film transistor and a switching thin film transistor, a grid insulation layer of the driving thin film transistor is a first grid insulation layer, a grid insulation layer of the switching thin film transistor is a second grid insulation layer, and the thickness of the first grid insulation layer is larger than that of the second grid insulation layer; the first grid electrode insulating layer at least comprises a blocking layer and a first insulating layer, the second grid electrode insulating layer at least comprises the first insulating layer, and the blocking layer is located on one side, close to the active layer of the driving thin film transistor, of the first insulating layer.
Fig. 11 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present invention. Fig. 12 is a structural diagram of a display panel corresponding to the manufacturing method shown in correspondence with fig. 11. Referring to fig. 11 and 12 in combination, the method for manufacturing a display panel according to the present invention includes step S1, providing a substrate; step S2, forming a plurality of thin film transistors on the substrate, wherein the thin film transistors include a driving thin film transistor and a switching thin film transistor, a gate insulating layer of the driving thin film transistor is a first gate insulating layer, a gate insulating layer of the switching thin film transistor is a second gate insulating layer, and a thickness of the first gate insulating layer is greater than a thickness of the second gate insulating layer; the first gate insulating layer includes at least a barrier layer and a first insulating layer, the second gate insulating layer includes at least a first insulating layer, the barrier layer is located on the side of the first insulating layer close to the active layer of the driving thin film transistor, that is, the barrier layer 4022 is located between the active layer 201 of the driving thin film transistor 20 and the first insulating layer 4011, and the gate insulating layer 402 of the switching thin film transistor 30 does not include the barrier layer 4022. On one hand, the thickness of the gate insulating layer of the driving thin film transistor is larger than that of the gate insulating layer of the switching thin film transistor, so that the subthreshold swing of the driving thin film transistor can be increased, further, under the condition that the operating voltage and the circuit operating speed are not influenced, the gray scale definition is favorably realized, the driving energy of the driving thin film transistor is improved, and the display performance of the display panel is improved; meanwhile, the sub-threshold swing amplitude of the switch thin film transistor can be reduced, and the starting speed of the switch thin film transistor is increased; the problem that the thicknesses of the gate insulation layers of the driving thin film transistor and the switching thin film transistor are incompatible is balanced, the respective gate insulation layers of the driving thin film transistor and the switching thin film transistor are ensured to be in the optimal thickness, the stability of a driving circuit is improved, and the display quality is improved; on the other hand, the barrier layer is positioned on one side of the first insulating layer, which is close to the active layer of the driving thin film transistor, and the first gate insulating layer and the second gate insulating layer both comprise the first insulating layer, namely the first insulating layer of the second gate insulating layer and the first insulating layer in the first gate insulating layer can be prepared from the same material in the same layer, so that the gate insulating layers of the driving thin film transistor and the switching thin film transistor are prepared step by step without extra preparation processes, the preparation processes are simplified, and the manufacturing cost is reduced; on the other hand, the grid insulating layer of the driving thin film transistor comprises a blocking layer which can absorb or reflect part of laser in an ELA process, so that the crystallization degree of the polycrystalline silicon layer on the active layer of the driving thin film transistor is smaller than that of the switching thin film transistor, the working current of the driving thin film transistor is reduced, different gray scales can be displayed better, and the display quality is improved.
Optionally, forming a plurality of the thin film transistors on the substrate base plate includes forming an active layer over the substrate base plate, the active layer including an active layer of the driving thin film transistor and an active layer of the switching thin film transistor; forming the barrier layer above the film layer on which the active layer of the driving thin film transistor is located; forming a first insulating layer above the barrier layer and the film layer on which the switch thin film transistor is located; forming a gate electrode of a thin film transistor over the first insulating layer, the gate electrode including a gate electrode of a driving thin film transistor and a gate electrode of the switching thin film transistor; forming an interlayer insulating layer above the film layer on which the gate is positioned; and forming a source drain of the thin film transistor above the interlayer insulating layer, wherein the source drain comprises a source drain of the driving thin film transistor and a source drain of the switch thin film transistor.
Fig. 13 is a flowchart of a method for manufacturing a display panel according to another embodiment of the present invention. Fig. 14 is a structural diagram of a display panel corresponding to the manufacturing method shown in fig. 13. As shown in fig. 13 and 14 in conjunction, step S2 forms a plurality of thin film transistors on the base substrate 10, including,
step one S21, forming active layers including the active layer 201 (first active layer) of the driving thin film transistor 20 and the active layer 301 (second active layer) of the switching thin film transistor 30 above the base substrate 10;
step two S22, forming a barrier layer 4022 over the active layer 201 of the driving tft 20
Step three, S23, forming a first insulating layer 4011 over the barrier layer 4022 and the layer where the switching thin film transistor 30 is located;
step four S24, forming gates of the thin film transistors, including the gate 202 (first gate) of the driving thin film transistor 20 and the gate 302 (second gate) of the switching thin film transistor 30, over the first insulating layer 4011;
step five S25, forming an interlayer insulating layer 50 over the gate layer; in which the interlayer insulating layer may be a plurality of layers, only three interlayer insulating layers, a first interlayer insulating layer 501, a second interlayer insulating layer 502, and a third interlayer insulating layer 503, are shown in fig. 13;
step six S26, forming source and drain electrodes of the thin film transistor on the interlayer insulating layer 50, where the source and drain electrodes include the source and drain electrodes (the first source electrode 203S and the first drain electrode 203D) of the driving thin film transistor 20 and the source and drain electrodes (the second source electrode 303S and the second drain electrode 303D) of the switching thin film transistor 30.
Optionally, before forming the first insulating layer over the barrier layer and the film layer where the switching thin film transistor is located, forming an amorphous silicon layer on a substrate, where the amorphous silicon layer includes a first amorphous silicon of the driving thin film transistor and a second amorphous silicon of the switching thin film transistor; forming the barrier layer on the amorphous silicon; irradiating the amorphous silicon layer by using a light source for crystallization treatment, wherein the amorphous silicon layer is converted into a polycrystalline silicon layer, and the polycrystalline silicon layer comprises first polycrystalline silicon of the driving thin film transistor and second polycrystalline silicon of the switching thin film transistor; doping and patterning the polysilicon layer.
Fig. 15 is a flowchart of a method for manufacturing a display panel according to another embodiment of the present invention. Fig. 16 is a structural diagram of a display panel corresponding to the manufacturing method shown in fig. 15. As shown in fig. 15 and 16, before forming the first insulating layer over the blocking layer and the switching thin film transistor, step S31 is to form an amorphous silicon layer 01 'on the substrate 10, where the amorphous silicon layer includes the first amorphous silicon of the driving thin film transistor and the second amorphous silicon of the switching thin film transistor, and since the amorphous silicon layer is not patterned at this time, the first amorphous silicon and the second amorphous silicon are both shown as an amorphous silicon layer 01' in the figure, where the amorphous silicon layer is a whole layer structure, and is crystallized by irradiating the amorphous silicon layer with a light source, and the amorphous silicon layer is converted into a polycrystalline silicon layer; step S32, patterning the polysilicon layer to form a first polysilicon 201 of the driving tft 20 and a second polysilicon 301 of the switching tft 30; step S33, the first polysilicon layer and the second polysilicon layer are doped.
It should be noted that, a buffer layer or other protective film layer may also be disposed on the substrate, and then an amorphous silicon layer is prepared above the buffer layer, but the invention is not limited thereto.
When heavily doped ions are implanted into the polycrystalline silicon layer, the barrier layer can just prevent excessive ions from being implanted into the channel region during heavily doped, the excessive ion implantation of the channel region 2013 is influenced, the electron mobility of the driving thin film transistor is influenced, the driving capability of the driving thin film transistor is influenced, a shielding layer is not required to be prepared by additionally utilizing other film layers or patterning again, the ELA barrier layer is used for multiplexing the shielding layer of the ion implantation, a photomask is reduced, the alignment precision is reduced, the process is simplified, a Half-Tone eye Mask (HTM) is not required to be used, and the manufacturing cost is saved. Meanwhile, the barrier layer is used as a shielding layer for ion implantation, symmetrical overlapping regions can be naturally formed on two sides of the polycrystalline silicon layer, and grid region deviation caused by doped ion implantation deviation is avoided.
Optionally, the light source includes an ultraviolet band corresponding to the excimer laser. The high energy of the ultraviolet band laser is beneficial to the high crystallization degree of the amorphous silicon layer of the switch transistor.
Optionally, the driving thin film transistor is a polysilicon thin film transistor, the switching thin film transistor is an oxide thin film transistor, and an active layer and a blocking layer of the oxide thin film transistor are prepared by the same process. When the driving thin film transistor is a polycrystalline silicon thin film transistor, the switching thin film transistor is an oxide thin film transistor, an active layer and a blocking layer of the oxide thin film transistor are prepared by the same process, and the oxide thin film transistor has higher electron mobility compared with the polycrystalline silicon thin film transistor, and has the advantages of simple manufacturing process, low cost, large area and high uniformity.
As can be seen from the above embodiments, the display panel, the manufacturing method thereof, and the display device provided by the present invention at least achieve the following beneficial effects:
according to the display panel manufactured by the manufacturing method, on one hand, the driving circuit comprises the driving thin film transistor and the switch thin film transistor, the grid electrode insulating layer of the driving thin film transistor is a first insulating layer, the grid electrode insulating layer of the switch thin film transistor is a second grid electrode insulating layer, the thickness of the first grid electrode insulating layer is larger than that of the second grid electrode insulating layer, namely the thickness of the grid electrode insulating layer of the driving thin film transistor is larger than that of the grid electrode insulating layer of the switch thin film transistor, the subthreshold swing amplitude of the driving thin film transistor can be increased, further, under the condition that the operating voltage and the circuit operating speed are not influenced, the gray scale definition is favorably realized, the driving energy of the driving thin film transistor is improved, and the display performance of; meanwhile, the sub-threshold swing amplitude of the switch thin film transistor can be reduced, and the starting speed of the switch thin film transistor is increased; the problem that the thicknesses of the gate insulation layers of the driving thin film transistor and the switching thin film transistor are incompatible is balanced, the respective gate insulation layers of the driving thin film transistor and the switching thin film transistor are guaranteed to be in the optimal thickness, the stability of a driving circuit is improved, and the display quality is improved. On the other hand, the first gate insulating layer at least comprises a blocking layer and a first insulating layer, the second gate insulating layer at least comprises the first insulating layer, the blocking layer is positioned on one side, close to the active layer of the driving thin film transistor, of the first insulating layer, the first gate insulating layer and the second gate insulating layer both comprise the first insulating layer, namely the first insulating layer of the second gate insulating layer and the first insulating layer in the first gate insulating layer can be prepared from the same material on the same layer, extra preparation processes are not needed for preparing the gate insulating layers of the driving thin film transistor and the switching thin film transistor step by step, the preparation processes are simplified, and the manufacturing cost is reduced.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (17)
1. A display panel, comprising,
a substrate base plate;
the thin film transistors are positioned on one side of the substrate base plate and comprise driving thin film transistors and switching thin film transistors;
the gate insulating layer of the driving thin film transistor is a first gate insulating layer, the gate insulating layer of the switching thin film transistor is a second gate insulating layer, and the thickness of the first gate insulating layer is greater than that of the second gate insulating layer;
the first gate insulating layer at least comprises a blocking layer and a first insulating layer, the second gate insulating layer at least comprises the first insulating layer, and the blocking layer is positioned on one side, close to the active layer of the driving thin film transistor, of the first insulating layer.
2. The array substrate of claim 1,
the substrate base plate is sequentially provided with an active layer, a grid electrode insulating layer, a grid electrode, an interlayer insulating layer and a source drain electrode layer,
the active layer of the driving thin film transistor and the active layer of the switching thin film transistor are made of the same material in the same layer;
the grid electrode of the driving thin film transistor is a first grid electrode, the grid electrode of the switching thin film transistor is a second grid electrode, and the first grid electrode and the second grid electrode are made of the same material at the same layer.
3. The display panel according to claim 2,
the active layer of the driving thin film transistor comprises a lap joint region, an ohmic contact region and a channel region, the ohmic contact region is connected with the channel region and the lap joint region, and the barrier layer at least covers the channel region.
4. The display panel according to claim 3,
the barrier layer covers the ohmic contact region.
5. The display panel according to claim 4,
the thickness of the barrier layer in the channel region is greater than the thickness of the barrier layer in the ohmic contact region.
6. The display panel according to claim 4,
the barrier layer covers the lap zone.
7. The display panel according to claim 2,
the driving thin film transistor active layer is a first active layer, the switching thin film transistor active layer is a second active layer, and the grain size of the first active layer is smaller than that of the second active layer.
8. The display panel according to claim 1,
the display panel further includes a light emitting device including an anode, a light emitting layer, and a cathode;
the driving thin film transistor drives the light emitting device to emit light, and the switching thin film transistor is used for transmitting signals.
9. The display panel according to claim 1,
the barrier layer includes indium gallium zinc oxide.
10. The display panel according to claim 9,
the thickness of the barrier layer is between 30nm and 50 nm.
11. The display panel according to claim 9,
the driving thin film transistor is a polycrystalline silicon thin film transistor, and the switching thin film transistor is an oxide thin film transistor;
the active layer and the barrier layer of the oxide thin film transistor are made of the same material at the same layer.
12. A display device characterized by comprising the display panel according to any one of claims 1 to 11.
13. A method for manufacturing a display panel includes,
providing a substrate base plate;
forming a plurality of thin film transistors on the substrate, wherein the thin film transistors include a driving thin film transistor and a switching thin film transistor;
the gate insulating layer of the driving thin film transistor is a first gate insulating layer, the gate insulating layer of the switching thin film transistor is a second gate insulating layer, and the thickness of the first gate insulating layer is greater than that of the second gate insulating layer;
the first gate insulating layer at least comprises a blocking layer and a first insulating layer, the second gate insulating layer at least comprises the first insulating layer, and the blocking layer is positioned on one side, close to the active layer of the driving thin film transistor, of the first insulating layer.
14. The method of manufacturing according to claim 13, wherein forming a plurality of the thin film transistors on the base substrate comprises,
forming an active layer over the substrate, the active layer including an active layer of a driving thin film transistor and an active layer of the switching thin film transistor;
forming the barrier layer above the film layer where the active layer of the driving thin film transistor is located;
forming the first insulating layer above the barrier layer and the film layer on which the switching thin film transistor is located;
forming a gate electrode of the thin film transistor over the first insulating layer, the gate electrode including a gate electrode of a driving thin film transistor and a gate electrode of the switching thin film transistor;
forming an interlayer insulating layer above the film layer on which the grid electrode is positioned;
and forming a source drain of the thin film transistor above the interlayer insulating layer, wherein the source drain comprises a source drain of the driving thin film transistor and a source drain of the switch thin film transistor.
15. The method of claim 14, further comprising forming the first insulating layer over the blocking layer and the switching thin film transistor,
forming an amorphous silicon layer over the substrate, the amorphous silicon layer including first amorphous silicon of the driving thin film transistor and second amorphous silicon of the switching thin film transistor;
forming the barrier layer on the amorphous silicon;
irradiating the amorphous silicon layer by using a light source for crystallization treatment, wherein the amorphous silicon layer is converted into a polycrystalline silicon layer, and the polycrystalline silicon layer comprises first polycrystalline silicon of the driving thin film transistor and second polycrystalline silicon of the switching thin film transistor;
doping and patterning the polysilicon layer.
16. The method of manufacturing according to claim 14,
the driving thin film transistor is a polycrystalline silicon thin film transistor, the switching thin film transistor is an oxide thin film transistor, and the active layer of the oxide thin film transistor and the barrier layer are prepared by the same process.
17. The method of manufacturing according to claim 15,
the light source comprises an ultraviolet band corresponding to the excimer laser.
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