CN110867411A - Display panel, manufacturing method thereof and display device - Google Patents
Display panel, manufacturing method thereof and display device Download PDFInfo
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- CN110867411A CN110867411A CN201911189331.3A CN201911189331A CN110867411A CN 110867411 A CN110867411 A CN 110867411A CN 201911189331 A CN201911189331 A CN 201911189331A CN 110867411 A CN110867411 A CN 110867411A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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Abstract
The invention relates to the technical field of display, and provides a display panel, a manufacturing method thereof and a display device, wherein the manufacturing method of the display panel comprises the following steps: providing a semi-finished product of a display panel, wherein the semi-finished product of the display panel comprises a substrate, a semiconductor layer, a grid insulating material layer and a grid layer; forming an insulating material layer on one side of the gate insulating material layer, which is far away from the substrate, so as to cover the gate layer, wherein the insulating material layer can prevent metal ions of the gate layer from migrating; forming a first photoresist material layer on the insulating material layer; exposing and developing the first photoresist material layer to form a first photoresist pattern layer on the first photoresist material layer, wherein the orthographic projection of the first photoresist pattern layer covers the gate layer; etching the isolation material layer to form an isolation layer; and etching the gate insulating material layer to form a gate insulating layer. The display panel manufactured by the manufacturing method avoids the short circuit of the grid layer and the source drain layer, and can control the width of the tail part of the grid insulating layer.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel, a manufacturing method of the display panel and a display device.
Background
The top gate structure of the display panel generally includes a substrate, a conductive layer, a gate insulating layer, a gate layer, a dielectric layer and source/drain layers. The conducting layer comprises a conductor part and a semiconductor part, the grid insulating layer is arranged on one side of the semiconductor part, which is far away from the substrate, the grid layer is arranged on one side of the grid insulating layer, which is far away from the substrate, the dielectric layer is arranged on the substrate and covers the grid layer, and the source/drain layer is arranged on one side of the dielectric layer, which is far away from the substrate.
In the related art, a method for manufacturing a display panel with a top gate structure generally includes: providing a substrate; forming a semiconductor layer on a substrate, and forming a gate insulating material layer on the substrate to cover the semiconductor layer; forming a gate material layer on the gate insulating material layer; forming a photoresist material layer on the gate material layer; exposing and developing the photoresist material layer to form a photoresist pattern layer; wet etching the grid material layer to form a grid layer; dry etching the gate insulating material layer to form a gate insulating layer; performing a semiconductorization process on the semiconductor layer to form a semiconductor portion in which the semiconductor layer portion forms a conductor portion; forming a dielectric layer on the substrate to cover the gate layer; and forming a source/drain layer on the side of the dielectric layer, which faces away from the substrate.
However, in the related art, the material of the gate layer is generally made of copper, and the copper is prone to migrate in the dielectric layer at high temperature and high pressure, thereby causing the gate layer to be short-circuited with the source/drain layer. On the other hand, during dry etching of the gate insulating material layer, the lateral dimension of the photoresist pattern layer is also reduced, resulting in an uncontrollable tail dimension of the gate insulating layer.
It is to be noted that the information invented in the above background section is only for enhancing the understanding of the background of the present invention, and therefore, may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
The invention aims to provide an array substrate, a display panel and a display device, wherein the array substrate can solve the technical problem that signal lines are easy to generate short circuit in the related technology.
Additional features and advantages of the invention will be set forth in the detailed description which follows, or may be learned by practice of the invention.
According to an aspect of the present invention, there is provided a method of manufacturing a display panel, the method including:
providing a semi-finished display panel, wherein the semi-finished display panel comprises a substrate, a semiconductor layer positioned on the substrate, a grid insulating material layer positioned on one side of the semiconductor layer, which is far away from the substrate, and a grid layer formed on one side of the grid insulating material layer, which is far away from the substrate;
forming an isolation material layer on a side of the gate insulating material layer, which faces away from the substrate, so as to cover the gate layer, wherein the isolation material layer can prevent metal ions of the gate layer from migrating;
forming a first photoresist material layer on the isolation material layer;
exposing and developing the first photoresist material layer to form a first photoresist pattern layer on the first photoresist material layer, wherein the orthographic projection of the first photoresist pattern layer covers the gate layer;
etching the isolation material layer to form an isolation layer, wherein the isolation layer covers the gate layer;
and etching the grid insulating material layer to form a grid insulating layer.
In one exemplary embodiment of the present invention, there is provided a display panel semi-finished product including:
providing the substrate;
forming a semiconductor layer on the substrate;
forming a gate insulating material layer on the substrate, the gate insulating material layer covering the semiconductor layer;
forming a first grid electrode material layer on one side of the grid electrode insulating layer material layer, which is far away from the substrate;
forming a second photoresist material layer on one side of the first grid material layer, which is far away from the substrate;
exposing the second photoresist material layer, and developing to form the second photoresist material layer on a second photoresist pattern layer with the same pattern as the gate layer;
and etching the grid material layer to form the grid layer.
In an exemplary embodiment of the present invention, before forming the first photoresist material layer on the isolation material layer, the method further includes:
and stripping the second photoresist pattern layer.
In an exemplary embodiment of the present invention, further comprising:
conducting a conductor treatment on the semiconductor layer;
forming a dielectric layer on the substrate, wherein the dielectric layer covers the semiconductor layer and the isolation layer after the semiconductor layer and the isolation layer are conducted;
and forming a source/drain layer on one side of the dielectric layer, which is far away from the substrate.
In an exemplary embodiment of the invention, the material of the gate layer is copper.
In an exemplary embodiment of the invention, the material of the insulating material layer comprises one or more of the metals aluminum, neodymium, molybdenum.
According to an aspect of the present invention, there is provided a display panel including: a substrate, a conductive layer, a gate insulating layer, a gate layer, and an isolation layer. A conductive layer provided on the substrate, the conductive layer including a conductor portion and a semiconductor portion; the grid insulating layer is arranged on one side, away from the substrate, of the conductor part; the grid electrode layer is arranged on one side, away from the substrate, of the grid electrode insulating layer; and the isolation layer is arranged on one side of the grid layer, which is deviated from the substrate, and covers the grid layer.
In an exemplary embodiment of the present invention, the display panel further includes a dielectric layer and a source/drain layer, the dielectric layer is disposed on the substrate, and the dielectric layer covers the semiconductor layer and the isolation layer after the semiconductor layer and the isolation layer are conducted; and the source/drain layer is arranged on one side of the dielectric layer, which is deviated from the substrate.
In an exemplary embodiment of the present invention, the material of the gate layer is copper; the material of the insulating material layer comprises one or more of metal aluminum, neodymium and molybdenum.
According to an aspect of the present invention, there is provided a display device, the display panel including the above display panel.
The present disclosure provides a display panel, a manufacturing method thereof and a display device, wherein the manufacturing method of the display panel includes: providing a semi-finished product of a display panel, wherein the semi-finished product of the display panel comprises a substrate, a semiconductor layer, a grid insulating material layer and a grid layer; forming an insulating material layer on one side of the gate insulating material layer, which is far away from the substrate, so as to cover the gate layer, wherein the insulating material layer can prevent metal ions of the gate layer from migrating; forming a first photoresist material layer on the insulating material layer; exposing and developing the first photoresist material layer to form a first photoresist pattern layer on the first photoresist material layer, wherein the orthographic projection of the first photoresist pattern layer covers the gate layer; etching the isolation material layer to form an isolation layer; and etching the gate insulating material layer to form a gate insulating layer. On one hand, the display panel manufacturing method provided by the disclosure forms the isolation layer covering the gate layer, so that metal ions of the gate layer are prevented from migrating to the source/drain layer, and the gate layer and the source/drain layer are prevented from being short-circuited; on the other hand, due to the existence of the isolation layer, in the process of etching the gate insulating material layer, even if the transverse size of the first photoresist layer is reduced, the isolation layer can also block etching gas, so that the pattern size of the gate insulating layer is the same as that of the isolation layer, and the size of the tail part of the gate insulating layer can be controlled.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
FIGS. 1-3 are schematic views illustrating a flow structure of a method for fabricating a display panel according to the related art;
FIG. 4 is a flowchart illustrating a method of fabricating a display panel according to an embodiment of the present disclosure;
fig. 5-11 are schematic views of a flow structure of an exemplary embodiment of a method for manufacturing a display panel according to the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus their detailed description will be omitted.
Although relative terms, such as "upper" and "lower," may be used in this specification to describe one element of an icon relative to another, these terms are used in this specification for convenience only, e.g., in accordance with the orientation of the examples described in the figures. It will be appreciated that if the device of the icon were turned upside down, the element described as "upper" would become the element "lower". Other relative terms, such as "high," "low," "top," "bottom," "left," "right," and the like are also intended to have similar meanings. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via another structure.
The terms "a," "an," "the," and the like are used to denote the presence of one or more elements/components/parts; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. other than the listed elements/components/etc.
Fig. 1-3 are schematic views showing a flow structure of a method for manufacturing a display panel in the related art. As shown in fig. 1, in a related art method for manufacturing a display panel, a light-shielding metal layer 02 is first formed on a substrate 01; forming a buffer layer 03 on the substrate 01, the buffer layer 03 covering the light-shielding metal layer 02; forming a semiconductor layer 04 on one side of the buffer layer, which is far away from the substrate 01, wherein the orthographic projection of the semiconductor layer 04 is located on the light-shielding metal layer 02, and the light-shielding metal layer 02 is used for shielding the semiconductor layer 04 so as to prevent the conductivity of the semiconductor layer 04 from changing in the illumination environment; forming a gate insulating material layer 05 on the buffer layer 03 to cover the semiconductor layer 04; a gate electrode layer 06 is formed on the gate insulating material layer 05, wherein 07 is a photoresist pattern layer remaining when the gate electrode layer 06 is formed by a photolithography process. Since the photoresist pattern layer 07 needs to be heated after being developed, the photoresist pattern layer 07 after being heated and softened forms a structure with an arc-shaped upper surface. Because the gate layer 06 is formed through a wet etching process, the time for which the upper part of the gate layer 06 is remained in the etching solution is long, so that the cross-sectional view of the gate layer 06 forms a trapezoid structure, and the width of the bottom side of the trapezoid structure is slightly smaller than the width of the photoresist pattern layer 07. As shown in fig. 2, the method for manufacturing a display panel further includes: the gate insulating material layer 05 is dry-etched to form the gate insulating layer 051 to the gate insulating material layer 05. However, during the dry etching process of the gate insulating material layer 05, the photoresist pattern layer 07 is also etched, so that the lateral dimension of the photoresist pattern layer is also reduced, and finally the tail dimension S of the gate insulating layer is not controllable. Wherein, the tail part of the gate insulating layer refers to the part from the edge of the gate insulating layer to the position contacted with the edge of the gate layer. As shown in fig. 3, the method for manufacturing a display panel further includes: the semiconductor layer 04 is conducted to expose the portion of the semiconductor layer other than the gate insulating layer 051 to form a conductor portion 041. In addition, the manufacturing method of the display panel further comprises the following steps: the photoresist pattern layer 07 is stripped, a dielectric layer 08 is formed on the buffer layer 03, and a source drain layer 09 is formed on the dielectric layer 08. However, since the material of the gate layer 06 is generally made of copper, the copper is likely to migrate in the dielectric layer 08 at high temperature and high pressure, thereby causing the gate layer 06 to be short-circuited with the source/drain layer 09.
Based on this, the present exemplary embodiment first provides a method for manufacturing a display panel, as shown in fig. 4, which is a flowchart in an embodiment of the method for manufacturing a display panel of the present disclosure. The method comprises the following steps:
step S1: providing a semi-finished display panel, wherein the semi-finished display panel comprises a substrate, a semiconductor layer positioned on the substrate, a grid insulating material layer positioned on one side of the semiconductor layer, which is far away from the substrate, and a grid layer formed on one side of the grid insulating material layer, which is far away from the substrate;
step S2: forming an isolation material layer on a side of the gate insulating material layer, which faces away from the substrate, so as to cover the gate layer, wherein the isolation material layer can prevent metal ions of the gate layer from migrating;
step S3: forming a first photoresist material layer on the isolation material layer;
step S4: exposing and developing the first photoresist material layer to form a first photoresist pattern layer on the first photoresist material layer, wherein the orthographic projection of the first photoresist pattern layer covers the gate layer;
step S5: etching the isolation material layer to form an isolation layer, wherein the isolation layer covers the gate layer;
step S6: and etching the grid insulating material layer to form a grid insulating layer.
The material of the gate layer may be copper. The material of the insulating material layer may include one or more of the metals aluminum, neodymium, molybdenum. For example, the material of the insulating material layer may be AlNd alloy, AlMo alloy.
The present exemplary embodiment provides a method for manufacturing a display panel, in which, on one hand, an isolation layer covering a gate layer is formed in the method for manufacturing a display panel provided by the present disclosure, so as to prevent metal ions of the gate layer from migrating to a source/drain layer, and further prevent the gate layer from being short-circuited with the source/drain layer; on the other hand, due to the existence of the isolation layer, in the process of etching the gate insulating material layer, even if the transverse size of the first photoresist layer is reduced, the isolation layer can also block etching gas, so that the pattern size of the gate insulating layer is the same as that of the isolation layer, and the size of the tail part of the gate insulating layer can be controlled.
Fig. 5 to 11 are schematic views of a flow structure of an exemplary embodiment of a method for manufacturing a display panel according to the present disclosure. The above steps are explained in detail below:
as shown in fig. 5, providing a display panel blank may include: providing the substrate 1; forming a semiconductor layer 2 on the substrate 1; forming a gate insulating material layer 3 on the substrate 1, the gate insulating material layer 3 covering the semiconductor layer 2; forming a first gate material layer 4 on the side of the gate insulating material layer 3 away from the substrate 1; a second layer of photoresist material 5 is formed on the side of the first layer of gate material 4 facing away from the substrate. The photoresist can be a positive photoresist or a negative photoresist. As shown in fig. 6, the method for manufacturing a display panel may further include: exposing and developing the second photoresist material layer 5 to form the second photoresist material layer 5 on a second photoresist pattern layer 51 with the same pattern as the gate layer; and etching the gate material layer 4 to form the gate layer 41. The gate material layer 4 may be etched in a wet etching manner, which may etch the metal of the gate material layer without etching other organic material layers (the second photoresist layer and the gate insulating layer material layer). The etching solution can adopt ammonium persulfate, sulfuric acid/chromic acid, sulfuric acid/hydrogen peroxide etching solution and the like.
As shown in fig. 7, the method for manufacturing a display panel may further include: the second photoresist pattern layer 51 is stripped. Forming an isolation material layer 6 on a side of the gate insulating material layer 3 facing away from the substrate 1 to cover the gate layer 41, wherein the isolation material layer 6 can prevent metal ions of the gate layer from migrating; a first photoresist material layer 7 is formed on the insulating material layer 6.
As shown in fig. 8, the method for manufacturing a display panel may further include: exposing and developing the first photoresist material layer 7 to form a first photoresist pattern layer 71 on the first photoresist material layer 7, wherein the orthographic projection of the first photoresist pattern layer 71 covers the gate layer 41.
As shown in fig. 9, the method for manufacturing a display panel may further include: the isolation material layer 6 is etched to form an isolation layer 61, wherein the isolation layer 61 covers the gate layer 41. Wherein, the etching of the insulating material layer 6 can adopt a wet etching mode.
As shown in fig. 10, the method for manufacturing a display panel may further include: the gate insulating material layer 3 is etched to form a gate insulating layer 31. The gate insulating material layer 3 may be etched by a dry etching process, in which the organic layer (the first photoresist layer and the gate insulating material layer) is mainly etched, and the isolation layer 61 is difficult to etch. In the process of etching the gate insulating material layer 3, even if the lateral dimension of the first photoresist layer 71 is reduced, the insulating layer 61 can block the etching gas, so that the pattern size of the gate insulating layer is the same as that of the insulating layer, and the size of the tail S of the gate insulating layer 31 can be controlled by controlling the etching time.
As shown in fig. 11, the method for manufacturing a display panel may further include: forming a conductor portion 21 by performing a conductor forming process on the semiconductor layer 2 so that a portion of the semiconductor layer 2 exposed by the gate insulating layer 31 is formed; forming a dielectric layer 8 on the substrate 1, wherein the dielectric layer 8 covers the semiconductor layer and the isolation layer 61 after the semiconductor layer is conducted; a source/drain layer 9 is formed on the side of the dielectric layer 8 facing away from the substrate 1. The isolation layer 61 can isolate the source/drain layer 9 from the gate layer 41, thereby preventing the gate layer 41 from shorting with the source/drain layer 9.
The present exemplary embodiment also provides a display panel, which may be as shown in fig. 11, including: substrate 1, conductive layer, gate insulating layer 31, gate layer 41, and isolation layer 61. A conductive layer provided on the substrate and including a conductor portion 21 and a semiconductor portion 22; the gate insulating layer 31 is disposed on a side of the conductor portion 22 away from the substrate 1; the gate electrode layer 41 is arranged on one side of the gate insulating layer 31, which is far away from the substrate 1; the isolation layer 61 is disposed on a side of the gate layer 41 facing away from the substrate 1, and the isolation layer 61 covers the gate layer 41.
In the present exemplary embodiment, as shown in fig. 11, the display panel further includes a dielectric layer 8 and a source/drain layer 9, the dielectric layer 8 is disposed on the substrate 1, and the dielectric layer covers the semiconductor layer 21 and the isolation layer 61 after being made conductive; the source/drain layer 9 is arranged on the side of the dielectric layer facing away from the substrate 1.
In the present exemplary embodiment, the material of the gate layer may be copper; the material of the insulating material layer may include one or more of the metals aluminum, neodymium, molybdenum.
The display panel provided by the present exemplary embodiment has the same technical features and working principles as the above-mentioned display panel manufacturing method, and the above-mentioned contents have been described in detail and are not described again here.
The present exemplary embodiment also provides a display device including the display panel described above. The display device can be a television, a mobile phone, a tablet computer and other display devices.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is to be limited only by the terms of the appended claims.
Claims (10)
1. A method for manufacturing a display panel is characterized by comprising the following steps:
providing a semi-finished display panel, wherein the semi-finished display panel comprises a substrate, a semiconductor layer positioned on the substrate, a grid insulating material layer positioned on one side of the semiconductor layer, which is far away from the substrate, and a grid layer formed on one side of the grid insulating material layer, which is far away from the substrate;
forming an isolation material layer on a side of the gate insulating material layer, which faces away from the substrate, so as to cover the gate layer, wherein the isolation material layer can prevent metal ions of the gate layer from migrating;
forming a first photoresist material layer on the isolation material layer;
exposing and developing the first photoresist material layer to form a first photoresist pattern layer on the first photoresist material layer, wherein the orthographic projection of the first photoresist pattern layer covers the gate layer;
etching the isolation material layer to form an isolation layer, wherein the isolation layer covers the gate layer;
and etching the grid insulating material layer to form a grid insulating layer.
2. The method of claim 1, wherein providing a display panel semi-finished product comprises:
providing the substrate;
forming a semiconductor layer on the substrate;
forming a gate insulating material layer on the substrate, the gate insulating material layer covering the semiconductor layer;
forming a first grid electrode material layer on one side of the grid electrode insulating layer material layer, which is far away from the substrate;
forming a second photoresist material layer on one side of the first grid material layer, which is far away from the substrate;
exposing the second photoresist material layer, and developing to form the second photoresist material layer on a second photoresist pattern layer with the same pattern as the gate layer;
and etching the grid material layer to form the grid layer.
3. The method of claim 2, further comprising, before forming the first layer of photoresist material on the insulating layer:
and stripping the second photoresist pattern layer.
4. The method for manufacturing a display panel according to claim 1, further comprising:
conducting a conductor treatment on the semiconductor layer;
forming a dielectric layer on the substrate, wherein the dielectric layer covers the semiconductor layer and the isolation layer after the semiconductor layer and the isolation layer are conducted;
and forming a source/drain layer on one side of the dielectric layer, which is far away from the substrate.
5. The method of claim 1, wherein the gate layer is made of copper.
6. The method of claim 1, wherein the material of the insulating layer comprises one or more of aluminum, neodymium, and molybdenum.
7. A display panel, comprising:
a substrate;
a conductive layer provided on the substrate, the conductive layer including a conductor portion and a semiconductor portion;
the grid insulating layer is arranged on one side, away from the substrate, of the conductor part;
the grid electrode layer is arranged on one side, away from the substrate, of the grid electrode insulating layer;
and the isolation layer is arranged on one side of the grid layer, which is deviated from the substrate, and covers the grid layer.
8. The display panel according to claim 7, further comprising:
the dielectric layer is arranged on the substrate and covers the semiconductor layer and the isolation layer which are conducted;
and the source/drain layer is arranged on one side of the dielectric layer, which is deviated from the substrate.
9. The display panel according to claim 7, wherein a material of the gate layer is copper;
the material of the insulating material layer comprises one or more of metal aluminum, neodymium and molybdenum.
10. A display device characterized by comprising the display panel according to any one of claims 7 to 9.
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| US20020017687A1 (en) * | 1991-03-06 | 2002-02-14 | Shunpei Yamazaki | Semiconductor device and method for forming the same |
| US20020105033A1 (en) * | 1999-03-19 | 2002-08-08 | Hongyong Zhang | Thin film transistor having lightly and heavily doped source/drain regions and its manufacture |
| CN1728403A (en) * | 2005-07-07 | 2006-02-01 | 友达光电股份有限公司 | Switching element of pixel electrode, and manufacturing method |
| CN103646924A (en) * | 2013-12-04 | 2014-03-19 | 京东方科技集团股份有限公司 | TFT array substrate and preparation method thereof and display device |
| CN107170807A (en) * | 2017-05-11 | 2017-09-15 | 京东方科技集团股份有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device |
| CN108538725A (en) * | 2018-03-30 | 2018-09-14 | 京东方科技集团股份有限公司 | Thin film transistor (TFT) and its manufacturing method |
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