CN110867156B - Driving circuit and driving method of display panel and display panel - Google Patents
Driving circuit and driving method of display panel and display panel Download PDFInfo
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- CN110867156B CN110867156B CN201911228385.6A CN201911228385A CN110867156B CN 110867156 B CN110867156 B CN 110867156B CN 201911228385 A CN201911228385 A CN 201911228385A CN 110867156 B CN110867156 B CN 110867156B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2085—Special arrangements for addressing the individual elements of the matrix, other than by driving respective rows and columns in combination
Abstract
The invention provides a driving circuit, a driving method and a display panel of a display panel, wherein the driving circuit comprises: the reference clock module is used for generating a reference clock pulse signal; the reference voltage module is used for acquiring the load of each scanning line, determining the charging time of the row of pixels connected on the scanning line according to the load of each scanning line, and determining a reference voltage signal of the row of pixels according to the charging time; the first input end of the comparison module is electrically connected with the reference clock module, the second input end of the comparison module is electrically connected with the reference voltage module, and the output end of the comparison module is electrically connected with the control end of the source driver; the comparison module is used for outputting a charging pulse signal of each row of pixels according to the reference clock pulse signal and the reference voltage signal; the duty ratios of the charging pulse signals corresponding to the scanning lines with different loads are different. The invention provides proper charging time for each row of pixels according to the load of each scanning line, thereby ensuring normal display of pictures.
Description
Technical Field
The present invention relates to display technologies, and in particular, to a driving circuit and a driving method for a display panel, and a display panel.
Background
With the development of panel display technology becoming mature day by day, the number of special-shaped display panels is increased. The shaped display panel means that the display area in the display panel is not rectangular. Illustratively, the display panel is a bang screen, or the display panel is a circular display panel.
For the special-shaped display panel, the loads of all the scanning lines are inconsistent, so that abnormal picture display is caused.
Disclosure of Invention
The embodiment of the invention provides a driving circuit and a driving method of a display panel and the display panel, which are used for providing proper charging time for each row of pixels according to the load of each scanning line so as to ensure normal display of a picture.
In a first aspect, an embodiment of the present invention provides a driving circuit for a display panel, including:
the reference clock module is used for generating a reference clock pulse signal;
the reference voltage module is used for acquiring the load of each scanning line, determining the charging time of the pixels in the row connected to the scanning line according to the load of each scanning line, and determining the reference voltage signal of the pixels in the row according to the charging time;
a first input end of the comparison module is electrically connected with the reference clock module, a second input end of the comparison module is electrically connected with the reference voltage module, and an output end of the comparison module is electrically connected with a control end of the source driver; the comparison module is used for outputting a charging pulse signal of each row of pixels according to the reference clock pulse signal and the reference voltage signal; and the duty ratios of the charging pulse signals corresponding to the scanning lines with different loads are different.
Further, the reference clock pulse signal is a triangular wave pulse signal, and a rising edge of the triangular wave pulse signal is vertical.
Further, the reference voltage module includes:
the memory is used for storing the mapping relation between the reference voltage signal and the scanning line;
a counter for counting the number of scanning lines to which the scanning signal is applied;
and the microcontroller is respectively electrically connected with the counter, the memory and the comparison module and is used for reading the number of the scanning lines in the counter, determining a reference voltage signal corresponding to the scanning line applying the scanning signal at present according to the mapping relation between the reference voltage signal and the scanning line and sending the reference voltage signal to the comparison module.
Further, the comparison module outputs a first level when the reference clock pulse signal is greater than the reference voltage signal; outputting a second level when the reference clock pulse signal is less than or equal to the reference voltage signal; when the charging pulse signal is at the second level, the source driver charges the pixels of the row.
Further, the smaller the load of the scanning line, the larger the duty ratio of the charging pulse signal of the pixels of the row.
In a second aspect, an embodiment of the present invention provides a display panel, including the driving circuit of the first aspect.
In a third aspect, an embodiment of the present invention provides a method for driving a display panel, including:
acquiring the load of each scanning line;
determining the charging time of the pixels in the row connected to each scanning line according to the load of each scanning line, and determining the reference voltage signal of the pixels in the row according to the charging time;
acquiring a reference clock pulse signal;
outputting a charging pulse signal of each row of pixels according to the reference clock pulse signal and the reference voltage signal;
charging the pixels of each row according to the charging pulse signals of the pixels of each row;
and the duty ratios of the charging pulse signals corresponding to the scanning lines with different loads are different.
Further, acquiring the load of each scan line includes:
acquiring the number of the pixels electrically connected with each scanning line and the load of a single pixel;
determining a load of each of the scan lines according to a product of a number of the pixels electrically connected to each of the scan lines and a load of a single one of the pixels.
Further, the smaller the load of the scanning line, the larger the duty ratio of the charging pulse signal of the pixels of the row.
Further, outputting a charging pulse signal of each row of pixels according to the reference clock pulse signal and the reference voltage signal, comprising:
outputting a first level when the reference clock pulse signal is greater than the reference voltage signal;
outputting a second level when the reference clock pulse signal is less than or equal to the reference voltage signal;
when the charging pulse signal is at the second level, the source driver charges the pixels of the row.
The driving circuit of the display panel provided by the embodiment of the invention comprises a reference voltage module, wherein the reference voltage module can acquire the load of each scanning line, acquire the charging time of each row of pixels electrically connected with each scanning line, and determine the reference voltage signal of each row of pixels according to the charging time of each row of pixels. The driving circuit of the display panel further comprises a comparison module, and the comparison module outputs the charging pulse signal of each row of pixels to the source driver according to the reference clock pulse signal and the reference voltage signal. The source driver supplies data voltages (charges) to the plurality of pixels through the plurality of data lines under the control of the charge pulse signal. The scan lines of different loads correspond to reference voltage signals of different magnitudes, and the reference voltage signals of different magnitudes correspond to charge pulse signals of different duty ratios. Therefore, proper charging time can be provided for each row of pixels according to the load of each scanning line, and normal display of a picture is ensured.
Drawings
Fig. 1 is a schematic partial structure diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a driving circuit of a display panel according to an embodiment of the invention;
FIG. 3 is a timing diagram of a driving circuit of the display panel of FIG. 2;
FIG. 4 is a circuit diagram of the reference voltage block of FIG. 2;
FIG. 5 is a schematic diagram of a driving circuit of another display panel according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 7 is a flowchart of a driving method of a display panel according to an embodiment of the invention;
fig. 8 is a flowchart of another driving method of a display panel according to an embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined purposes, the following detailed description will be given to specific embodiments, structures, features and effects of a driving circuit and a driving method of a display panel and a display panel according to the present invention with reference to the accompanying drawings and preferred embodiments.
Fig. 1 is a partial structural schematic view of a display panel according to an embodiment of the present invention, the display panel includes a plurality of scan lines 410 and a plurality of data lines 420, the plurality of scan lines 410 extend along an X direction and are arranged along a Y direction, the plurality of data lines 420 extend along the Y direction and are arranged along the X direction, the plurality of scan lines 410 and the plurality of data lines 420 intersect to define a plurality of pixels 430, and the plurality of pixels 430 are located in a display area 400 of the display panel. The pixels 430 are electrically connected to the scan lines 410 and the data lines 420. The display panel further includes a plurality of thin film transistors 440, the scan line 410 is electrically connected to a gate of the thin film transistor 440, the data line 420 is electrically connected to a source of the thin film transistor 440, and the pixel 430 is electrically connected to a drain of the thin film transistor 440.
Referring to fig. 1, the display panel further includes a driving circuit 100, a source driver 200, and a gate driver 300. The driving circuit 100 provides a reference clock pulse signal to the gate driver 300, and the driving circuit 100 also provides a charging pulse signal to the source driver 200. The gate driver 300 is electrically connected to the plurality of scan lines 410 and supplies a gate voltage to the plurality of pixels 430 through the plurality of scan lines 410. The source driver 200 is electrically connected to the plurality of data lines 420, and supplies data voltages to the plurality of pixels 430 through the plurality of data lines 420 under the control of a charging pulse signal. Since the shape of the display area 400 is not rectangular, there are at least two rows of pixels 430, which causes the loads of at least two scan lines 410 to be inconsistent, resulting in abnormal picture display.
It is found that the inconsistent loading of the scan lines 410 results in different charging times for at least two rows of pixels 430, thereby causing picture anomalies. The charging process of the pixel 430 is: during the period when the gate signal of the scan line 410 turns on the thin film transistor 440, the plurality of data lines 420 electrically connected to the row of pixels 430 charge the row of pixels 430. It should be noted that, during the period when the gate signal of the scan line 410 turns on the thin film transistor 440, pre-charging the row of pixels 430 and not charging the row of pixels 430 may also be included.
Fig. 2 is a schematic diagram of a driving circuit of a display panel according to an embodiment of the present invention, and referring to fig. 2, the driving circuit 100 of the display panel includes a reference clock module 10, a reference voltage module 20, and a comparison module 30. The reference clock module 10 is used to generate a reference clock pulse signal. The reference voltage module 20 is configured to obtain a load of each scan line 410, determine a charging time of the row of pixels 430 connected to the scan line 410 according to the load of each scan line 410, and determine a reference voltage signal of the row of pixels 430 according to the charging time. The first input terminal 31 of the comparison module 30 is electrically connected to the reference clock module 10, the second input terminal 32 of the comparison module 30 is electrically connected to the reference voltage module 20, and the output terminal 33 of the comparison module 30 is electrically connected to the control terminal 210 of the source driver 200. The comparing module 30 is configured to output a charging pulse signal for each row of the pixels 430 according to the reference clock pulse signal and the reference voltage signal. The duty ratios of the charging pulse signals for the scan lines 410 loaded differently are different.
The driving circuit of the display panel according to the embodiment of the present invention includes a reference voltage module 20, where the reference voltage module 20 may obtain a load of each scan line 410, obtain a charging time of each row of pixels 430 electrically connected to each scan line 410, and determine a reference voltage signal of each row of pixels 430 according to the charging time of each row of pixels 430. The driving circuit 100 of the display panel further includes a comparing module 30, and the comparing module 30 outputs a charging pulse signal of each row of pixels 430 to the source driver 200 according to the reference clock pulse signal and the reference voltage signal. The source driver 200 supplies data voltages (charges) to the plurality of pixels 430 through the plurality of data lines 420 under the control of the charging pulse signal. The scan lines 410 of different loads correspond to reference voltage signals of different magnitudes, and the reference voltage signals of different magnitudes correspond to charge pulse signals of different duty ratios. Therefore, appropriate charging time can be provided for each row of pixels 430 according to the load of each scan line 410, and normal display of the picture can be ensured.
Fig. 3 is a timing diagram of the driving circuit of the display panel in fig. 2, and referring to fig. 2 and fig. 3, the reference clock pulse signal generated by the reference clock module 10 is a triangular wave pulse signal, and a rising edge of the triangular wave pulse signal is vertical. If the rising edge of the triangular wave pulse signal is inclined, the charging pulse signal output by the driving circuit 100 is no longer the rising edge of the square wave at the start time of each period, and the reference voltage signal in different periods has different magnitudes, which results in that the rising edge of the charging pulse signal is no longer at the start time of the period and the rising edge of the charging pulse signal is no longer arranged periodically. In the embodiment of the invention, the rising edge of the triangular wave pulse signal is vertical, so that the rising edge of the charging pulse signal can be periodically arranged, and the charging pulse signal has a reference clock function. Meanwhile, the duty ratios of the charging pulse signals corresponding to the scan lines 410 with different loads are different, so that appropriate charging time can be provided for each row of pixels 430 according to the load of each scan line 410, and normal display of a picture is ensured.
Fig. 4 is a circuit schematic diagram of the reference voltage module in fig. 2, and referring to fig. 2 and 4, the reference voltage module 20 includes a memory 21, a counter 22 and a microcontroller 23. The memory 21 is used for storing the mapping relationship between the reference voltage signal and the scan line 410. The counter 22 counts the number of scan lines 410 to which the scan signal is applied. For example, the reference clock module 10 generates a Start signal (i.e. Start Vertical signal, abbreviated as STV1 signal) of the gate driver, the counter 22 may use a timer to trigger a falling edge of the Start signal of the gate driver, the counter 22 starts counting, and the count value of the counter is increased by one during the time when the scan signal is applied to one scan line 410. Illustratively, the time for applying the scan signal to one scan line 410 is 0.22S, and from the beginning of counting, the count is 1 at 0.22S, 2 at 0.44S, and so on. The microcontroller 23 is electrically connected to the counter 22, the memory 21, and the comparison module 30, and is configured to read the number of scan lines in the counter 22, determine a reference voltage signal corresponding to the scan line 410 to which the scan signal is currently applied according to a mapping relationship between the reference voltage signal and the scan line 410, and send the reference voltage signal to the comparison module 30.
Alternatively, referring to fig. 2, 3 and 4, the comparison module 30 outputs the first level when the reference clock pulse signal is greater than the reference voltage signal. The second level is output when the reference clock pulse signal is less than or equal to the reference voltage signal. When the charging pulse signal is at the second level, the source driver 200 charges the row of pixels 430.
Optionally, the first level is greater than the second level. The first level is high and the second level is low. The falling edge of the charge pulse signal controls the source driver 200 to charge the pixel 430. Illustratively, the first level may be, for example, 3.3V, and the second level may be, for example, 0V.
Exemplarily, referring to fig. 3, the reference clock pulse signal is a triangle wave pulse signal, a rising edge of the triangle wave pulse signal is vertical, and the triangle wave pulse signal falls from 5V to 0V. The reference voltage signal shown in fig. 3 has a value of 1V in the first period, and when the triangular pulse signal is 5V to 1V, the value of the triangular pulse signal is greater than that of the reference voltage signal, the charging pulse signal has a first level (high level), when the triangular pulse signal is equal to or less than 1V, the value of the triangular pulse signal is less than or equal to that of the reference voltage signal, and the charging pulse signal has a second level (low level).
Fig. 5 is a schematic diagram of another driving circuit of a display panel according to an embodiment of the invention, and referring to fig. 5, a comparing module 30 includes an amplifier, a first input terminal 31 of the comparing module 30 is a positive input terminal of the amplifier, a second input terminal 32 of the comparing module 30 is a negative input terminal of the amplifier, and an output terminal of the comparing module 30 is an output terminal of the amplifier. The first power supply terminal 34 of the amplifier is electrically connected to a power supply 40. The second supply terminal 35 of the amplifier is connected to ground. The amplifier outputs a first level when the reference clock pulse signal is greater than the reference voltage signal. The first level is the output voltage of the power supply 40. The second level is output when the reference clock pulse signal is less than or equal to the reference voltage signal, the second level being a low voltage (0V).
Alternatively, the smaller the load of the scan line 410, the larger the duty ratio of the charging pulse signal of the row of pixels 430. The charging pulse signal is a control signal of the source driver 200, and when the charging pulse signal is at a first level (high level), the source driver 200 does not charge the pixels 430 through the plurality of data lines 420; when the charge pulse signal is at the second level (low level), the source driver 200 charges the pixels 430 through the plurality of data lines 420. The smaller the load of the scan line 410, the larger the duty ratio of the high level time of the charge pulse signal of the row of pixels 430, and the smaller the duty ratio of the low level time of the charge pulse signal of the row of pixels 430, thereby shortening the charge time for one row of pixels 430 electrically connected to the one scan line 410. The larger the load of the scan line 410, the smaller the duty ratio of the high level time of the charge pulse signal of the row of pixels 430, and the larger the duty ratio of the low level time of the charge pulse signal of the row of pixels 430, thereby the longer the charge time of the row of pixels 430 electrically connected to the scan line 410.
Fig. 6 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and referring to fig. 6, the display panel 500 includes the driving circuit 100 in the above embodiment.
Exemplarily, referring to fig. 6, the display panel 500 is a circular display panel whose display area 400 is also circular in shape. The circular display panel can be applied to a device such as a wristwatch, for example. In other embodiments, the display panel may also be a display panel with other shapes, and as long as at least two rows of pixels with different numbers exist in the display area of the display panel, the driving circuit provided in the embodiments of the present invention may be used to solve the problem of inconsistent load of each scan line, and may ensure normal display of the picture.
The same inventive concept as that of the driving circuit of the display panel in the above embodiment, the embodiment of the present invention further provides a driving method of the display panel, fig. 7 is a flowchart of the driving method of the display panel provided by the embodiment of the present invention, and referring to fig. 1 to 6 and fig. 7, the driving method of the display panel includes:
s110, acquiring a load of each scan line 410.
S120, determining a charging time of the row of pixels 430 connected on each scan line 410 according to a load of the scan line 410, and determining a reference voltage signal of the row of pixels according to the charging time.
And S130, acquiring a reference clock pulse signal.
And S140, outputting the charging pulse signal of each row of pixels 430 according to the reference clock pulse signal and the reference voltage signal.
S150, charging the pixels 430 of each row according to the charging pulse signal of the pixels 430 of each row.
The duty ratios of the charging pulse signals corresponding to the scan lines 410 with different loads are different.
Fig. 8 is a flowchart of another driving method of a display panel according to an embodiment of the present invention, and referring to fig. 1-6, and fig. 7 and 8, the obtaining a load of each scan line 410 (i.e., step S110) includes:
s111, the number of pixels 430 electrically connected per each scanning line 410 and the load of a single pixel 430 are acquired.
S112, determining the load of each scan line 410 according to the product of the number of pixels 430 to which each scan line 410 is electrically connected and the load of a single pixel 430.
Alternatively, the smaller the load of the scan line 410, the larger the duty ratio of the charging pulse signal of the row of pixels 430. The charging pulse signal is a control signal of the source driver 200, and when the charging pulse signal is at a first level (high level), the source driver 200 does not charge the pixels 430 through the plurality of data lines 420; when the charge pulse signal is at the second level (low level), the source driver 200 charges the pixels 430 through the plurality of data lines 420. The smaller the load of the scan line 410, the larger the duty ratio of the high level time of the charging pulse signal for the row of pixels 430, and the smaller the duty ratio of the low level time of the charging pulse signal for the row of pixels 430, thereby shortening the charging time for a row of pixels 430 electrically connected to the one scan line 410. The larger the load of the scan line 410, the smaller the duty ratio of the high level time of the charge pulse signal of the row of pixels 430, and the larger the duty ratio of the low level time of the charge pulse signal of the row of pixels 430, thereby the longer the charge time of the row of pixels 430 electrically connected to the scan line 410.
Alternatively, outputting the charging pulse signal of each row of pixels according to the reference clock pulse signal and the reference voltage signal (i.e. step S140) comprises:
the first level is output when the reference clock pulse signal is greater than the reference voltage signal.
The second level is output when the reference clock pulse signal is less than or equal to the reference voltage signal.
When the charging pulse signal is at the second level, the source driver 200 charges the pixels 430 in the row.
Optionally, the first level is greater than the second level. The first level is high and the second level is low. The falling edge of the charge pulse signal controls the source driver 200 to charge the pixel 430. Illustratively, the first level may be, for example, 3.3V, and the second level may be, for example, 0V.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A driving circuit of a display panel, comprising:
the reference clock module is used for generating a reference clock pulse signal;
the reference voltage module is used for acquiring the load of each scanning line, determining the charging time of the pixels in the row connected to the scanning line according to the load of each scanning line, and determining the reference voltage signal of the pixels in the row according to the charging time;
a first input end of the comparison module is electrically connected with the reference clock module, a second input end of the comparison module is electrically connected with the reference voltage module, and an output end of the comparison module is electrically connected with a control end of the source driver; the comparison module is used for outputting a charging pulse signal of each row of pixels to a source driver according to the reference clock pulse signal and the reference voltage signal; the reference voltage signals corresponding to the scanning lines with different loads have different sizes, and the duty ratios of the charging pulse signals corresponding to the scanning lines with different loads are different.
2. The driving circuit according to claim 1, wherein the reference clock pulse signal is a triangular wave pulse signal, and a rising edge of the triangular wave pulse signal is vertical.
3. The driving circuit of claim 1, wherein the reference voltage module comprises:
the memory is used for storing the mapping relation between the reference voltage signal and the scanning line;
a counter for counting the number of scanning lines to which the scanning signal is applied;
and the microcontroller is respectively electrically connected with the counter, the memory and the comparison module, and is used for reading the number of the scanning lines in the counter, determining a reference voltage signal corresponding to the scanning line which currently applies the scanning signal according to the mapping relation between the reference voltage signal and the scanning line, and sending the reference voltage signal to the comparison module.
4. The drive circuit according to claim 3,
the comparison module outputs a first level when the reference clock pulse signal is greater than the reference voltage signal; outputting a second level when the reference clock pulse signal is less than or equal to the reference voltage signal; when the charging pulse signal is at the second level, the source driver charges the pixels of the row.
5. The driving circuit according to claim 1, wherein the duty ratio of the charging pulse signal for the pixel of the row is larger as the load of the scanning line is smaller.
6. A display panel comprising the driver circuit according to any one of claims 1 to 5.
7. A method of driving a display panel, comprising:
acquiring the load of each scanning line;
determining the charging time of the pixels in the row connected to each scanning line according to the load of each scanning line, and determining the reference voltage signal of the pixels in the row according to the charging time;
acquiring a reference clock pulse signal;
outputting a charging pulse signal of each row of pixels to a source driver according to the reference clock pulse signal and the reference voltage signal;
the source driver charges the pixels of each row according to the charging pulse signals of the pixels of each row;
the reference voltage signals corresponding to the scanning lines with different loads have different sizes, and the duty ratios of the charging pulse signals corresponding to the scanning lines with different loads are different.
8. The driving method according to claim 7, wherein acquiring the load of each scan line includes:
acquiring the number of the pixels electrically connected with each scanning line and the load of a single pixel;
and determining the load of each scanning line according to the product of the number of the pixels electrically connected with each scanning line and the load of a single pixel.
9. The driving method according to claim 7, wherein the duty ratio of the charging pulse signal for the pixel of the row is larger as the load of the scan line is smaller.
10. The driving method according to claim 7, wherein outputting a charging pulse signal for each row of pixels according to the reference clock pulse signal and the reference voltage signal comprises:
outputting a first level when the reference clock pulse signal is greater than the reference voltage signal;
outputting a second level when the reference clock pulse signal is less than or equal to the reference voltage signal;
when the charging pulse signal is at the second level, the source driver charges the pixels of the row.
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| CN103595018B (en) * | 2013-11-07 | 2017-02-08 | 深圳市华星光电技术有限公司 | Over-voltage protecting circuit, LED backlight drive circuit and liquid crystal displayer |
| CN107610634A (en) * | 2017-09-28 | 2018-01-19 | 惠科股份有限公司 | The drive circuit and driving method of a kind of display device |
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