CN110858580A - Dielectric capacitor - Google Patents
Dielectric capacitor Download PDFInfo
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- CN110858580A CN110858580A CN201810961208.8A CN201810961208A CN110858580A CN 110858580 A CN110858580 A CN 110858580A CN 201810961208 A CN201810961208 A CN 201810961208A CN 110858580 A CN110858580 A CN 110858580A
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- 239000003990 capacitor Substances 0.000 title claims abstract description 127
- 239000002184 metal Substances 0.000 claims description 11
- 239000003989 dielectric material Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 description 8
- 244000126211 Hericium coralloides Species 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0805—Capacitors only
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Compared with the traditional structure, the second part of the positive electrode in two adjacent capacitance layers is vertically conducted by the positive electrode through hole, and the second part of the negative electrode in the two adjacent capacitance layers is vertically conducted by the negative electrode through hole. An extra capacitor connected in parallel with the existing multilayer parallel capacitor can be formed between every two adjacent positive electrode through holes and every two adjacent negative electrode through holes, and the capacitance value of the unit area is greatly improved. In addition, no through hole is needed to be additionally arranged to connect the first parts of the same-polarity electrodes in the two adjacent capacitor layers, and the capacitance value of the unit area can be further improved.
Description
Technical Field
The invention relates to the technical field of semiconductor preparation, in particular to a dielectric capacitor applied to an integrated circuit.
Background
In semiconductor manufacturing processes, dielectric capacitors are widely used in integrated circuit designs of chips. With the rapid development of integrated circuit design and manufacturing technology of chips, the requirements of integrated circuit design on chip performance, device reliability and manufacturing cost are higher and higher while the critical dimension of chips is continuously reduced and the integration level of devices is higher and higher. The dielectric capacitor is an important device of the integrated circuit, and whether the manufacturing cost of the dielectric capacitor can be effectively reduced and the capacitance density per unit area can be improved or not is significant for improving the integration level and the performance of a chip.
In order to meet the development requirement of integrated circuits, as shown in fig. 1, there is a multi-layer interdigitated capacitor formed by stacking several comb-shaped electrodes in the prior art, and each capacitor layer of the interdigitated capacitor is formed by interdigitated comb-teeth 13 of a comb-shaped metal positive electrode 10 and comb-teeth 14 of a comb-shaped metal negative electrode 11. The comb teeth of the metal electrodes in any two adjacent layers are changed from the original mutual parallel to the mutual vertical, and the through holes 12 on the sides of the comb teeth are connected with the metal electrodes with the same polarity, so that the capacitors in the two adjacent layers are connected in parallel. By adopting the structure that the comb tooth parts of the electrodes of the adjacent layers are mutually vertical, compared with the traditional mutually parallel structure, the problem of deviation caused by process errors can be avoided, and more stable capacitance value can be obtained. For increasing the capacitance density per unit area, the capacitance value per unit area of the capacitor is proportional to the area of the electrode plate and inversely proportional to the distance between the electrode plates. In the interdigitated capacitor, only the comb-teeth 13 of the comb-structured metal positive electrode 10 and the comb-teeth 14 of one comb-structured metal negative electrode 11 contribute to the total capacitance. Therefore, the arrangement mode of mutually perpendicular comb teeth can not improve the capacitance value of unit area of the capacitor. And when making the electric capacity, need reserve the position on the edge of broach portion and set up through-hole 12, still further restricted the improvement of unit area capacitance value.
Disclosure of Invention
In view of the above, it is desirable to provide a dielectric capacitor with low cost and high capacitance density per unit area in view of at least one of the above-mentioned technical problems.
A kind of dielectric capacitor is disclosed, which comprises a capacitor body,
at least two capacitor layers, wherein each capacitor layer at least comprises a positive electrode and a negative electrode, dielectric materials are filled between the positive electrode and the negative electrode, the positive electrode and the negative electrode are respectively composed of a first part and a plurality of parallel second parts which are spaced and respectively jointed on one side of the first part, and the plurality of second parts of the positive electrode and the plurality of second parts of the negative electrode are arranged in parallel and staggered at intervals;
a dielectric layer is arranged between two adjacent capacitor layers, and a positive electrode through hole and a negative electrode through hole are arranged in the dielectric layer;
the second parts of the positive electrodes in the two adjacent capacitor layers are vertical to each other, the positive electrode through hole is positioned between the second parts of the positive electrodes in the two adjacent capacitor layers and vertically conducts the second parts of the positive electrodes in the two adjacent capacitor layers, so that the positive electrodes in the two adjacent capacitor layers are electrically connected;
the second parts of the negative electrodes in the two adjacent capacitor layers are vertical to each other, and the negative electrode through hole is positioned between the second parts of the negative electrodes in the two adjacent capacitor layers and vertically conducts the second parts of the negative electrodes in the two adjacent capacitor layers, so that the negative electrodes in the two adjacent capacitor layers are electrically connected.
In one embodiment, the positive electrode through hole is further located between the first portions of the positive electrodes in the two adjacent capacitor layers, so that the first portions of the positive electrodes in the two adjacent capacitor layers are electrically connected; the negative electrode through hole is also positioned between the first parts of the negative electrodes in the two adjacent capacitor layers, so that the first parts of the negative electrodes in the two adjacent capacitor layers are electrically connected.
In one embodiment, the size of the positive electrode through hole is the same as the size of the negative electrode through hole.
In one embodiment, the positive electrode via and the negative electrode via have a circular, square or rectangular cross-section in a direction parallel to the capacitor layer.
In one embodiment, the size of the positive electrode through hole between the second portions of the positive electrodes in the two adjacent capacitor layers is larger than the size of the positive electrode through hole between the first portions of the positive electrodes in the two adjacent capacitor layers; the size of the negative electrode through hole between the second parts of the negative electrodes in the two adjacent capacitance layers is larger than that of the negative electrode through hole between the first parts of the negative electrodes in the two adjacent capacitance layers.
In one embodiment, the second portions of the positive electrode and the second portions of the negative electrode are arranged in parallel at equal intervals and staggered at intervals.
In one embodiment, the size of the second portions of the positive electrode and the size of the second portions of the negative electrode are the same.
In one embodiment, the positive electrode and the negative electrode are made of metal or polycrystalline silicon.
In one embodiment, the positive electrode and the negative electrode in the same capacitor layer are made of the same material.
In one embodiment, the number of second portions of each of the positive electrodes is the same as the number of second portions of each of the negative electrodes.
In one embodiment, the number of the second portions of each of the positive electrodes is four, and the number of the second portions of each of the negative electrodes is four.
The invention has the beneficial effect that compared with the traditional structure, the second parts of the positive electrodes in the two adjacent capacitance layers are vertically conducted by the positive electrode through holes, and the second parts of the negative electrodes in the two adjacent capacitance layers are vertically conducted by the negative electrode through holes. And an additional capacitor can be formed between every two adjacent positive electrode through holes and negative electrode through holes and is connected with the existing multilayer parallel capacitor in parallel. Under the condition that the original capacitor plate structure is not changed, the capacitance between the through holes can be added with additional capacitance values, so that the capacitance value of the unit area is greatly improved. In addition, the through holes do not need to be additionally arranged to connect the first parts of the electrodes with the same polarity in the two adjacent capacitor layers, the size of the first parts of the electrodes can be reduced to reduce the occupied area of the capacitor, and the capacitance value of the unit area is further improved.
Drawings
FIG. 1 is a perspective view of a multi-layer interdigitated capacitor in the prior art;
FIG. 2 is a top view of a dielectric capacitor in a first embodiment;
FIG. 3 is a side sectional view taken along line A-A' of FIG. 2;
FIG. 4 is a top view of a dielectric capacitor in a second embodiment;
FIG. 5 is a side sectional view taken along line B-B' of FIG. 4;
FIG. 6 is a top view of the odd-numbered capacitor layer of the dielectric capacitor of FIG. 4;
fig. 7 is a top view of an even-numbered capacitor layer of the dielectric capacitor of fig. 4.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The following detailed description of embodiments of the invention refers to the accompanying drawings.
The first embodiment:
fig. 2 is a plan view of a dielectric capacitor according to the first embodiment, and fig. 3 is a side sectional view taken along line a-a' in fig. 2.
In the present embodiment, referring to fig. 2, a dielectric capacitor includes at least two capacitor layers 200, each capacitor layer 200 has a positive electrode 221 and a negative electrode 231, and a dielectric material (the dielectric material is not shown in fig. 1) is filled between the positive electrode 221 and the negative electrode 231. The positive electrode 221 is composed of a first portion 227 and a plurality of parallel spaced second portions 225 respectively joined to one side of the first portion 227, and the negative electrode 231 is composed of a first portion 237 and a plurality of parallel spaced second portions 235 respectively joined to one side of the first portion 237. In each capacitor layer 200, the second portions 225 of the positive electrodes 221 and the second portions 235 of the negative electrodes 231 are arranged in parallel and staggered at intervals, so that the positive electrodes 221 and the negative electrodes 231 in the same capacitor layer 200 form a comb-shaped capacitor. In the present embodiment, the number of the second portions 225 of each positive electrode 221 is the same as the number of the second portions 235 of each negative electrode 231. In other embodiments, the number of second portions 225 per positive electrode 221 is four and the number of second portions 235 per negative electrode 231 is four. In the actual semiconductor manufacturing process, the positive electrode 221 and the negative electrode 231 of the comb capacitor can be manufactured simultaneously only by one layer of photolithography mask, so that the manufacturing cost can be effectively saved.
As shown in fig. 3, a dielectric layer 100 is disposed between two adjacent capacitor layers 200, a positive electrode through hole 220 and a negative electrode through hole 230 (the negative electrode through hole 230 is not shown in fig. 3) are disposed in the dielectric layer 100, and the positive electrode through hole 220 and the negative electrode through hole 230 are filled with a conductive material. In order to clearly show the structures and arrangements of the positive electrode 221 and the negative electrode 231, and the structures and arrangements of the positive electrode through hole 220 and the negative electrode through hole 230, the dielectric materials filled in the capacitor layer 200 and the dielectric layer 100 are not shown in fig. 2 and 3.
Referring to fig. 2 and fig. 3, the second portions 225 of the positive electrodes 221 in two adjacent capacitor layers 200 are perpendicular to each other, and the positive electrode through hole 220 vertically connects the second portions 225 of the two adjacent positive electrodes 221, so that the positive electrodes 221 in the two adjacent capacitor layers 200 are electrically connected, that is, the positive electrode through hole 220 is perpendicular to the plane of the positive electrode 221 and electrically connected to the positive electrodes 221 in the two adjacent capacitor layers 200. The second portions 235 of the negative electrodes 231 in two adjacent capacitor layers 200 are perpendicular to each other, and the negative electrode through hole 230 vertically connects the second portions 235 of the two adjacent negative electrodes 231, so that the negative electrodes 231 in the two adjacent capacitor layers 200 are electrically connected, that is, the negative electrode through hole 230 is perpendicular to the plane of the negative electrode 231 and is electrically connected to the negative electrodes 231 in the two adjacent capacitor layers 200. The comb capacitors in two adjacent capacitor layers 200 are connected in parallel by the electrical connection of the positive electrode via 220 and the negative electrode via 230. In other embodiments, the number of capacitor layers 200 to be connected in parallel may be selected according to the requirements of the set capacitance per unit area.
In addition, as shown in fig. 2, each positive electrode through hole 220 is at least adjacent to one negative electrode through hole 230, and similarly, each negative electrode through hole 230 is at least adjacent to one positive electrode through hole 220. Since the positive electrode through hole 220 and the negative electrode through hole 230 are both disposed in the dielectric layer 100, a capacitor is formed between each two adjacent positive electrode through holes 220 and negative electrode through holes 230. Obviously, on the basis of the original parallel comb-shaped capacitor, the capacitance between the positive electrode through hole 220 and the negative electrode through hole 230 is increased, so that the capacitance per unit area is greatly improved. Because these positive electrode via 220 and negative electrode via 230 have also connected the comb-like capacitances in two adjacent capacitance layers 200 in parallel, in addition to increasing the capacitance value. Therefore, the through hole does not need to be additionally arranged to connect the first parts of the same-polarity electrodes in the two adjacent capacitance layers, namely the position of the through hole reserved in the comb handle part does not need to be considered, the size of the comb handle part can be further reduced, the occupied area of the comb-shaped capacitor is reduced, and the capacitance value of the unit area can be further improved. Preferably, the positive electrode through hole 220 and the negative electrode through hole 230 are the same in size and shape, so that the magnitude of the extra capacitance generated between the through holes can be controlled and calculated. Preferably, the cross-section of the positive electrode through hole 220 and the negative electrode through hole 230 in the direction parallel to the capacitor layer is circular, square or rectangular, which is easy to manufacture and facilitates the control and calculation of the height of the additional capacitance value generated between the through holes.
In addition, the manufacturing material of the positive electrode 221 and the negative electrode 231 is metal or polysilicon. Preferably, the capacitor formed by the positive electrode 221 and the negative electrode 231 in the same capacitor layer 200 is made of the same material. The capacitor in the adjacent capacitor layers 200 may be made of the same material or different materials. Preferably, the plurality of second portions 225 of the positive electrode 221 and the plurality of second portions 235 of the negative electrode 231 are arranged in parallel at equal intervals and staggered at intervals, and the plurality of second portions 225 of the positive electrode 221 and the plurality of second portions 235 of the negative electrode 231 are the same in size and shape, so that the capacitance value can be conveniently controlled and calculated.
Second embodiment:
in the present embodiment, please refer to fig. 5, the capacitor layer is formed by alternately stacking a plurality of odd-numbered capacitor layers 300 and a plurality of even-numbered capacitor layers 400. Specifically, an even-numbered capacitor layer 400 is disposed between every two odd-numbered capacitor layers 300, and a dielectric layer 500 is disposed between each adjacent odd-numbered capacitor layer 300 and each adjacent even-numbered capacitor layer 400. Similarly, in order to clearly show the structure and arrangement of the comb-shaped electrodes and the through holes, the dielectric material filled in the odd-numbered capacitor layer 300, the even-numbered capacitor layer 400 and the dielectric layer 500 is not shown in fig. 4, 5, 6 and 7.
Referring to the top view of the odd-numbered capacitor layer of the dielectric capacitor in fig. 6, the comb teeth 325 of the positive electrode 321 in the odd-numbered capacitor layer 300 are fixed on one side of the comb handle portion 327, and the comb handle portion 327 is an L-shaped component with a right-angled bending angle; the comb-teeth portion 335 of the comb-shaped negative electrode 331 is fixed to one side of the comb-handle portion 337, and the comb-handle portion 337 is an L-shaped member having a right-angled bend. The comb-tooth part 325 of the comb-shaped positive electrode 321 is connected with a positive electrode through hole 522, and the comb handle part 327 of the comb-shaped positive electrode 321 is connected with a positive electrode through hole 520; the comb-shaped tooth part 335 of the comb-shaped negative electrode 331 is connected with a negative electrode through hole 532, and the comb handle part 337 thereof is connected with a negative electrode through hole 530.
Referring to the top view of the even-numbered capacitor layer of the dielectric capacitor in fig. 7, the comb portion 425 of the positive electrode 421 in the even-numbered capacitor layer 400 is fixed on one side of the comb portion 427, and the comb portion 427 is an L-shaped member with a right-angled bending angle; the comb teeth 435 of the comb-shaped negative electrode 431 is fixed to one side of the comb handle part 437, and the comb handle part 437 is an L-shaped member having a right-angled bend. The comb-shaped tooth part 425 of the comb-shaped positive electrode 421 is connected with a positive electrode through hole 522, and the comb-shaped handle part 427 of the comb-shaped positive electrode 421 is connected with a positive electrode through hole 520; the comb-tooth part 435 of the comb-shaped negative electrode 431 is connected with a negative electrode through hole 532, and the comb handle part 437 is connected with a negative electrode through hole 530.
As can be seen from fig. 6 and 7 in conjunction with fig. 4, in addition to the comb-shaped teeth 325 and 425 which vertically connect two adjacent positive electrodes through the positive electrode through hole 522, a positive electrode through hole 520 connects the comb-shaped stem 327 and the comb-shaped stem 427 of two adjacent positive electrodes. Similarly for the negative electrode, in addition to the negative electrode through hole 532 vertically conducting the comb-tooth part 335 and the comb-tooth part 435 of two adjacent negative electrodes, a negative electrode through hole 530 connects the comb-handle part 337 and the comb-handle part 437 of two adjacent negative electrodes. In this embodiment, the through holes vertically communicate with the comb-shaped portions of the same-polarity electrodes in two adjacent capacitor layers, and a capacitor is formed between every two adjacent positive electrode through holes and negative electrode through holes. Obviously, on the basis of the original parallel comb-shaped capacitor, the capacitance between the positive electrode through hole and the negative electrode through hole is increased, so that the capacitance per unit area is effectively improved.
In addition, the through holes are arranged to communicate the comb handle parts of the same-polarity electrodes in two adjacent capacitor layers, so that metal of the outermost capacitor layer can be conveniently led out. The size of the through hole communicated with the comb handle parts of the same-polarity electrodes in the two adjacent capacitor layers is smaller than that of the through hole vertically communicated with the comb handle parts of the same-polarity electrodes in the two adjacent capacitor layers, so that the purpose of reducing the size of the comb handle parts as much as possible while facilitating metal extraction of the outermost capacitor layer is achieved, the occupied area of the comb capacitor is effectively controlled, and the unit area capacitance value is further improved.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A dielectric capacitor, comprising:
at least two capacitor layers, wherein each capacitor layer at least comprises a positive electrode and a negative electrode, dielectric materials are filled between the positive electrode and the negative electrode, the positive electrode and the negative electrode are respectively composed of a first part and a plurality of parallel second parts which are spaced and respectively jointed on one side of the first part, and the plurality of second parts of the positive electrode and the plurality of second parts of the negative electrode are arranged in parallel and staggered at intervals;
a dielectric layer is arranged between two adjacent capacitor layers, and a positive electrode through hole and a negative electrode through hole are arranged in the dielectric layer;
the second parts of the positive electrodes in the two adjacent capacitor layers are vertical to each other, the positive electrode through hole is positioned between the second parts of the positive electrodes in the two adjacent capacitor layers and vertically conducts the second parts of the positive electrodes in the two adjacent capacitor layers, so that the positive electrodes in the two adjacent capacitor layers are electrically connected;
the second parts of the negative electrodes in the two adjacent capacitor layers are vertical to each other, and the negative electrode through hole is positioned between the second parts of the negative electrodes in the two adjacent capacitor layers and vertically conducts the second parts of the negative electrodes in the two adjacent capacitor layers, so that the negative electrodes in the two adjacent capacitor layers are electrically connected.
2. A dielectric capacitor according to claim 1, wherein: the positive electrode through hole is also positioned between the first parts of the positive electrodes in the two adjacent capacitor layers, so that the first parts of the positive electrodes in the two adjacent capacitor layers are electrically connected;
the negative electrode through hole is also positioned between the first parts of the negative electrodes in the two adjacent capacitor layers, so that the first parts of the negative electrodes in the two adjacent capacitor layers are electrically connected.
3. A dielectric capacitor according to claim 1 or 2, wherein: the size of the positive electrode through hole is the same as the size of the negative electrode through hole.
4. A dielectric capacitor according to claim 1 or 2, wherein: the cross sections of the positive electrode through holes and the negative electrode through holes in the direction parallel to the capacitor layer are circular, square or rectangular.
5. A dielectric capacitor according to claim 2, wherein: the size of the positive electrode through hole between the second parts of the positive electrodes in the two adjacent capacitance layers is larger than that of the positive electrode through hole between the first parts of the positive electrodes in the two adjacent capacitance layers;
the size of the negative electrode through hole between the second parts of the negative electrodes in the two adjacent capacitance layers is larger than that of the negative electrode through hole between the first parts of the negative electrodes in the two adjacent capacitance layers.
6. A dielectric capacitor according to claim 1, wherein: the plurality of second parts of the positive electrode and the plurality of second parts of the negative electrode are arranged in parallel at equal intervals and staggered at intervals.
7. A dielectric capacitor as claimed in claim 1 or 6, wherein: the size of the plurality of second portions of the positive electrode is the same as the size of the plurality of second portions of the negative electrode.
8. A dielectric capacitor as claimed in claim 1 or 6, wherein: the positive electrode and the negative electrode are made of metal or polycrystalline silicon.
9. A dielectric capacitor as claimed in claim 1 or 6, wherein: the positive electrode and the negative electrode in the same capacitance layer are made of the same material.
10. A dielectric capacitor as claimed in claim 1 or 6, wherein: the number of second portions of each of the positive electrodes is the same as the number of second portions of each of the negative electrodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810961208.8A CN110858580A (en) | 2018-08-22 | 2018-08-22 | Dielectric capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810961208.8A CN110858580A (en) | 2018-08-22 | 2018-08-22 | Dielectric capacitor |
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|---|---|
| CN110858580A true CN110858580A (en) | 2020-03-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201810961208.8A Pending CN110858580A (en) | 2018-08-22 | 2018-08-22 | Dielectric capacitor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112490221A (en) * | 2020-11-26 | 2021-03-12 | 无锡市晶源微电子有限公司 | Capacitor with three-dimensional structure |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1527385A (en) * | 2003-03-04 | 2004-09-08 | 台湾积体电路制造股份有限公司 | Multilayer composite metal capacitor structure |
| US6819542B2 (en) * | 2003-03-04 | 2004-11-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Interdigitated capacitor structure for an integrated circuit |
| US20070296013A1 (en) * | 2006-06-26 | 2007-12-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device structure for reducing mismatch effects |
| CN101409286A (en) * | 2007-10-12 | 2009-04-15 | 瑞昱半导体股份有限公司 | Semiconductor capacitance structure |
-
2018
- 2018-08-22 CN CN201810961208.8A patent/CN110858580A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1527385A (en) * | 2003-03-04 | 2004-09-08 | 台湾积体电路制造股份有限公司 | Multilayer composite metal capacitor structure |
| US6819542B2 (en) * | 2003-03-04 | 2004-11-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Interdigitated capacitor structure for an integrated circuit |
| US20070296013A1 (en) * | 2006-06-26 | 2007-12-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device structure for reducing mismatch effects |
| CN101409286A (en) * | 2007-10-12 | 2009-04-15 | 瑞昱半导体股份有限公司 | Semiconductor capacitance structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112490221A (en) * | 2020-11-26 | 2021-03-12 | 无锡市晶源微电子有限公司 | Capacitor with three-dimensional structure |
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Application publication date: 20200303 |