CN110855165B - Discontinuous pulse width modulation method for control circuit of three-phase Vienna rectifier - Google Patents
Discontinuous pulse width modulation method for control circuit of three-phase Vienna rectifier Download PDFInfo
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- CN110855165B CN110855165B CN201911021626.XA CN201911021626A CN110855165B CN 110855165 B CN110855165 B CN 110855165B CN 201911021626 A CN201911021626 A CN 201911021626A CN 110855165 B CN110855165 B CN 110855165B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4233—Arrangements for improving power factor of AC input using a bridge converter comprising active switches
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a control circuit of a three-phase Vienna rectifier and a discontinuous pulse width modulation method thereof. The control circuit comprises a power grid voltage sampling circuit, an inductive current sampling circuit, a bus voltage sampling circuit, a switching tube driving circuit and a DSP control unit; the DSP control unit comprises a first abc/dq converter, a second abc/dq converter, a phase locker, a dq/alpha beta converter, a DPWM controller, a hysteresis controller, a bus voltage PI regulator, an active current PI regulator and a reactive current PI regulator. The discontinuous pulse width modulation method discovers a redundant clamping mode with opposite influence on the midpoint potential in a vector space, and realizes the adjustment of the midpoint potential balance by switching the clamping mode in combination with the offset direction of the midpoint potential. The invention can effectively adjust the neutral point potential balance, and has small switching loss and high converter efficiency.
Description
Technical Field
The invention belongs to the technical field of power electronic converters, and particularly relates to a control circuit and a control method of a three-phase Vienna rectifier.
Background
The three-phase Vienna rectifier is widely applied to the fields of aviation power supplies, electric automobile charging and the like by virtue of the advantages of high reliability, high efficiency, low current harmonic distortion and the like. In aviation primary power applications, it is often desirable for the converter to have a higher switching frequency. On one hand, the high switching frequency can reduce the volume and weight of the converter and obtain higher power density; on the other hand, the fundamental frequency of the aviation power grid is higher, and the high switching frequency can help to reduce current harmonic distortion and improve the power factor. However, a high switching frequency will result in higher switching losses, reducing the system efficiency. Compared with the conventional Space Vector Pulse Width Modulation (SVPWM), Discontinuous Pulse Width Modulation (DPWM) reduces the number of switching operations by one third, and can ensure that the efficiency of the converter is improved while switching at a high frequency. Discontinuous pulse width modulation, however, to ensure that one-phase voltages are clamped, only a single small vector is used at a time in vector synthesis instead of using redundant small vector pairs, which correspondingly loses the ability to adjust the neutral point potential balance. The prior art document 'Roui, which is John's Jack, Chen Hui, Liu jin Jun.A three-level converter midpoint potential balance and low switching loss SVPWM strategy [ J ] in the technical report of electricians, 2018,33(14): 3245-. The prior art documents "u.choi, h.lee and k.lee, Simple Neutral-Point Voltage Control for Three-Level Inverters Using a discrete Pulse Width Modulation, in IEEE Transactions on energy conversion, vol.28, No.2, pp.434-443, June 2013" propose a way to change the widths of positive and negative half-clamped regions to adjust the midpoint potential balance, but in doing so there will be low frequency fluctuations in midpoint potential. The prior art documents "x.zhang, q.wang, r.burgos and d. Boroyevich, discrete pulse width modulation method with neutral point voltage balancing for the same phase potentials, 2015IEEE Energy Conversion Convergence and Expansion (ECCE), Montreal, QC,2015, pp.225-232" propose a hybrid modulation strategy, which uses SVPWM to adjust the midpoint potential balance in 3, 4 small sectors and Discontinuous pulse width modulation to reduce the switching loss in 5, 6 small sectors. However, the use of SVPWM will inevitably increase switching losses and the ability of this method to adjust the midpoint potential will be greatly diminished when the modulation is relatively low. Therefore, it is necessary to develop a discontinuous space vector modulation method and a circuit thereof that can reduce switching loss and rapidly adjust the midpoint potential.
Disclosure of Invention
In order to solve the technical problems mentioned in the background art, the present invention provides a control circuit of a three-phase vienna rectifier and a discontinuous pulse width modulation method thereof.
In order to achieve the technical purpose, the technical scheme of the invention is as follows:
a control circuit of a three-phase Vienna rectifier comprises a three-phase alternating current power supply, a three-phase input filter inductor, first to sixth power diodes, first to sixth power switch tubes, a first direct current bus filter capacitor and a second direct current bus filter capacitor, wherein 6 power diodes are connected in pairs to form a three-phase bridge arm, 6 power switch tubes are connected in pairs to form a three-phase bridge arm, and the first direct current bus filter capacitor and the second direct current bus filter capacitor are respectively connected to two ends of a midpoint of a direct current side;
the control circuit comprises a power grid voltage sampling circuit, an inductive current sampling circuit, a bus voltage sampling circuit, a switching tube driving circuit and a DSP control unit; the DSP control unit comprises a first abc/dq converter, a second abc/dq converter, a phase locker, a dq/alpha beta converter, a DPWM controller, a hysteresis controller, a bus voltage PI regulator, an active current PI regulator and a reactive current PI regulator; three input ends of the power grid voltage sampling circuit are correspondingly connected to the connection position of the three-phase input filter power and the three-phase alternating current power supply, and the output of the power grid voltage sampling circuit is connected with the first input end of the first abc/dq converter; three input ends of the inductive current sampling circuit are correspondingly connected to three output ends of the three-phase input filter inductor, and the output end of the inductive current sampling circuit is connected with a first input end of the second abc/dq converter; the output end of the first abc/dq converter is connected with the input end of the phase locker, and the output end of the phase locker is connected with the second input end of the first abc/dq converter and the second input end of the second abc/dq converter; two input ends of the bus voltage sampling circuit respectively collect and output voltages of a first direct current bus filter capacitor and a second direct current bus filter capacitor, the two paths of output signals are added and then are differenced with a bus voltage reference value, and the difference value is input into a bus voltage PI regulator; the output signal of the bus voltage PI regulator is differed from the d-axis signal output by the second abc/dq converter, and the difference value is input into the active current PI regulator; a q-axis signal output by the second abc/dq converter is different from a reference value 0, and the difference value is input into a reactive current PI regulator; two input ends of the dq/alpha beta converter are respectively connected with the input end of the active current PI regulator and the input end of the reactive current PI regulator; the output end of the dq/alpha beta converter is connected with the input end of the DPWM controller, the difference value of two paths of output signals of the bus voltage sampling circuit after difference is input into the DPWM controller, the output end of the DPWM controller is connected with the input end of the switch tube driving circuit, and the output end of the switch tube driving circuit outputs driving signals corresponding to the first power switch tube, the second power switch tube and the sixth power switch tube.
Further, the three-phase AC power supply is connected in a star connection.
Furthermore, the first to sixth power switch tubes adopt MOSFETs.
Discontinuous pulse width modulation method of control circuit based on three-phase Vienna rectifier, and three-phase power grid voltage u obtained by sampling of power grid voltage sampling circuitsa、usb、uscAfter being transformed by a first abc/dq converter, a component u under a dq coordinate system is obtainedsdAnd usqAnd sending the voltage to a phase locker, and obtaining phase information theta of the power grid voltage by the phase locker; three-phase inductive current i obtained by sampling of inductive current sampling circuita、ib、iscAfter the conversion of the second abc/dq converter, the active component i of the three-phase inductive current is obtaineddAnd a reactive component iq(ii) a The bus voltage sampling circuit samples to obtain the voltage u of two DC bus filter capacitorsdc1And udc2，udc1And udc2The result of the addition is compared with a bus voltage reference value udc_refAnd the difference value is sent to a bus voltage PI regulator, and the bus voltage PI regulator generates a reference value i of active current according to an input signald_ref，id_refAnd idMaking difference, sending the difference value to an active current PI regulator, and generating a d-axis control component u by the active current PI regulator according to an input signald(ii) a Reference value 0 of reactive current and reactive current iqMaking difference, sending the difference value into a reactive current PI regulator, and generating a q-axis control component u by the reactive current PI regulator according to an input signalqThe dq/αβ converter converts udAnd uqTransformed into control component u in αβ coordinate systemαAnd uβSending the data to a DPWM controller; the DPWM controller establishes a three-level vector space, divides the vector space into 6 large sectors, and further divides each large sector into 6 small sectors; according to uαAnd uβCalculating a vector V to be synthesizedrefThe large sector and the small sector; selecting the distance VrefMore recently, the development of new and more recently developed devicesCalculating the action time of the three small vectors according to a vector synthesis rule; two redundant clamping modes are contained in the 3 rd, 4 th, 5 th and 6 th small sectors of each large sector, and the two redundant clamping modes are used for adjusting the neutral potential: will udc1And udc2The difference result is sent to the hysteresis controller, and when the voltage difference is greater than the upper limit of the hysteresis controller, the zone bit d output by the hysteresis controllernpSetting 1, selecting a clamping mode for reducing the midpoint voltage by a DPWM controller; when the voltage difference is less than the lower limit of the hysteresis controller, the zone bit d output by the hysteresis controllernpSetting the voltage to be-1, and selecting a clamping mode for increasing the midpoint voltage by the DPWM controller; when the voltage difference is in the hysteresis range, the zone bit d output by the hysteresis controllernpAnd setting 0, and selecting a clamping mode with relatively strong capability of reducing the switching loss by the DPWM controller.
Further, the DPWM controller establishes a three-level vector space from 25 small vectors of the three-phase vienna rectifier, the 25 small vectors being OOO, OON, POO, PPO, PON, PPN, OPN, NPP, NPO, OPO, NON, OPP, NPP, NOO, OPP, NOP, NNO, NNP, ONP, PNP, ONO, PNO, POP, ONN, PNN, where P represents a positive level, N represents a negative level, and O represents a zero level.
Further, the vector sequence near the zero crossing of each phase voltage is optimized: replacing the small vector ONN with the small vector POO in the 3 rd small sector of the 1 st large sector and replacing the small vector PPO with the small vector OON in the 4 th small sector; replacing the small vector PPO with a small vector OON in the 3 rd small sector of the 2 nd large sector and replacing the small vector NON with a small vector OPO in the 4 th small sector; replacing the small vector NON with the small vector OPO in the 3 rd small sector of the 3 rd large sector and replacing the small vector OPP with the small vector NOO in the 4 th small sector; replacing the small vector OPP with the small vector NOO in the 3 rd small sector of the 4 th large sector and replacing the small vector NNO with the small vector OOP in the 4 th small sector; replacing a small vector NNO with a small vector OOP in a 3 rd small sector of a 5 th large sector, and replacing a small vector POP with a small vector ONO in a 4 th small sector; in the 3 rd small sector of the 6 th large sector, a small vector ONP is used for replacing a small vector POP, and in the 4 th small sector, a small vector POO is used for replacing a small vector ONN.
Further, the clamping patterns of the two redundancies in the 3 rd, 4 th, 5 th and 6 th small sectors of each large sector and the corresponding vector action sequences, the influence on the midpoint potential and the capability of reducing the switching loss are shown in the following table:
adopt the beneficial effect that above-mentioned technical scheme brought:
the invention can effectively adjust the neutral point potential balance, and has small switching loss and high converter efficiency. Therefore, the modulation method and the circuit designed by the invention are suitable for the occasions of high-power-density and high-efficiency power factor correction, and especially have wide application prospect in a three-level conversion circuit.
Drawings
FIG. 1 is a diagram of a three-phase Vienna rectifier and its control circuit according to the present invention;
FIG. 2 is a schematic diagram of a space vector diagram and sector division of a Vienna rectifier;
FIG. 3 is a schematic diagram of the clamping mode of the 3 rd, 4 th, 5 th and 6 th sectors in the 1 st large sector;
FIG. 4 is a waveform diagram of steady state operation experiment using the modulation method and circuit embodiment of the present invention;
FIG. 5 is a waveform diagram of an experiment for adjusting the midpoint potential using the modulation method and the circuit embodiment of the present invention.
Detailed Description
The technical scheme of the invention is explained in detail in the following with the accompanying drawings.
Fig. 1 shows a conventional three-phase vienna rectifier 10 and a control circuit 20 designed according to the present invention.
As shown in FIG. 1, a three-phase Vienna rectifier 10 includes a three-phase AC power source 101/usa、usb、usc(ii) a Three-phase input filter inductor 102/La、Lb、Lc(ii) a First to sixth power diodes 103/D1～D6(ii) a First to sixth power switch tubes 104/S1～S6(ii) a First direct current bus filter capacitor and second direct current bus filter capacitor 105/Cdc1、Cdc2. The 6 power diodes are connected in pairs to form a three-phase bridge arm, the 6 power switch tubes are connected in pairs to form a three-phase bridge arm, and the first direct-current bus filter capacitor and the second direct-current bus filter capacitor are respectively connected to two ends of a midpoint of a direct-current side. R in the figureLRepresenting the load. In this embodiment, the three-phase ac power sources are connected in a star connection. The first to sixth power switch tubes adopt MOSFET.
As shown in fig. 1, the control circuit 20 includes a grid voltage sampling circuit 201, an inductor current sampling circuit 202, a bus voltage sampling circuit 203, a switching tube driving circuit 204, and a DSP control unit 205. The DSP control unit 205 includes a first abc/dq converter 206, a second abc/dq converter 207, a phase lock 208, a dq/α β converter 209, a DPWM controller 210, a hysteretic controller 211, a bus voltage PI regulator 212, an active current PI regulator 214, and a reactive current PI regulator 213. Three input ends of the power grid voltage sampling circuit are correspondingly connected to the connection position of the three-phase input filter power and the three-phase alternating current power supply, and the output of the power grid voltage sampling circuit is connected with the first input end of the first abc/dq converter; three input ends of the inductive current sampling circuit are correspondingly connected to three output ends of the three-phase input filter inductor, and the output end of the inductive current sampling circuit is connected with a first input end of the second abc/dq converter; the output end of the first abc/dq converter is connected with the input end of the phase locker, and the output end of the phase locker is connected with the second input end of the first abc/dq converter and the second input end of the second abc/dq converter; two input ends of the bus voltage sampling circuit respectively collect and output voltages of a first direct current bus filter capacitor and a second direct current bus filter capacitor, the two paths of output signals are added and then are differenced with a bus voltage reference value, and the difference value is input into a bus voltage PI regulator; the output signal of the bus voltage PI regulator is differed from the d-axis signal output by the second abc/dq converter, and the difference value is input into the active current PI regulator; a q-axis signal output by the second abc/dq converter is differed from 0, and the difference value is input into a reactive current PI regulator; two input ends of the dq/alpha beta converter are respectively connected with the input end of the active current PI regulator and the input end of the reactive current PI regulator; the output end of the dq/alpha beta converter is connected with the input end of the DPWM controller, the difference value of two paths of output signals of the bus voltage sampling circuit after difference is input into the DPWM controller, the output end of the DPWM controller is connected with the input end of the switch tube driving circuit, and the output end of the switch tube driving circuit outputs driving signals corresponding to the first power switch tube, the second power switch tube and the sixth power switch tube.
The invention also designs a discontinuous pulse width modulation method, and three-phase power grid voltage u obtained by sampling by the power grid voltage sampling circuitsa、usb、uscAfter being transformed by a first abc/dq converter, a component u under a dq coordinate system is obtainedsdAnd usqAnd sending the voltage to a phase locker, and obtaining phase information theta of the power grid voltage by the phase locker; three-phase inductive current i obtained by sampling of inductive current sampling circuita、ib、iscAfter the conversion of the second abc/dq converter, the active component i of the three-phase inductive current is obtaineddAnd a reactive component iq(ii) a The bus voltage sampling circuit samples to obtain the voltage u of two DC bus filter capacitorsdc1And udc2，udc1And udc2The result of the addition is compared with a bus voltage reference value udc_refAnd the difference value is sent to a bus voltage PI regulator, and the bus voltage PI regulator generates a reference value i of active current according to an input signald_ref，id_refAnd idMaking difference, sending the difference value to an active current PI regulator, and generating a d-axis control component u by the active current PI regulator according to an input signald(ii) a Reference value 0 of reactive current and reactive current iqMaking difference, sending the difference value into a reactive current PI regulator, and generating a q-axis control component u by the reactive current PI regulator according to an input signalqThe dq/αβ converter converts udAnd uqTransformed into control component u in αβ coordinate systemαAnd uβAnd sending the data to a DPWM controller.
The DPWM controller first establishes a three-level vector space from the 25 feasible vectors of the vienna rectifier and divides the vector space into 6 large sectors, each of which is further divided into 6 small sectors, as shown in fig. 2.
According to uαAnd uβCalculating a vector V to be synthesizedrefA large sector and a small sector. Selecting the distance VrefAnd calculating the action time of the latest three vectors according to a vector synthesis rule. In order to ensure that one-phase voltage is clamped all the time, the invention abandons the use of redundant small vector pairs and only uses one small vector to synthesize V in vector synthesisref. When the traditional discontinuous pulse width modulation method is applied to a Vienna rectifier, the problem that the polarity of input voltage and input current at a zero-crossing point is opposite exists, and a large amount of harmonic distortion is introduced into the input current. The discontinuous pulse width modulation method of the present invention optimizes the vector selection near the zero crossing point to avoid this problem: ONN is replaced by a small vector POO in the 3 rd small sector of the 1 st large sector, and PPO is replaced by OON in the 4 th small sector; replacing PPO with a small vector OON in the 3 rd small sector of the 2 nd large sector and replacing NON with OPO in the 4 th small sector; a small vector OPO is used for replacing NON in a 3 rd small sector of a 3 rd large sector, and NOO is used for replacing OPP in a 4 th small sector; replacing OPP with small vector NOO in the 3 rd small sector of the 4 th large sector and replacing NNO with OOP in the 4 th small sector; replacing NNO with small vector OOP in the 3 rd small sector of the 5 th large sector and replacing POP with ONO in the 4 th small sector; in the 3 rd small sector of the 6 th large sector, a small vector ONP is used for replacing POP, and in the 4 th small sector, POO is used for replacing ONN. The traditional discontinuous pulse width modulation method is fixed in the clamping mode of each small sector, and redundant small vector pairs are not used, so that the acting time of the redundant small vectors cannot be changed to adjust the neutral point potential balance like SVPWM. In order to solve the problem, the invention finds two redundant clamping modes in 3, 4, 5 and 6 small sectors of each large sector, and it should be noted that the vienna rectifier has only one zero vector, so that the redundant clamping modes do not exist in 1 and 2 small sectors. Taking the first large sector as an example: the 3 rd small sector has two clamping modes of clamping a B phase at an O level and clamping a C phase at an N level; the 4 th small sector has two clamping modes of clamping the B phase at the O level and clamping the A phase at the P level; in the 5 th small sector, the A phase is clamped at the P level and the C phase is clampedClamping in two clamping modes of an electrical level at N; in the 6 th small sector, the A phase is clamped at the P level and the C phase is clamped at the N level. 3. The clamp patterns of 4 small sectors are shown in (a) and (b) in fig. 3, and the clamp patterns of 5 and 6 small sectors are shown in (c) and (d) in fig. 3. In determining the vector action sequence, the principle of only one-phase switching tube action at a time needs to be followed in order to reduce the switching loss. Table 1 shows the clamp mode, the vector action sequence, the influence of different clamp modes on the midpoint potential, and the strength of the ability of different clamp modes to reduce the switching loss for each small sector:
TABLE 1
Table 1 shows that the two redundant clamp modes in the 3, 4, 5, 6 small sectors have opposite effects on the midpoint potential. Therefore, the clamping mode which should be adopted at the moment can be selected in real time according to the offset direction of the midpoint potential so as to ensure that the midpoint potential is in the control range. The specific method comprises the following steps: voltage u of two bus capacitorsdc1And udc2The subtraction results are entered into the hysteresis controller. When the voltage difference is greater than the upper limit of the hysteresis controller, the zone bit d output by the hysteresis controllernpSetting 1, selecting a clamping mode for reducing the midpoint voltage by a DPWM controller; when the voltage difference is less than the lower limit of the hysteresis controller, the zone bit d output by the hysteresis controllernpPut-1, the DPWM controller selects the clamp mode that raises the midpoint voltage. Different clamping modes have strong or weak capability of reducing switching loss, so that when the voltage difference is in a hysteresis range, the midpoint potential is considered to be in an equilibrium state, and the zone bit d output by the hysteresis controllernpAnd setting 0, and selecting a clamping mode with strong switching loss reducing capability by the DPWM controller.
Experiment, the input voltage of vienna rectifier is the aviation electric wire netting standard: 115V/400Hz, an output voltage of 310V and a power of 5 kW. Drawing (A)And 4, full-load steady-state experimental waveforms are shown, and the A-phase input voltage, the output voltage, the A-phase bridge arm voltage and the A-phase input current are respectively corresponding to the A-phase input voltage, the output voltage, the A-phase bridge arm voltage and the A-phase input current from top to bottom in the graph. It can be seen that the output voltage is stable, the A-phase bridge arm voltage is clamped in a specific area, and the sine degree of the input current waveform is high. FIG. 5 is an experimental waveform of midpoint potential adjustment, two bus capacitors Cdc1And Cdc2In the case of an unbalanced load. After the three-level discontinuous space vector modulation method of the midpoint potential of the controllable Vienna rectifier is adopted, the capacitor voltage udc1And udc2The equal adjustment can be carried out within 20ms, which shows that the invention has strong midpoint potential adjustment capability.
The embodiments are only for illustrating the technical idea of the present invention, and the technical idea of the present invention is not limited thereto, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the scope of the present invention.
Claims (6)
1. The discontinuous pulse width modulation method based on the control circuit of the three-phase Vienna rectifier comprises a three-phase alternating-current power supply, a three-phase input filter inductor, first to sixth power diodes, first to sixth power switch tubes, a first direct-current bus filter capacitor and a second direct-current bus filter capacitor, wherein the 6 power diodes are connected in pairs to form a three-phase bridge arm, the 6 power switch tubes are connected in pairs to form a three-phase bridge arm, and the first direct-current bus filter capacitor and the second direct-current bus filter capacitor are respectively connected to two ends of a midpoint of a direct-current side;
the control circuit of the three-phase Vienna rectifier comprises a power grid voltage sampling circuit, an inductive current sampling circuit, a bus voltage sampling circuit, a switching tube driving circuit and a DSP control unit; the DSP control unit comprises a first abc/dq converter, a second abc/dq converter, a phase locker, a dq/alpha beta converter, a DPWM controller, a hysteresis controller, a bus voltage PI regulator, an active current PI regulator and a reactive current PI regulator; three input ends of the power grid voltage sampling circuit are correspondingly connected to the connection position of the three-phase input filter capacitor and the three-phase alternating current power supply, and the output of the power grid voltage sampling circuit is connected with the first input end of the first abc/dq converter; three input ends of the inductive current sampling circuit are correspondingly connected to three output ends of the three-phase input filter inductor, and the output end of the inductive current sampling circuit is connected with a first input end of the second abc/dq converter; the output end of the first abc/dq converter is connected with the input end of the phase locker, and the output end of the phase locker is connected with the second input end of the first abc/dq converter and the second input end of the second abc/dq converter; two input ends of the bus voltage sampling circuit respectively collect and output voltages of a first direct current bus filter capacitor and a second direct current bus filter capacitor, the two paths of output signals are added and then are differenced with a bus voltage reference value, and the difference value is input into a bus voltage PI regulator; the output signal of the bus voltage PI regulator is differed from the d-axis signal output by the second abc/dq converter, and the difference value is input into the active current PI regulator; a q-axis signal output by the second abc/dq converter is different from a reference value 0, and the difference value is input into a reactive current PI regulator; two input ends of the dq/alpha beta converter are respectively connected with the input end of the active current PI regulator and the input end of the reactive current PI regulator; the output end of the dq/alpha beta converter is connected with the input end of the DPWM controller, the difference value of two paths of output signals of the bus voltage sampling circuit after difference is input into the DPWM controller, the output end of the DPWM controller is connected with the input end of the switching tube driving circuit, and the output end of the switching tube driving circuit outputs driving signals corresponding to the first power switching tube, the second power switching tube and the sixth power switching tube;
the method is characterized in that: three-phase power grid voltage u obtained by sampling of power grid voltage sampling circuitsa、usb、uscAfter being transformed by a first abc/dq converter, a component u under a dq coordinate system is obtainedsdAnd usqAnd sending the voltage to a phase locker, and obtaining phase information theta of the power grid voltage by the phase locker; three-phase inductive current i obtained by sampling of inductive current sampling circuita、ib、iscAfter the conversion of the second abc/dq converter, the active component i of the three-phase inductive current is obtaineddAnd a reactive component iq(ii) a The bus voltage sampling circuit samples to obtain the voltage u of two DC bus filter capacitorsdc1And udc2，udc1And udc2Result of additionAnd a bus voltage reference value udc_refAnd the difference value is sent to a bus voltage PI regulator, and the bus voltage PI regulator generates a reference value i of active current according to an input signald_ref，id_refAnd idMaking difference, sending the difference value to an active current PI regulator, and generating a d-axis control component u by the active current PI regulator according to an input signald(ii) a Reference value 0 of reactive current and reactive current iqMaking difference, sending the difference value into a reactive current PI regulator, and generating a q-axis control component u by the reactive current PI regulator according to an input signalqThe dq/αβ converter converts udAnd uqTransformed into control component u in αβ coordinate systemαAnd uβSending the data to a DPWM controller; the DPWM controller establishes a three-level vector space, divides the vector space into 6 large sectors, and further divides each large sector into 6 small sectors; according to uαAnd uβCalculating a vector V to be synthesizedrefThe large sector and the small sector; selecting the distance VrefCalculating the action time of the three nearest small vectors according to a vector synthesis rule; two redundant clamping modes are contained in the 3 rd, 4 th, 5 th and 6 th small sectors of each large sector, and the two redundant clamping modes are used for adjusting the neutral potential: will udc1And udc2The difference result is sent to the hysteresis controller, and when the voltage difference is greater than the upper limit of the hysteresis controller, the zone bit d output by the hysteresis controllernpSetting 1, selecting a clamping mode for reducing the midpoint voltage by a DPWM controller; when the voltage difference is less than the lower limit of the hysteresis controller, the zone bit d output by the hysteresis controllernpSetting the voltage to be-1, and selecting a clamping mode for increasing the midpoint voltage by the DPWM controller; when the voltage difference is in the hysteresis range, the zone bit d output by the hysteresis controllernpAnd setting 0, and selecting a clamping mode with relatively strong capability of reducing the switching loss by the DPWM controller.
2. The discontinuous pulse width modulation method according to claim 1, wherein: the DPWM controller establishes a three-level vector space according to 25 small vectors of the three-phase Vienna rectifier, wherein the 25 small vectors are OOO, OON, POO, PPO, PON, PPN, OPN, NPP, NPO, OPO, NON, OPP, NPN, NOO, OOP, NOP, NNO, NNP, ONP, PNP, ONO, PNO, POP, ONN and PNN, P represents a positive level, N represents a negative level, and O represents a zero level.
3. The discontinuous pulse width modulation method according to claim 2, wherein: optimizing the vector sequence near the zero crossing point of each phase voltage: replacing the small vector ONN with the small vector POO in the 3 rd small sector of the 1 st large sector and replacing the small vector PPO with the small vector OON in the 4 th small sector; replacing the small vector PPO with a small vector OON in the 3 rd small sector of the 2 nd large sector and replacing the small vector NON with a small vector OPO in the 4 th small sector; replacing the small vector NON with the small vector OPO in the 3 rd small sector of the 3 rd large sector and replacing the small vector OPP with the small vector NOO in the 4 th small sector; replacing the small vector OPP with the small vector NOO in the 3 rd small sector of the 4 th large sector and replacing the small vector NNO with the small vector OOP in the 4 th small sector; replacing a small vector NNO with a small vector OOP in a 3 rd small sector of a 5 th large sector, and replacing a small vector POP with a small vector ONO in a 4 th small sector; in the 3 rd small sector of the 6 th large sector, a small vector ONP is used for replacing a small vector POP, and in the 4 th small sector, a small vector POO is used for replacing a small vector ONN.
4. The discontinuous pulse width modulation method according to claim 2, wherein:
the two redundant clamp patterns and corresponding vector action sequences in the 3 rd, 4 th, 5 th and 6 th small sectors of each large sector are shown in the table above.
5. The discontinuous pulse width modulation method according to claim 1, wherein: the three-phase alternating current power supply is connected according to a star connection method.
6. The discontinuous pulse width modulation method according to claim 1, wherein: the first to sixth power switch tubes adopt MOSFETs.
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Application publication date: 20200228 Assignee: Aishiwei New Energy Technology (Yangzhong) Co.,Ltd. Assignor: HOHAI University Contract record no.: X2022980008450 Denomination of invention: Discontinuous pulse width modulation method for control circuit of three-phase Vienna rectifier Granted publication date: 20200929 License type: Common License Record date: 20220621 |