CN110854032A - Method for detecting particle defects in germanium-silicon process - Google Patents

Method for detecting particle defects in germanium-silicon process Download PDF

Info

Publication number
CN110854032A
CN110854032A CN201911106619.XA CN201911106619A CN110854032A CN 110854032 A CN110854032 A CN 110854032A CN 201911106619 A CN201911106619 A CN 201911106619A CN 110854032 A CN110854032 A CN 110854032A
Authority
CN
China
Prior art keywords
silicon
germanium
layer
epitaxial layer
particle defects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201911106619.XA
Other languages
Chinese (zh)
Inventor
陈守钧
吴坤宪
周思敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Original Assignee
Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huali Integrated Circuit Manufacturing Co Ltd filed Critical Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority to CN201911106619.XA priority Critical patent/CN110854032A/en
Publication of CN110854032A publication Critical patent/CN110854032A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The application discloses a method for detecting particle defects in a germanium-silicon process, which belongs to the semiconductor manufacturing technology and comprises the following steps: providing a silicon substrate, wherein a grid structure with a side wall is manufactured on the silicon substrate; manufacturing grooves in regions on two sides of the grid structure; generating a germanium-silicon epitaxial layer in the groove; growing a gap layer through a thin film deposition process, wherein the gap layer is arranged above the germanium-silicon epitaxial layer; detecting particle defects caused by a process for generating the germanium-silicon epitaxial layer; the problem that the detection rate of the defect of the extremely tiny particles is not high due to the limit of the machine inspection limit at the germanium-silicon current station is solved; the method achieves the effects of improving the detection rate of particle defects and reducing the detection failure rate and cost loss.

Description

Method for detecting particle defects in germanium-silicon process
Technical Field
The application relates to the technical field of semiconductor manufacturing, in particular to a method for detecting particle defects in a germanium-silicon process.
Background
With the continuous shrinking of the critical dimension of semiconductor devices, the tolerance of products to the defect dimension is smaller and smaller. For products below 28nm, the germanium-silicon process becomes an indispensable process, and the defect detection in the conventional semiconductor manufacturing process mainly utilizes an optical scanning system and an electron beam scanning system.
The germanium-silicon process comprises the following process flows: and depositing an etching barrier layer, opening the etching barrier layer of the silicon substrate in the PMOS region through photoetching and dry etching processes, then continuously etching to form a groove, carrying out germanium-silicon epitaxial growth, and finally removing the etching barrier layer. When the germanium-silicon epitaxial layer grows, all regions on the surface of the wafer are subjected to germanium-silicon growth, and due to the selectivity of the germanium-silicon process, namely the selectivity exists when germanium on the surfaces of the non-silicon substrate and the silicon substrate is removed, and the selectivity can be adjusted by adjusting the corresponding gas flow and the like, silicon grown on the non-silicon substrate region is easily removed by the corresponding gas, and ideally, no germanium remains in the non-silicon substrate region after the germanium growth is completed. However, in the germanium-silicon process flow, germanium is difficult to completely remove by corresponding gases due to various reasons, thereby forming germanium-containing particle defects.
In the field of station detection of the germanium-silicon process, the conventional detection method is difficult to capture extremely tiny particle defects, such as particle defects with the defect size smaller than 30nm, and the detection rate of the defects is low.
Disclosure of Invention
The application provides a method for detecting particle defects in a germanium-silicon process, which can solve the problem that the detection rate of the particle defects in the germanium-silicon process is not high in the related art.
In one aspect, an embodiment of the present application provides a method for detecting a particle defect in a germanium-silicon process, where the method includes:
providing a silicon substrate, wherein a grid structure with a side wall is manufactured on the silicon substrate;
manufacturing grooves in regions on two sides of the grid structure;
generating a germanium-silicon epitaxial layer in the groove;
growing a gap layer by a thin film deposition process, wherein the gap layer is arranged above the germanium-silicon epitaxial layer;
detecting particle defects, wherein the particle defects are caused by the process of generating the germanium-silicon epitaxial layer.
Optionally, forming a trench in regions on both sides of the gate structure, including:
depositing an etching barrier layer;
removing the etching barrier layers in the areas on two sides of the grid structure through photoetching and etching processes to expose the silicon substrate;
and etching the silicon substrate to obtain the sigma-shaped groove.
Optionally, generating a silicon germanium epitaxial layer in the trench includes:
and generating a germanium-silicon epitaxial layer in the groove through a selective epitaxial process.
Optionally, the top of the germanium-silicon epitaxial layer is higher than the surface of the silicon substrate.
Optionally, the silicon germanium epitaxial layer includes a silicon germanium seed layer, a body layer and a cap layer.
Optionally, the gap layer comprises a silicon nitride layer.
Optionally, growing the gap layer by a thin film deposition process, including:
removing the etching barrier layer deposited in the groove manufacturing process;
the gap layer is grown by a thin film deposition process.
Optionally, the etching barrier layer is a silicon nitride layer.
Optionally, before growing the silicon germanium epitaxial layer in the trench, the method further includes:
and carrying out a precleaning process on the wafer.
Optionally, detecting particle defects, comprising:
particle defects were detected by an optical detection system.
The technical scheme at least comprises the following advantages:
the method comprises the steps that a silicon substrate is provided, a grid structure with side walls is manufactured on the silicon substrate, grooves are manufactured in regions on two sides of the grid structure, a germanium-silicon epitaxial layer is generated in the grooves, a gap layer is grown on the germanium-silicon epitaxial layer through a thin film deposition process, and particle defects are detected; the problem that the detection rate of the defect of the extremely tiny particles is not high due to the limit of the machine inspection limit at the germanium-silicon current station is solved; the detection time of the particle defects is moved from the germanium-silicon process to the thin film deposition process to grow the gap layer, so that the detection rate of the particle defects is effectively improved, and the detection failure rate and the cost loss are reduced.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a method for detecting a particle defect in a silicon germanium process according to an embodiment of the present disclosure;
fig. 2 is a flowchart of another method for detecting particle defects in a sige process according to an embodiment of the present disclosure;
FIG. 3 is a schematic illustration of a grain defect detected at a station in a prior art SiGe process;
fig. 4 is a schematic diagram of a detected grain defect by using the grain defect detection method in the germanium-silicon process provided by the embodiment of the present application.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, a flowchart of a method for detecting grain defects in a silicon germanium process according to an exemplary embodiment of the present application is shown. As shown in fig. 1, the method for detecting particle defects in a sige process may include the following steps:
step 101, providing a silicon substrate, wherein a gate structure with a side wall is manufactured on the silicon substrate.
Step 102, manufacturing grooves in regions on two sides of the gate structure.
Step 103, a germanium-silicon epitaxial layer is generated in the trench.
Step 104, growing a gap layer by a thin film deposition process.
The gap layer is arranged above the germanium-silicon epitaxial layer.
Step 105, detecting particle defects.
And detecting particle defects caused by the process of generating the germanium-silicon epitaxial layer at the gap layer station. For the detected particle defects, the size of the smallest particle defect in the particle defects is less than 30nm when the germanium-silicon process is in place.
In summary, the method for detecting particle defects in a germanium-silicon process provided by the application includes providing a silicon substrate, fabricating a gate structure with a side wall on the silicon substrate, fabricating a trench in regions on two sides of the gate structure, generating a germanium-silicon epitaxial layer in the trench, growing a gap layer through a thin film deposition process, and detecting particle defects; the problem that the detection rate of the defect of the extremely tiny particles is not high due to the limit of the machine inspection limit at the germanium-silicon current station is solved; the effects of improving the detection rate of particle defects and reducing the detection failure rate and cost loss are achieved.
Referring to fig. 2, a flowchart of a method for detecting grain defects in a silicon germanium process according to another exemplary embodiment of the present application is shown. As shown in fig. 2, the method for detecting particle defects in a sige process may include the following steps:
step 201, a silicon substrate is provided, and a gate structure with a sidewall is fabricated on the silicon substrate.
The method comprises the steps of manufacturing a polysilicon gate structure on the surface of a silicon substrate, depositing silicon dioxide on the silicon substrate through chemical vapor deposition equipment, and then etching to remove most of the silicon dioxide through a dry-method ion etching machine, so that a layer of silicon dioxide is left on the side wall of the polysilicon gate.
Step 202, an etch stop layer is deposited.
When the grooves are manufactured in the areas on the two sides of the grid structure, an etching barrier layer is firstly required to be deposited.
Optionally, the etching barrier layer is a silicon nitride layer.
And 203, removing the etching barrier layers in the areas on two sides of the gate structure through photoetching and etching processes to expose the silicon substrate.
And 204, etching the silicon substrate to obtain a sigma-shaped groove.
Optionally, the silicon substrate is etched by using a dry etching or wet process.
In step 205, a pre-cleaning process is performed on the wafer.
After the groove etching is completed and before germanium and silicon deposition, a pre-cleaning process needs to be carried out on the wafer.
Step 206, a silicon germanium epitaxial layer is generated in the trench.
And generating a germanium-silicon epitaxial layer in the groove through a selective epitaxial process. The germanium-silicon epitaxial layer comprises a germanium-silicon seed layer, a main body layer and a cover cap layer.
The top of the grown germanium-silicon epitaxial layer is higher than the surface of the silicon substrate.
Step 207, growing a gap layer by a thin film deposition process.
And removing the etching barrier layer deposited in the groove manufacturing process. Optionally, the etching barrier layer is a silicon nitride layer.
And growing a gap layer through a film deposition process, wherein the gap layer is arranged above the germanium-silicon epitaxial layer.
The PMOS tube is manufactured on the silicon substrate, the gap layer covers the upper part of the corresponding area of the PMOS tube, the extremely tiny particle defect which is difficult to detect by a germanium-silicon process station is existed in the particle defect caused by the germanium-silicon epitaxial layer, and the extremely tiny particle defect can be amplified and is easy to detect after the gap layer grown by a thin film deposition process covers the gap layer.
Optionally, the gap layer comprises a silicon nitride layer.
In step 208, the particle defects are detected by an optical detection system.
And detecting the wafer by using an optical detection system after the gap layer grows, and detecting the particle defect caused by the germanium-silicon epitaxial layer. Under the action of the gap layer, particle defects smaller than 30nm in the SiGe process can be detected.
Discarding the detected wafers with excessive defects and not meeting the process standard, and not carrying out subsequent process processing.
FIG. 3 is a schematic diagram illustrating grain defects obtained when a station performs inspection in a germanium-silicon process, and FIG. 4 is a schematic diagram illustrating grain defects obtained after a gap layer is grown through a thin film deposition process; wherein the black squares in fig. 3 and 4 represent grain defects. Comparing fig. 3 and fig. 4, it can be seen that more particle defects can be detected after the thin film deposition process, and the detection rate of the particle defects is improved.
To sum up, in the method for detecting particle defects in a germanium-silicon process provided by the embodiment of the present application, a silicon substrate is provided, a gate structure with a side wall is formed on the silicon substrate, trenches are formed in regions on both sides of the gate structure, a germanium-silicon epitaxial layer is formed in the trenches, a gap layer is formed by a thin film deposition process, and the particle defects are detected; the problem that the detection rate of the defect of the extremely tiny particles is not high due to the limit of the machine inspection limit at the germanium-silicon current station is solved; the detection time of the particle defects is moved from the germanium-silicon process to the thin film deposition process to grow the gap layer, so that the detection rate of the particle defects is effectively improved, and the detection failure rate and the cost loss are reduced.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.

Claims (10)

1. A method for detecting particle defects in a germanium-silicon process is characterized by comprising the following steps:
providing a silicon substrate, wherein a grid structure with a side wall is manufactured on the silicon substrate;
manufacturing grooves in regions on two sides of the grid structure;
generating a germanium-silicon epitaxial layer in the groove;
growing a gap layer through a thin film deposition process, wherein the gap layer is arranged above the germanium-silicon epitaxial layer;
detecting a particle defect caused by a process of generating the germanium-silicon epitaxial layer.
2. The method of claim 1, wherein forming trenches in regions on both sides of the gate structure comprises:
depositing an etching barrier layer;
removing the etching barrier layers in the areas on the two sides of the grid structure through photoetching and etching processes to expose the silicon substrate;
and etching the silicon substrate to obtain a sigma-shaped groove.
3. The method of claim 1, wherein the generating a silicon germanium epitaxial layer within the trench comprises:
and generating the germanium-silicon epitaxial layer in the groove through a selective epitaxial process.
4. The method of claim 1 wherein the top of the silicon germanium epitaxial layer is above the surface of the silicon substrate.
5. The method of claim 3 or 4, wherein the silicon germanium epitaxial layer comprises a silicon germanium seed layer, a body layer and a cap layer.
6. The method of claim 1, wherein the gap layer comprises a silicon nitride layer.
7. The method of claim 1 or 2, wherein growing the gap layer by a thin film deposition process comprises:
removing the etching barrier layer deposited in the groove manufacturing process;
the gap layer is grown by a thin film deposition process.
8. The method of claim 2 or 7, wherein the etch stop layer is a silicon nitride layer.
9. The method of claim 1, wherein prior to said growing a silicon germanium epitaxial layer within the trench, the method further comprises:
and carrying out a precleaning process on the wafer.
10. The method of claim 1, wherein said detecting particle defects comprises:
the particle defects are detected by an optical detection system.
CN201911106619.XA 2019-11-13 2019-11-13 Method for detecting particle defects in germanium-silicon process Pending CN110854032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911106619.XA CN110854032A (en) 2019-11-13 2019-11-13 Method for detecting particle defects in germanium-silicon process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911106619.XA CN110854032A (en) 2019-11-13 2019-11-13 Method for detecting particle defects in germanium-silicon process

Publications (1)

Publication Number Publication Date
CN110854032A true CN110854032A (en) 2020-02-28

Family

ID=69600769

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911106619.XA Pending CN110854032A (en) 2019-11-13 2019-11-13 Method for detecting particle defects in germanium-silicon process

Country Status (1)

Country Link
CN (1) CN110854032A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004010121A1 (en) * 2002-07-19 2004-01-29 Aoti Operating Company, Inc Detection method and apparatus
CN101740433A (en) * 2009-12-17 2010-06-16 上海集成电路研发中心有限公司 Method for detecting epitaxial defects
CN104241158A (en) * 2014-09-15 2014-12-24 上海华力微电子有限公司 Method for monitoring small-size particle defects on annealing device
CN108428668A (en) * 2018-03-14 2018-08-21 上海华力集成电路制造有限公司 The manufacturing method of PMOS with HKMG
CN110444473A (en) * 2019-08-29 2019-11-12 上海华力集成电路制造有限公司 The manufacturing method of embedded SiGe device and embedded SiGe device structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004010121A1 (en) * 2002-07-19 2004-01-29 Aoti Operating Company, Inc Detection method and apparatus
CN101740433A (en) * 2009-12-17 2010-06-16 上海集成电路研发中心有限公司 Method for detecting epitaxial defects
CN104241158A (en) * 2014-09-15 2014-12-24 上海华力微电子有限公司 Method for monitoring small-size particle defects on annealing device
CN108428668A (en) * 2018-03-14 2018-08-21 上海华力集成电路制造有限公司 The manufacturing method of PMOS with HKMG
CN110444473A (en) * 2019-08-29 2019-11-12 上海华力集成电路制造有限公司 The manufacturing method of embedded SiGe device and embedded SiGe device structure

Similar Documents

Publication Publication Date Title
US6991991B2 (en) Method for preventing to form a spacer undercut in SEG pre-clean process
US7709338B2 (en) BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices
US6639327B2 (en) Semiconductor member, semiconductor device and manufacturing methods thereof
US6329698B1 (en) Forming a self-aligned epitaxial base bipolar transistor
US20130113026A1 (en) Fin field effect transistor gate oxide
US9356163B1 (en) Structure and method of integrating waveguides, photodetectors and logic devices
US9412744B1 (en) III-V CMOS integration on silicon substrate via embedded germanium-containing layer
US20140252501A1 (en) Sacrificial replacement extension layer to obtain abrupt doping profile
US20120126357A1 (en) Light detection devices and methods of manufacturing the same
JP2007281038A (en) Semiconductor device
US7772673B1 (en) Deep trench isolation and method for forming same
US9620420B2 (en) Semiconductor arrangement and formation thereof
CN110854032A (en) Method for detecting particle defects in germanium-silicon process
JPH09167777A (en) Semiconductor device and its fabrication
CN110729347A (en) Manufacturing method of NLDMOS device and NLDMOS device
US20120241866A1 (en) Transistor structure and manufacturing method which has channel epitaxial equipped with lateral epitaxial structure
CN103247565B (en) A kind of fleet plough groove isolation structure and preparation method thereof
CN112736103B (en) Deep trench isolation forming method of image sensor and semiconductor device structure
US11289530B2 (en) Shallow trench isolation (STI) structure for CMOS image sensor
US20070264810A1 (en) Semiconductor devices and methods of forming the same
US9590083B2 (en) ITC-IGBT and manufacturing method therefor
US10147602B2 (en) Double aspect ratio trapping
US8273620B2 (en) Semiconductor integrated circuit device and related fabrication method
JP3719670B2 (en) Insulating film evaluation method, evaluation apparatus thereof, and manufacturing method of the evaluation apparatus
WO2024040712A1 (en) Manufacturing method for semiconductor structure, and semiconductor structure

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20200228

RJ01 Rejection of invention patent application after publication