CN110838890B - Deinterleaving method and device - Google Patents
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Abstract
The invention discloses a de-interleaving method and a de-interleaving device, and belongs to the field of communication. The method comprises the steps that a channel processing module is adopted to divide first symbol information sent by a sending end into at least one subcarrier row data block, and each subcarrier row data block is sent to a de-interleaving module one by one according to a preset sequence; the de-interleaving module can be used for de-interleaving each received subcarrier row data block one by one, the storage space of the de-interleaving module can meet the requirement of another subcarrier row data block, the requirement on the storage space is low, the power consumption is low, and the de-interleaving speed and the de-interleaving real-time performance are improved.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a deinterleaving method and apparatus.
Background
With the rapid growth of cellular phones, mobile wireless devices, and other wireless transmission services, there is a continuing interest in providing reliable, secure, and efficient wireless communications. IEEE 802.11 is a common standard of the current wireless local area network, and the WIFI standard has gone through five development courses of 802.11, 802.11b, 802.11g/a, 802.11n and 802.11 ac. In the upgrade of the WIFI standard from 802.11n to 802.11ac, on one hand, the transmission rate is greatly improved, on the other hand, the requirement for the data processing capability of the demodulation part is also greatly improved, and meanwhile, the capability of processing data of hardware (chips) is also continuously improved. The existing deinterleaving method applied to WIFI needs to write the whole deinterleaving data packet into a register of a deinterleaving module, and then starts deinterleaving processing. Because the data volume of the deinterleaving data packets is larger and larger, the requirement on the storage space of the deinterleaving module is higher and higher, and meanwhile, the occupied area of a chip and the corresponding power consumption are increased.
Disclosure of Invention
Aiming at the problems of higher and higher requirements on the storage space of a de-interleaving module and high power consumption of the existing de-interleaving method, the de-interleaving method and the de-interleaving device are provided, and the requirements on the storage space of the de-interleaving module and the power consumption can be reduced.
The invention provides a de-interleaving method, which comprises the following steps:
the channel processing module divides first symbol information sent by a sending end into at least one subcarrier row data block, and sends each subcarrier row data block to a de-interleaving module one by one according to a preset sequence;
and the de-interleaving module performs de-interleaving processing on each received subcarrier row data block one by one and outputs de-interleaved data.
Preferably, the step of dividing, by the channel processing module, the first symbol information sent by the sending end into at least one subcarrier row data block, and sending each subcarrier row data block to the deinterleaving module one by one in a preset order includes:
the channel processing module adjusts data in the first symbol information sent by the sending end into second symbol information which accords with the preset sequence;
the channel processing module maps the second symbol information to constellation points, divides the mapped second symbol information into at least one subcarrier row data block, and sends each subcarrier row data block to a de-interleaving module one by one according to the preset sequence.
Preferably, the channel processing module adjusts data in the first symbol information sent by the sending end to be second symbol information conforming to the preset sequence:
the channel processing module arranges the first symbol information according to the sequence of subcarriers, and arranges the subcarriers in the ordered first symbol information at intervals of subcarrier coding bits according to the sequence from small to large to generate the second symbol information.
Preferably, the second symbol information is an M × N data matrix;
N＝W/(Nbpscs+1)；
wherein N and M are positive integers, N represents the column number of the data array, M represents the row number of the data array, W represents the total number of subcarriers, and Nbpscs represents the number of subcarrier coding bits;
each row in the data matrix is formed by sequencing subcarriers from left to right in sequence from small to large and with the number of coded bits of the subcarriers as intervals; each row is formed by arranging subcarriers from small to large from top to bottom.
Preferably, the step of mapping, by the channel processing module, the second symbol information to constellation points, dividing the mapped second symbol information into at least one subcarrier row data block, and sending each subcarrier row data block to the deinterleaving module one by one according to the preset sequence includes:
the channel processing module maps the second symbol information to constellation points;
the channel processing module divides the mapped second symbol information into M/Nbpscs subcarrier row data blocks by using subcarrier coding bit number as an interval;
and the channel processing module sends each subcarrier row data block to a de-interleaving module one by one according to the preset sequence.
Preferably, the step of performing, by the deinterleaving module, deinterleave processing on each received subcarrier row data block one by one, and outputting deinterleaved data includes:
the de-interleaving module comprises a first register group and a second register group;
the first register group receives the subcarrier row data block of each odd row sent by the channel processing module; meanwhile, when the second register group is full of data, the second register group outputs the stored data; or
When the first register group is full of data, the first register group outputs the stored data; meanwhile, the second register group receives the subcarrier row data block of each even row sent by the channel processing module;
and performing comparative de-interleaving on the data output by the first register group and the second register group.
The present invention also provides a deinterleaving apparatus, comprising:
the channel processing module is used for dividing first symbol information sent by a sending end into at least one subcarrier row data block and outputting each subcarrier row data block one by one according to a preset sequence;
and the de-interleaving module is used for receiving each subcarrier row data block sent by the channel processing module, performing de-interleaving processing on each subcarrier row data one by one, and outputting de-interleaved data.
Preferably, the channel processing module includes:
the channel estimation equalizer is used for adjusting data in the first symbol information sent by the sending end into second symbol information which accords with the preset sequence;
and the demapping unit is configured to map the second symbol information to constellation points, divide the mapped second symbol information into at least one subcarrier row data block, and send each subcarrier row data block to a deinterleaving module one by one according to the preset sequence.
Preferably, the second symbol information is an M × N data matrix;
N＝W/(Nbpscs+1)；
wherein N and M are positive integers, N represents the column number of the data array, M represents the row number of the data array, W represents the total number of subcarriers, and Nbpscs represents the number of subcarrier coding bits;
each row in the data matrix is formed by sequencing subcarriers from left to right in sequence from small to large and with the number of coded bits of the subcarriers as intervals; each row is formed by arranging subcarriers from small to large from top to bottom.
Preferably, the deinterleaving module includes:
the first register group is used for receiving the subcarrier row data block of each odd row sent by the channel processing module, and outputting the stored data after the first register group is full of data;
the second register group is used for receiving the subcarrier row data block of each even row sent by the channel processing module, and outputting the stored data after the second register group is full of data;
and the de-interleaving unit is used for performing comparative de-interleaving on the data output by the first register group and the second register group.
The beneficial effects of the above technical scheme are that:
in the technical scheme, a channel processing module is adopted to divide first symbol information sent by a sending end into at least one subcarrier row data block, and each subcarrier row data block is sent to a de-interleaving module one by one according to a preset sequence; the de-interleaving module can be used for de-interleaving each received subcarrier row data block one by one, the storage space of the de-interleaving module can meet the requirement of another subcarrier row data block, the requirement on the storage space is low, the power consumption is low, and the de-interleaving speed and the de-interleaving real-time performance are improved.
Drawings
Fig. 1 is a schematic diagram of processing of conventional WIFI demodulated data;
FIG. 2 is a schematic diagram of data writing and reading of a conventional de-interleaving module;
FIG. 3 is a flowchart of a method of one embodiment of a deinterleaving method according to the present invention;
fig. 4 is a specific flowchart of the channel processing module according to the present invention for processing the first symbol information;
FIG. 5 is a schematic diagram of a data matrix of second symbol information;
FIG. 6 is a block diagram of an embodiment of a de-interleaving apparatus according to the present invention;
fig. 7 is a block diagram of a communication system employing a deinterleaving apparatus.
Detailed Description
Referring to fig. 1, which is a schematic diagram of processing of existing WIFI demodulation data, information output by a sending end is analog-to-digital converted by an analog-to-digital conversion module (ADC), and analog information is converted into digital information; completing data synchronization through a data channel; converting the time domain information into frequency domain information via Fast Fourier Transform (FFT); performing channel estimation and data equalization operation on the frequency domain information through a channel estimation equalizer, and sending the processed information to a Static Random Access Memory (SRAM) before sending the processed information to a demapping module so as to convert disorder information output from the FFT into sequence information; mapping the information to constellation points through a demapping module; de-interleaving the mapped information by using a de-interleaving module; punching data in the de-intersection processed information through a de-punching module; error correction module for correcting error of punched data by using Viterbi algorithm and grouped error correcting code; and scrambling the data through a descrambling module, and sending the data to a protocol layer.
Data deinterleaving in the WIFI standard 802.11n is performed in a memory space less than or equal to 18 x 6 depth. Data deinterleaving in the WIFI standard 802.11ac is performed in a memory space less than or equal to 26 x 8 x 9 depth. The WIFI standard 802.11ac requires approximately 3 times more memory in data interleaving than 802.11 n. Thus, it can be seen that: in the upgrade of the WIFI standard from 802.11n to 802.11ac, on one hand, the transmission rate is greatly improved, and on the other hand, the requirement on the data processing capability of the demodulation part is also greatly improved.
In a traditional mode, data de-interleaving of the WIFI standard 802.11ac is implemented on a complete de-interleaving data packet, and a register group in a de-interleaving module needs to store data of the whole de-interleaving data packet. The number of registers required to implement data deinterleaving of 802.11ac in a conventional manner can be quite large.
Referring to fig. 2, a schematic diagram of a data writing and reading mode of a de-interleaving module in an 80M bandwidth and 256QAM modulation mode according to the existing WIFI standard 802.11 ac; under the condition of the bandwidth of 80M and the modulation of 256QAM, one de-interleaved data packet of 802.11ac comprises 234 sub-carriers corresponding to c 0-c 233. Each carrier may modulate 8 messages, so each carrier will correspond to 8 input data. A deinterleaved packet may contain 234 × 8-1872 data packets corresponding to i 0-i 1871. In fig. 2, c0i0 represents data 0 of carrier 0; c in c0i0 denotes carrier, c0 denotes carrier0, i denotes input data input, i1 denotes input data 1; by analogy, the following can be known: c0i1 to c233i 1871.
In the conventional demodulation mode, 8 carriers are output at a time when 256QAM is output from the demapping module in order, and enter the deinterleaving module. From FIG. 2, it can be seen that when writing into the de-interleaving module, the data are written into 8 register groups (e.g., c0i1-c0i7, c1i8-c1i15) from top to bottom by columns from left to right and 1 time. When reading from the de-interleaving module, the data are read sequentially from left to right from top to bottom according to the rows. After all data in a de-interleaved data packet (N × W data, N for columns and W for rows) is written into the register set (e.g., each column is written with data), the data of the de-interleaved data packet is read from the register set. Data reading of the deinterleaved data packets is divided into M/Nbpscs (Nbpscs indicates the number of subcarrier coding bits) data blocks according to subcarrier behaviors, and each data block contains Ncol × Nbpscs data, which is called a subcarrier row data block. And reading data of the subcarrier row data block by Nbpscs. One row in each column is read from left to right per column at a time. Until the data block data is completely read. Each data block within the deinterleaved data packet is read in the same manner. Until the reading of the de-interleaving data packet data is finished.
Based on the above writing and reading processes of data deinterleaving, the current deinterleaving method has the defects that the storage space of a register set is large, reading operation can be performed only after all the deinterleaved data packets are written, the time consumption is long, and the power consumption is large. The application provides a de-interleaving method which can reduce the requirement of a storage space and reduce power consumption.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
As shown in fig. 3, the present invention provides a deinterleaving method, comprising the steps of:
s1, a channel processing module divides first symbol information sent by a sending end into at least one subcarrier row data block, and sends each subcarrier row data block to a de-interleaving module one by one according to a preset sequence;
referring to fig. 4, further, step S1 may include:
s11, the channel processing module adjusts data in first symbol information sent by the sending end into second symbol information according with the preset sequence;
specifically, step S11 may include:
the channel processing module arranges the first symbol information according to the sequence of subcarriers, and arranges the subcarriers in the ordered first symbol information at intervals of subcarrier coding bits according to the sequence from small to large to generate the second symbol information.
Considering that the existing channel estimation equalizer converts the out-of-order information output from the FFT into sequential information before sending the information to the demapping module after completing the channel estimation and data equalization operations, the conversion process is implemented by the SRAM. In this embodiment, the information sent to the deinterleaving module is changed into a preset sequence (i.e., a pre-deinterleaving sequence) by the channel processing module, so that the deinterleaving module can write and read the data block of each sub-carrier line conveniently.
In this embodiment, the second symbol information is an mxn data matrix;
N＝W/(Nbpscs+1)；
wherein N and M are positive integers, N represents the column number of the data array, M represents the row number of the data array, W represents the total number of subcarriers, and Nbpscs represents the number of subcarrier coding bits;
each row in the data matrix is formed by sequencing subcarriers from left to right in sequence from small to large and with the number of coded bits of the subcarriers as intervals; each row is formed by arranging subcarriers from small to large from top to bottom.
Specifically, the preset sequence (refer to fig. 5) is:
the first row data transmission sequence is: starting from the first subcarrier 0, reading at intervals of N/Nbps, reading the Ncol number and transmitting the Ncol number to a demapping unit.
The transmission sequence of the second row of data is as follows: and reading at the interval of N/Nbpscs from the first subcarrier 1, reading the Ncol number and transmitting the Ncol number to a demapping unit.
By analogy, the transmission sequence of the last row of data in the first symbol information is: and finally, reading at intervals of N/Nbpscs from the N/Nbpscs subcarrier W-1, reading N numbers and transmitting the N numbers to a demapping unit.
S12, the channel processing module maps the second symbol information to constellation points, the mapped second symbol information is divided into at least one subcarrier row data block, and each subcarrier row data block is sent to a de-interleaving module one by one according to the preset sequence.
In this embodiment, the second symbol information may be mapped to a constellation point by a demapping unit.
Specifically, step S12 may include:
the channel processing module maps the second symbol information to constellation points;
the channel processing module divides the mapped second symbol information into M/Nbpscs subcarrier row data blocks by using subcarrier coding bit number as an interval;
and the channel processing module sends each subcarrier row data block to a de-interleaving module one by one according to the preset sequence.
And S2, the de-interleaving module performs de-interleaving processing on each received subcarrier row data block one by one and outputs de-interleaved data.
In this embodiment, the deinterleaving module does not need to store the data of the whole second symbol information, and the storage space of the deinterleaving module meets the requirements of the two subcarrier row data blocks, so that the requirements on the storage space are low, the power consumption is low, and the deinterleaving rate and the deinterleaving real-time performance are improved.
Specifically, step S2 may include:
the de-interleaving module comprises a first register group and a second register group;
the first register group receives the subcarrier row data block of each odd row sent by the channel processing module; meanwhile, when the second register group is full of data, the second register group outputs the stored data; or
When the first register group is full of data, the first register group outputs the stored data; meanwhile, the second register group receives the subcarrier row data block of each even row sent by the channel processing module;
and performing comparative de-interleaving on the data output by the first register group and the second register group.
In the present embodiment, the first register group is used to store the subcarrier row data block of the odd row sent from step S1. The second register group is used to store the subcarrier row data block of the even row sent from step S1. When the first register set is full, the first register set starts to be in a data reading state, and simultaneously, the second register set starts to enter a writing state. The first register set and the second register set are alternately in a read state or a write state.
By way of example and not limitation, when the first register set and the second register set both adopt 8 × 26 depth, under the WIFI standard 802.11ac in 80M bandwidth and 256QAM modulation mode, Nbpscs is 8, the maximum use of the register set by the de-interleaving module is reached, and the read-write process for the first register set and the second register set in the de-interleaving module is as follows:
the process of inputting and outputting the deinterleaving module by the subcarrier row data block is as follows (refer to fig. 5):
line 1 (i.e., odd line) starts with carrier0 with subcarrier input, and in turn, carrier0, carrier9, carrier18, … …, carrier225, inputs nxnbpscs data, and stores in the first register group. Data c0i0, c0i1, c0i2, c0i3, c0i4, c0i5, c0i6, and c0i7 corresponding to the subcarrier carrier0 are stored in the 1 st column of the first register group. Data c225i1800, c225i1801, c225i1802, c225i1803, c225i1804, c225i1805, c225i1806, c225i1807 corresponding to the subcarrier carrier225 are stored in the last column (i.e., the nth column) of the first register group. When the NxNbpscs data in the first register group are written to full, a complete subcarrier row data block positioned in an odd row is obtained. And (4) deinterleaving the subcarrier row data block, starting (the deinterleaving process is the same as the existing mode), and outputting the data in the current first register group.
Line 2 (i.e., even line) starts with carrier1 with subcarrier input, carrier1, carrier10, carrier19, … …, carrier226, inputs nxnbpscs data, and stores in the second register set. When the NxNbpscs data in the second register group are written to full, a complete subcarrier row data block positioned in an even row is obtained. And (4) starting the de-interleaving of the subcarrier row data block (the de-interleaving process is the same as the prior mode), and outputting the data in the current second register group.
Before the 3 rd row (i.e. odd row) starts with subcarrier input, all subcarrier row data blocks originally stored in the first register set need to be output. Line 3 starts with carrier2 with subcarrier input, and in turn carrier2, carrier11, carrier20, … …, carrier227, inputs nxnbpscs data, and stores in the first register set. When the NxNbpscs data in the first register group are written to full, a complete subcarrier row data block positioned in an odd row is obtained. And starting de-interleaving of the sub-carrier line data block, and outputting the data in the current first register group. And repeating the steps until all the subcarrier row data blocks are output.
In this embodiment, a channel processing module is adopted to divide first symbol information sent by a sending end into at least one subcarrier row data block, and each subcarrier row data block is sent to a de-interleaving module one by one according to a preset sequence; the de-interleaving module can be used for de-interleaving each received subcarrier row data block one by one, the storage space of the de-interleaving module can meet the requirements of two subcarrier row data blocks, the requirements on the storage space are low, the power consumption is low, and the de-interleaving speed and the de-interleaving real-time performance are improved.
Compared with the conventional deinterleaving method, the storage space of the first register set and the second register set in the deinterleaving module in this embodiment is 1/9 of the storage space of the conventional register set. The deinterleaving module in this embodiment does not need to wait for the reception of the entire deinterleaved data packet before outputting data, and can output data after the input of the first subcarrier row data block is completed, thereby greatly reducing the delay of demodulation data.
As shown in fig. 6, the present invention also provides a deinterleaving apparatus, which may include: the channel processing module 2 and the de-interleaving module 1;
the channel processing module 2 is configured to divide first symbol information sent by a sending end into at least one subcarrier row data block, and output each subcarrier row data block one by one in a preset order;
the channel processing module 2 comprises: a channel estimation equalizer 21 and a demapping unit 22;
a channel estimation equalizer 21, configured to adjust data in the first symbol information sent by the sending end to second symbol information that conforms to the preset sequence;
the second symbol information is an M multiplied by N data matrix;
N＝W/(Nbpscs+1)；
wherein N and M are positive integers, N represents the column number of the data array, M represents the row number of the data array, W represents the total number of subcarriers, and Nbpscs represents the number of subcarrier coding bits;
each row in the data matrix is formed by sequencing subcarriers from left to right in sequence from small to large and with the number of coded bits of the subcarriers as intervals; each row is formed by arranging subcarriers from small to large from top to bottom.
A demapping unit 22, configured to map the second symbol information to a constellation point, divide the mapped second symbol information into at least one subcarrier row data block, and send each subcarrier row data block to the deinterleaving module 1 one by one according to the preset sequence.
And the de-interleaving module 1 is configured to receive each subcarrier row data block sent by the channel processing module 2, perform de-interleaving processing on each subcarrier row data one by one, and output de-interleaved data.
The de-interleaving module 1 comprises: a first register group 11, a second register group 12, and a deinterleaving unit 13;
a first register group 11, configured to receive the subcarrier row data block of each odd row sent by the channel processing module 2, where after the first register group 11 is full of data, the first register group 11 outputs stored data;
a second register group 12, configured to receive the subcarrier row data block of each even row sent by the channel processing module 2, where after the second register group 12 is full of data, the second register group 12 outputs stored data;
a deinterleaving unit 13, configured to perform deinterleaving on the data output from the first register group 11 and the second register group 12.
In this embodiment, a channel processing module 2 is adopted to divide first symbol information sent by a sending end into at least one subcarrier row data block, and each subcarrier row data block is sent to a de-interleaving module 1 one by one according to a preset sequence; the de-interleaving module 1 can de-interleave each received subcarrier row data block one by one, the storage space of the de-interleaving module 1 can meet the requirements of two subcarrier row data blocks, the requirements on the storage space are low, the power consumption is low, and the de-interleaving speed and the de-interleaving real-time performance are improved.
As shown in fig. 7, the deinterleaving apparatus of the present embodiment can be applied to a communication system including: the device comprises an analog-to-digital conversion module (ADC), a fast Fourier transform module (FFT), a channel processing module, a de-interleaving module, a de-puncturing module, an error correction module, a descrambling module and the like. The first symbol information output by the sending end is subjected to analog-to-digital conversion through an analog-to-digital conversion module, and the analog information is converted into digital information; completing data synchronization through a data channel; converting the time domain information into frequency domain information via Fast Fourier Transform (FFT); dividing the first symbol information into a plurality of subcarrier row data blocks through a channel processing module, and sending each subcarrier row data block to a de-interleaving module one by one according to a preset sequence; the de-interleaving module performs de-interleaving processing on each received subcarrier row data block one by one, outputs the data block to the de-puncturing module, and punctures data in de-interleaved information through the de-puncturing module; error correction module for correcting error of punched data by using Viterbi algorithm and grouped error correcting code; and contacting data scrambling through a descrambling module so as to transmit the data to a protocol layer.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (8)
1. A deinterleaving method comprising the steps of:
the channel processing module divides first symbol information sent by a sending end into at least one subcarrier row data block, and sends each subcarrier row data block to a de-interleaving module one by one according to a preset sequence;
the deinterleaving module performs deinterleaving processing on each received subcarrier row data block one by one, and outputs deinterleaved data, specifically including: the de-interleaving module comprises a first register group and a second register group; the first register group receives the subcarrier row data block of each odd row sent by the channel processing module; when the second register group is full of data, the second register group outputs the stored data; or when the first register group is full of data, the first register group outputs the stored data; the second register group receives the subcarrier row data block of each even row sent by the channel processing module;
and de-interleaving the data output by the first register group and the second register group.
2. The deinterleaving method according to claim 1, wherein the step of the channel processing module dividing the first symbol information sent by the sending end into at least one subcarrier row data block, and sending each subcarrier row data block to the deinterleaving module one by one in a preset order includes:
the channel processing module adjusts data in the first symbol information sent by the sending end into second symbol information which accords with the preset sequence;
the channel processing module maps the second symbol information to constellation points, divides the mapped second symbol information into at least one subcarrier row data block, and sends each subcarrier row data block to a de-interleaving module one by one according to the preset sequence.
3. The deinterleaving method according to claim 2, wherein the step of the channel processing module adjusting data in the first symbol information sent by the sending end to the second symbol information in accordance with the preset order is as follows:
the channel processing module arranges the first symbol information according to the sequence of subcarriers, and arranges the subcarriers in the ordered first symbol information at intervals of subcarrier coding bits according to the sequence from small to large to generate the second symbol information.
4. The deinterleaving method according to claim 2, wherein the second symbol information is an mxn data matrix;
N=W/（Nbpscs+1）；
wherein N and M are positive integers, N represents the column number of the data array, M represents the row number of the data array, W represents the total number of subcarriers, and Nbpscs represents the number of subcarrier coding bits;
each row in the data matrix is formed by sequencing subcarriers from left to right in sequence from small to large and with the number of coded bits of the subcarriers as intervals; each row is formed by arranging subcarriers from small to large from top to bottom.
5. The deinterleaving method according to claim 4, wherein the step of the channel processing module mapping the second symbol information to constellation points, dividing the mapped second symbol information into at least one subcarrier row data block, and sending each subcarrier row data block to the deinterleaving module one by one in the preset order includes:
the channel processing module maps the second symbol information to constellation points;
the channel processing module divides the mapped second symbol information into M/Nbpscs subcarrier row data blocks by using subcarrier coding bit number as an interval;
and the channel processing module sends each subcarrier row data block to a de-interleaving module one by one according to the preset sequence.
6. A deinterleaving apparatus, comprising:
the channel processing module is used for dividing first symbol information sent by a sending end into at least one subcarrier row data block and outputting each subcarrier row data block one by one according to a preset sequence;
the de-interleaving module is used for receiving each subcarrier row data block sent by the channel processing module, performing de-interleaving processing on each subcarrier row data one by one and outputting de-interleaved data;
the de-interleaving module comprises:
the first register group is used for receiving the subcarrier row data block of each odd row sent by the channel processing module, and outputting the stored data after the first register group is full of data;
the second register group is used for receiving the subcarrier row data block of each even row sent by the channel processing module, and outputting the stored data after the second register group is full of data;
and the de-interleaving unit is used for de-interleaving the data output by the first register group and the second register group.
7. The deinterleaving apparatus as claimed in claim 6, wherein the channel processing module comprises:
the channel estimation equalizer is used for adjusting data in the first symbol information sent by the sending end into second symbol information which accords with the preset sequence;
and the demapping unit is configured to map the second symbol information to constellation points, divide the mapped second symbol information into at least one subcarrier row data block, and send each subcarrier row data block to a deinterleaving module one by one in the preset order.
8. The deinterleaving apparatus as claimed in claim 7, wherein the second symbol information is an mxn data matrix;
N=W/（Nbpscs+1）；
wherein N and M are positive integers, N represents the column number of the data array, M represents the row number of the data array, W represents the total number of subcarriers, and Nbpscs represents the number of subcarrier coding bits;
each row in the data matrix is formed by sequencing subcarriers from left to right in sequence from small to large and with the number of coded bits of the subcarriers as intervals; each row is formed by arranging subcarriers from small to large from top to bottom.
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