CN110832805B

CN110832805B - Method for synchronizing network equipment and network equipment

Info

Publication number: CN110832805B
Application number: CN201780092858.7A
Authority: CN
Inventors: 吕京飞; 张亚伟
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2017-12-18
Filing date: 2017-12-18
Publication date: 2021-06-29
Anticipated expiration: 2037-12-18
Also published as: US20200322906A1; US11963120B2; EP3905555A1; CN112865903B; EP3709559A4; US20230217382A1; EP3709559A1; US11412468B2; CN112865903A; US20210212003A1; WO2019119213A1; CN110832805A; US11540238B2

Abstract

A method of synchronizing network devices is provided. The method comprises the following steps: the method comprises the steps that network equipment receives a first SSM and a second SSM, the first SSM carries a first SSM code used for indicating the quality grade of a first clock source and a first eSSM code used for indicating the quality grade of the first clock source, and the second SSM carries a second SSM code used for indicating the quality grade of a second clock source and a second eSSM code used for indicating the quality grade of the second clock source. When the value of the first SSM code is less than the value of the second SSM code, the network device calibrates the frequency of the network device according to the timing signal of the first clock source. Network devices and computer program products are also provided. The scheme can enable the network equipment to select the synchronization source with higher clock synchronization precision.

Description

Method for synchronizing network equipment and network equipment

Technical Field

The present invention relates to the field of communications technologies, and in particular, to a method for synchronizing network devices and a network device.

Background

The format of the quality class type length value (QL TLV) is defined in G.8264/Y.1364(05/2014) issued by the International Telecommunication Union, Telecommunication Standardization Sector (ITU-T). Synchronization Status Message (SSM) code may be carried in a quality level type length value (QL TLV). The format of the extended quality class type length value (extended QL TLV) is defined in G.8264/Y.1364 attribute 2(04/2016) published by ITU-T. Enhanced Synchronization Status Message (eSSM) code may be carried in an extended QL TLV. When the network device receives a plurality of messages which are compliant with G.8264/Y.1364 attribute 2 and are respectively used for indicating quality levels of different clock sources, how to select a clock source for tracking from the plurality of clock sources is not specified in G.8264/Y.1364 attribute 2 (04/2016). The above makes it impossible for the network device to select a clock source (synchronization source) with higher clock synchronization accuracy from a plurality of clock sources.

Disclosure of Invention

Methods, network devices, computer program products, and systems for synchronizing network devices are provided. The scheme can enable the network equipment to select the clock source with higher clock synchronization precision.

In a first aspect, a method for synchronizing network devices is provided.

The method comprises the following steps: the method comprises the steps that a network device receives a first Synchronization Status Message (SSM) and a second SSM, wherein the first SSM carries a first SSM code used for indicating the quality level of a first clock source and an Enhanced synchronization status message (eSSM) code used for indicating the quality level of the first clock source, and the second SSM carries a second SSM code used for indicating the quality level of a second clock source and a second eSSM code used for indicating the quality level of the second clock source;

the method further comprises the following steps: when the value of the first SSM code is less than the value of the second SSM code, the network device calibrates the frequency of the network device according to the timing signal of the first clock source.

G.8264/Y.1364 defines a set of clock quality levels. For example, the clock quality levels defined by G.8264/Y.1364 include QL-PRC, QL-SSU-A, QL-SSU-B, QL-SEC, and QL-DNU. For QL-PRC, QL-SSU-A, QL-SSU-B, QL-SEC, and QL-DNU, reference may be made to G.781 and G.8264. In addition, according to g.8264/y.1364, the smaller the value of the SSM code, the higher the quality level of the corresponding clock source.

When the value of the first SSM code is less than the value of the second SSM code, the quality level of the first clock source is higher than the quality level of the second clock source. Therefore, tracking the first clock source by the network device can obtain a frequency with higher accuracy than tracking the second clock source.

In addition, G.8264/Y.1364 attribute 2 defines the eSSM code. When the quality level of the clock source is the clock quality level defined by g.781, the value of the esm code indicating the quality level of the clock source is equal to 0 xFF. For example, assuming that the quality level of the first clock source is QL-EEC1 and the quality level of the second clock source is QL-PRC, the value of the SSM code corresponding to the first clock source is equal to 0xB and the value of the SSM code corresponding to the second clock source is equal to 0x 2. The value of the eSSM code corresponding to the first clock source is equal to 0xFF, and the value of the eSSM code corresponding to the second clock source is equal to 0 xFF. That is, if the network device only supports g.8264/y.1364 and does not support g.8264/y.1364 attribute 2, the network device determines that the quality level of the first clock source is lower than that of the second clock source based on the value of the first SSM code being greater than that of the second SSM code. However, if the network device only supports the g.8264/y.1364 attribute 2 and not the g.8264/y.1364 SSM code, the network device determines that the quality level of the first clock source and the quality level of the second clock source are the same based on the value of the first eSSM code being equal to the value of the second eSSM code. That is, although the quality levels of the first clock source and the second clock source are actually different, it is determined that the quality levels of the first clock source and the second clock source are the same according to only the value of the eSSM code.

According to the analysis, when the value of the first SSM code is different from the value of the second SSM code, the clock source to be tracked is determined according to the value of the SSM code, and compared with the case that the clock source to be tracked is determined according to the value of the eSSM code, the network device can track the clock with higher precision. Specifically, when the value of the first SSM code is smaller than the value of the second SSM code, the clock source with the smaller value of the SSM code, that is, the first clock source, is determined to be the clock source to be tracked, so that the network device can track the clock with higher precision.

Optionally, in the foregoing technical solution, the method further includes: when the value of the first SSM code is equal to the value of the second SSM code and the value of the first esm code is less than the value of the second esm code, the network device calibrates the frequency of the network device according to the timing signal of the first clock source.

When the value of the first SSM code is equal to the value of the second SSM code, it is determined that the quality level of the first clock source is equal to the quality level of the second clock source only according to the value of the SSM code. And in fact, the quality level of the first clock source is higher than the quality level of the second clock source.

Therefore, in the above technical solution, when the value of the first SSM code is equal to the value of the second SSM code, a clock source with higher precision can be determined according to the value of the eSSM code.

Optionally, in the foregoing technical solution, the method further includes: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, and the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock (SSU/PRC) in the first SSM is smaller than the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the second SSM, the network device calibrates the frequency of the network device according to the timing signal of the first clock source.

In the above technical solution, when the value of the first SSM code is equal to the value of the second SSM code, and the value of the first eSSM code is equal to the value of the second eSSM code, the network device may select a clock source for calibrating the frequency of the network device from a plurality of clock sources, thereby avoiding a problem caused by an inability to determine the clock source. For example, the inability to determine the clock source may result in poor accuracy of the clock of the network device, and even in a disruption of the traffic of the network device.

Optionally, in the foregoing technical solution, the method further includes: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM equals the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM, and the value of the Number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the first SSM (Number of cascaded eecs from the nearest SSU/PRC) is less than the value of the Number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the second SSM, the network device calibrates a frequency of the network device according to the timing signal of the first clock source.

Optionally, in the foregoing technical solution, the method further includes: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the first SSM, the value of the number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the second SSM, and the value of synchronous ethernet Master identity (sync Master ID) in the first SSM is smaller than the value of sync Master ID in the second SSM, the network device calibrates a frequency of the network device according to the timing signal of the first clock source.

In a second aspect, a network device is provided. The network device includes: a receiving unit and a calibration unit.

The receiving unit is used for receiving a first SSM and a second SSM, the first SSM carries a first SSM code used for indicating the quality grade of a first clock source and a first eSSM code used for indicating the quality grade of the first clock source, and the second SSM carries a second SSM code used for indicating the quality grade of a second clock source and a second eSSM code used for indicating the quality grade of the second clock source.

The calibration unit is configured to calibrate the frequency of the network device according to the timing signal of the first clock source when the value of the first SSM code is smaller than the value of the second SSM code.

Optionally, in the above technical solution, the calibration unit is further configured to: calibrating a frequency of the network device according to a timing signal of the first clock source when a value of the first SSM code is equal to a value of the second SSM code and the value of the first eSSM code is less than the value of the second eSSM code.

Optionally, in the above technical solution, the calibration unit is further configured to: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, and the value of the number of cascaded synchronous ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is smaller than the value of the number of cascaded synchronous ethernet device clocks in the second SSM from the nearest synchronous supply unit/master reference clock, calibrating the frequency of the network device according to the timing signal of the first clock source.

Optionally, in the above technical solution, the calibration unit is further configured to: calibrating the frequency of the network device according to the timing signal of the first clock source when the value of the first SSM code is equal to the value of the second SSM code, the value of the number of cascaded synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is equal to the value of the number of cascaded synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock, and the value of the number of cascaded enhanced synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is less than the value of the number of cascaded enhanced synchronous Ethernet device clocks in the second SSM from the nearest synchronous supply unit/master reference clock.

Optionally, in the above technical solution, the calibration unit is further configured to: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM equals the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM, the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM is equal to the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the second SSM, and the value of the SyncE Master ID in the first SSM is smaller than the value of the SyncE Master ID in the second SSM, and the frequency of the network equipment is calibrated according to the timing signal of the first clock source.

In a third aspect, a network device is provided. The network device includes a transceiver, a processor, and a memory. The transceiver is coupled with the processor, and the processor is coupled with the memory. The memory stores a computer program.

The transceiver is used for receiving a first SSM and a second SSM, the first SSM carries a first SSM code used for indicating the quality grade of a first clock source and a first eSSM code used for indicating the quality grade of the first clock source, and the second SSM carries a second SSM code used for indicating the quality grade of a second clock source and a second eSSM code used for indicating the quality grade of the second clock source.

The computer program in the memory, when executed, causes the processor to: calibrating a frequency of the network device according to a timing signal of the first clock source when the value of the first SSM code is less than the value of the second SSM code.

Optionally, in the above technical solution, when the computer program in the memory is executed, the processor is further caused to: calibrating a frequency of the network device according to a timing signal of the first clock source when a value of the first SSM code is equal to a value of the second SSM code and the value of the first eSSM code is less than the value of the second eSSM code.

Optionally, in the above technical solution, when the computer program in the memory is executed, the processor is further caused to: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, and the value of the number of cascaded synchronous ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is smaller than the value of the number of cascaded synchronous ethernet device clocks in the second SSM from the nearest synchronous supply unit/master reference clock, calibrating the frequency of the network device according to the timing signal of the first clock source.

Optionally, in the above technical solution, when the computer program in the memory is executed, the processor is further caused to: calibrating the frequency of the network device according to the timing signal of the first clock source when the value of the first SSM code is equal to the value of the second SSM code, the value of the number of cascaded synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is equal to the value of the number of cascaded synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock, and the value of the number of cascaded enhanced synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is less than the value of the number of cascaded enhanced synchronous Ethernet device clocks in the second SSM from the nearest synchronous supply unit/master reference clock.

Optionally, in the above technical solution, when the computer program in the memory is executed, the processor is further caused to: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM equals the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM, the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM is equal to the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the second SSM, and the value of the SyncE Master ID in the first SSM is smaller than the value of the SyncE Master ID in the second SSM, and the frequency of the network equipment is calibrated according to the timing signal of the first clock source.

In a fourth aspect, a computer program product is provided. The computer program product is stored on a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer program, when executed, causes a computer or processor to perform the method provided by the first aspect.

In a fifth aspect, a computer-readable storage medium is provided, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer-readable storage medium stores a computer program or code which, when executed, causes a computer or processor to perform the method provided by the first aspect.

In a sixth aspect, a system is provided. The system comprises a first clock source, a second clock source and the network equipment provided by the second aspect or the third aspect.

Drawings

Fig. 1 is a schematic diagram of a clock synchronization network provided in the present application.

Fig. 2 is a schematic diagram of a clock synchronization network provided in the present application.

Fig. 3 is a flowchart illustrating a method for synchronizing network devices according to the present application.

Fig. 4 is a schematic structural diagram of a network device provided in the present application.

Fig. 5 is a schematic structural diagram of a network device provided in the present application.

Fig. 6 is a schematic structural diagram of a network device provided in the present application.

Fig. 7 is a schematic structural diagram of a system provided in the present application.

Detailed Description

G.8264/Y.1364 in this application refers to the standard published by ITU-T in 5 months 2014. G.8264/Y.1364 annotation 2 refers to the standard published by ITU-T in 2016, month 4. G.781 refers to a standard published by ITU-T in 9 months 2008.

The technical solutions in the present application will be described below with reference to the drawings in the present application.

Fig. 1 is a schematic diagram of a clock synchronization network according to an embodiment. The clock synchronization network includes a satellite 10, a router 11, a router 12, a router 13, and a base station 16. The satellites 10 may be Global Positioning System (GPS) satellites. The satellites 10 may also be Global Navigation Satellite System (GLONASS) satellites or BeiDou Navigation Satellite System (BeiDou Navigation Satellite System) satellites. The embodiments of the present application take GPS satellites as an example. The router 11 may be a provider router. The router 12 may be a provider edge router (provider edge router). The router 13 may be a customer edge router (customer edge router). Router 11, router 12, and router 13 may provide Virtual Private Network (VPN) traffic. For example, the VPN service may be a layer 2 virtual private network (L2 VPN) service. It is understood that router 11, router 12, and router 13 provide L2VPN traffic, but also refer to other network devices not shown in fig. 1, such as hosts (host). The host may be a laptop computer (laptop computer) or a desktop computer (desktop computer). The base station 15 is a network device in a cellular network (cellular network). For example, the base station 16 may be a NodeB. The base station 16 may provide wireless access services. It is to be understood that the base station 16 may also refer to other network equipment, such as User Equipment (UE), not shown in fig. 1, when providing radio access services. The user equipment may be a cellular telephone (cellular phone).

In the clock synchronization network shown in fig. 1, the satellite 10 is located upstream of the clock synchronization network and the base station 16 is located downstream of the clock synchronization network. A device located upstream may send a clock signal to a device located downstream through a clock synchronization network. Specifically, the satellite 10 may perform a clock synchronization operation on the router 11. The satellites 10 may be GPS satellites. In particular, the router 11 may contain a Building Integrated Timing Supply (BITS) clock. The BITS clock includes a GPS receiver. The satellite 10 may include an atomic clock (atomic clock). The satellite 10 may send GPS signals to the router 11 driven by an atomic clock. The GPS signal may include therein time data with the same accuracy as an atomic clock. After receiving the GPS signal, the GPS receiver in the router 11 may synchronize the clock in the router 11 to the atomic clock in the GPS satellite according to the time data in the GPS signal. In particular, router 11 may synchronize the time of a clock in router 11 to the time of an atomic clock in a GPS satellite. And, router 11 may synchronize the frequency of the clock in router 11 to the frequency of the atomic clock in the GPS satellite. In the above process, the BITS Clock may be an optimal Reference Time Clock (PRTC). After the clock of the router 11 is calibrated, the router 11 may serve as a clock source to send timing information (timing information) to the other device, so as to calibrate the time of the other device. In this application, a clock source may also be referred to as a synchronization source. For example, router 11 may be a clock source supporting G.8264/Y.1364 attribute 2. For example, when the quality level of the BITS clock contained in the router 11 is QL-PRTC, the router 11 may transmit SSM to other devices. The value of the eSSM code contained in the SSM is equal to 0x 20; when the quality level of the BITS clock contained in the router 11 is QL-ePRTC, the router 11 can transmit SSM to other devices. The value of the eSSM code contained in the SSM is equal to 0x 21. If other devices also support g.8264/y.1364 attribute 2, other devices may determine that the quality level of router 11 is QL-PRTC or QL-epdtc according to the eSSM code in the received SSM.

After the clock of the router 11 is calibrated, the router 11 can be used as a clock source of other devices. In particular, router 11 may act as a clock source, calibrating the clocks of other devices. For example, both router 11 and router 12 may be G.8264/Y.1364 attribute 2 compliant devices. Router 11 may calibrate the frequency of the clock of router 12 based on g.8264/y.1364 attribute 2. Similarly, router 12 may calibrate the clock of router 13 as a clock source. The router 13 may be used as a clock source to calibrate the clock of the base station 1. In the above process, router 11 may be considered as the clock source of router 13. If router 12 stops tracing router 11, i.e., when router 12 is operating as a free running clock, router 12 may be considered the clock source of router 13.

In the above scheme, router 11, router 12, and router 13 are located in a fixed network. The base station 16 is located in a cellular network. The router 13 may be located at the edge of the fixed network. Before router 13 calibrates the frequency and time of the local clock of base station 16, router 13 needs to track and synchronize the router 13 local clock with the frequency and time of router 12 as a clock source.

Fig. 2 is a schematic diagram of a clock synchronization network according to an embodiment. The solution shown in fig. 2 can be extended based on the clock synchronization network shown in fig. 1. What is not mentioned in this embodiment may refer to the description of the embodiment corresponding to fig. 1. The following mainly describes the differences between the solution shown in fig. 2 and the solution shown in fig. 1. The clock synchronization network shown in fig. 2 includes a satellite 10, a router 11, a router 12, a router 13, a router 14, a router 15, a base station 16, and a base station 17. With respect to fig. 1, the clock synchronization network shown in fig. 2 also comprises a router 14, a router 15 and a base station 17. The router 14 may be an operator router. The router 15 may be a carrier edge router. The base station 17 is a network device in a cellular network.

The satellite 10 may perform clock synchronization operations with the router 14. With respect to the procedure of the satellite 10 performing the clock synchronization operation on the router 14, reference may be made to the above description of the satellite 10 performing the clock synchronization operation on the router 11. And will not be described in detail herein. After the clock of the router 14 is calibrated, the router 14 may be used as a clock source to calibrate the time of other devices. For example, router 14 supports G.8264/Y.1364. The quality class of the router 14 is QL-PRTC. Router 14 may calibrate the frequency of the clock of router 15 based on g.8264/y.1364. The router 15 supports G.8264/Y.1364 and does not support G.8264/Y.1364 attribute 2. The quality class of the router 15 is QL-EEC1 or QL-EEC 2. Thus, when router 15 traces router 14, the quality level indicated by the SSM code contained in the SSM sent by router 15 to the downstream device in the clock network (e.g., router 13) is QL-PRC. When the router 15 is a free-running clock, the quality level indicated by the SSM code contained in the SSM sent by the router 15 to the downstream device (e.g., the router 13) is QL-EEC1 or QL-EEC 2.

According to fig. 2, a router 13 is coupled to a router 12. Router 13 is coupled to router 15. The router 13 is coupled to the base station 10. The router 13 is coupled to a base station 17. Specifically, the router 13 includes port 1, port 2, port 3, and port 4. Port 1, port 2, port 3 and port 4 may all be ethernet ports. The ethernet port may be a fast ethernet port, a gigabit ethernet port, or a higher rate ethernet port. Router 3 may be coupled with router 12 via port 1. Router 13 may be coupled with router 15 via port 2. The router 13 may be coupled with a base station 16 via port 3. Router 13 may be coupled with base station 17 via port 4. Router 13 may receive information for clock source router 11 and router 15 through port 1 and port 2, respectively.

Specifically, the router 15 supports G.8264/Y.1364 and does not support G.8264/Y.1364 attribute 2. When router 15 is a free running clock, router 13 receives the SSM sent by router 15 through port 2. The SSM code contained in the SSM sent by the router 15 indicates the quality level of the clock source (router 15). For example, the SSM code has a value of 0xB, indicating that the quality level of the router 15 is QL-EEC 1. Since router 15 does not support g.8264/y.1364 attribute 2, the SSM sent by router 15 does not contain an eSSM code. That is, the SSM transmitted by the router 15 does not include an eSSM code indicating the quality level of the clock source (router 15).

Specifically, the router 12 supports G.8264/Y.1364 and G.8264/Y.1364 attribute 2. When router 12 traces router 11, router 13 receives the SSM sent by router 12 through port 1. The SSM code included in the SSM sent by the router 12 indicates the quality level of the clock source (router 11). For example, the SSM code has a value of 0x2, indicating that the quality level of router 15 is QL-PRC. Because the router 12 supports g.8264/y.1364 attribute 2, the SSM sent by the router 12 contains the eSSM code. The eSSM code contained in the SSM sent by the router 12 indicates the quality level of the clock source (router 12). For example, the value of the eSSM code is 0x20, indicating that the quality level of the router 12 is QL-PRTC.

Fig. 3 is a flowchart illustrating a method for synchronizing network devices according to an embodiment. The method comprises S301 and S302. The method illustrated in fig. 3 may be performed by a network device. The network device may be a router, a network switch, a firewall, a load balancer, a base station, a Packet Transport Network (PTN) device, a Serving GPRS Support Node (SGSN), a Gateway GPRS Support Node (GGSN), a Radio Network Controller (RNC), or a Base Station Controller (BSC). The network device may include a slave clock. The slave clock may be a synchronous Ethernet device slave clock. With respect to synchronous Ethernet device slave clocks, reference may be made to Recommendation ITU-T G.8262/Y.1362 (2007). It will be appreciated that operations performed by the network device involving the clock signal are actually performed by the slave clock. For example, the slave clock may process the received SSM to determine the clock source to be tracked. In addition, after determining the clock source to be tracked, the slave clock may calibrate the frequency of the slave clock according to the timing information from the clock source. Specifically, calibrating the frequency of the slave clock may include generating a periodic output signal by a phase-locked loop of the slave clock according to the timing information, wherein the phase of the periodic output signal is the same as the phase of a periodic input signal included in the timing information. The periodic output signal is an output signal of the phase locked loop. The periodic input signal is an input signal of the phase locked loop.

Fig. 4 is a schematic structural diagram of a specific implementation manner of the network device. Referring to fig. 4, a network device 400 may include a control board and a forwarding board. The control board may be coupled to the forwarding board through a control channel. The receiver and the transmitter may be integrated or separate. The control board includes a receiver, a transmitter, a central processing unit, a memory, and a phase locked loop. The receiver may receive signals from the transponder board via the control channel. The transmitter may transmit information to the forwarding board via the control channel. The receiver is coupled with the central processing unit. The receiver is coupled to the phase locked loop. The phase locked loop is coupled to the transmitter. The central processing unit is coupled with the transmitter. The central processing unit is coupled with the memory. The memory has stored therein a computer program. The central processing unit may execute the computer program. The forwarding board comprises a transceiver 1, a transceiver 2, a network processor and a transceiver 3. A transceiver 1 is coupled to the network processor. A transceiver 2 is coupled to the network processor. The network processor is coupled to the transceiver 3. The transceiver 1 comprises a physical layer device. The transceiver 2 comprises a physical layer device. The transceiver 3 comprises a physical layer device.

For example, the router 13 shown in fig. 2 may specifically be the network device shown in fig. 4. Port 1 of router 13 may specifically be located on transceiver 1. Port 2 of router 13 may specifically be located on transceiver 2. The port 3 of the router 13 may specifically be located on the transceiver 3.

S301, the network equipment receives the first SSM and the second SSM.

The first SSM carries a first SSM code for indicating a quality level of a first clock source and a first eSSM code for indicating a quality level of the first clock source. The second SSM carries a second SSM code for indicating a quality level of a second clock source and a second eSSM code for indicating a quality level of the second clock source.

S302, when the value of the first SSM code is smaller than that of the second SSM code, the network device calibrates the frequency of the network device according to the timing signal of the first clock source.

For example, the network device may include a synchronous ethernet device slave clock. The network device may receive the first and second SSMs via different ports, respectively. Hereinafter, a device that transmits the first SSM is referred to as a first device, and a device that transmits the second SSM is referred to as a second device. The first device may be a device supporting g.8264/y.1364 and g.8264/y.1364 interpretation 2. The first clock source is a device tracked by the first device when the first device tracks other devices. The first clock source is the first device when the first device is a free-running clock. The first device supports g.8264/y.1364, so the first SSM sent by the first device carries the first SSM code. The first device supports g.8264/y.1364 argument 2, so that the first SSM sent by the first device carries a first eSSM code.

The second device may be a device supporting g.8264/y.1364 and g.8264/y.1364 interpretation 2. The second clock source is a device tracked by the second device when the second device tracks other devices. The second clock source is the second device when the second device is a free-running clock. The second device supports g.8264/y.1364, so the second SSM sent by the second device carries the second SSM code. The second device supports g.8264/y.1364 attribute 2, so that the second SSM sent by the second device carries a second eSSM code for indicating the quality level of the second clock source.

For example, the network device receives the first and second SSMs via an Ethernet Synchronization Messaging Channel (ESMC). As regards ESMC, reference may be made to the description of ESMC given in G.8264/Y.1364.

The first SSM or the second SSM may be an ESMC Protocol Data Unit (PDU). Regarding the format of ESMC PDU, refer to Table 11-3 in G.8264/Y.1364. The ESMC PDU may contain an Extended QL TLV as well as a QL TLV. The QL TLV may contain SSM codes. That is, the first SSM code or the second SSM code is carried in a QL TLV. For the format of QL TLV, please refer to Table 11-4 in G.8264/Y.1364. The Extended QL TLV may contain an Enhanced SSM code (Enhanced SSM code). That is, the first eSSM code or the second eSSM code is carried in an Extended QL TLV. For the format of Extended QL TLV, please refer to Table 11-4.2 in G.8264/Y.1364 attribute 2.

The value of the first SSM code is less than the value of the second SSM code. That is, if the network device only supports g.8264/y.1364 and does not support g.8264/y.1364 attribute 2, the network device determines that the quality level of the first clock source is higher than that of the second clock source based on the first SSM code having a value smaller than that of the second SSM code.

The method shown in fig. 3 is illustrated below with reference to fig. 2 and 4.

The network device to which the method of fig. 3 relates may be network device 400. The network device 400 shown in fig. 4 may be the router 13 in fig. 2. The first clock source is router 12. The second clock source is router 15. Port 1 and port 2 are located on transceiver 1 and transceiver 2, respectively. The first SSM may be an ESMC PDU sent by router 12 that router 13 receives via port 1. The second SSM may be an ESMC PDU sent by router 15 that router 13 receives via port 2. The router 15 supports G.8264/Y.1364 and G.8264/Y.1364 attribute 2. Router 15 is a free running clock and the SSM code contained in the ESMC PDU sent by router 15 indicates the quality level of the second clock source (router 15). For example, the SSM code has a value of 0 xB. The quality class of the router 15 is QL-EEC 1. The router 15 does not support g.8264/y.1364 attribute 2, and the value of the eSSM code included in the SSM sent by the router 15 is equal to 0 xFF. The router 12 supports G.8264/Y.1364 and G.8264/Y.1364 attribute 2. When router 12 is not tracking router 11, router 12 is a free running clock. The inclusion of the SSM code in the ESMC PDU sent by router 12 indicates the quality level of the first clock source (router 12). The SSM code has a value of 0 mutex 4 indicating a quality level of QL-SSU-a for the router 12. The router 12 supports g.8264/y.1364 attribute 2, and the ESMC PDU sent by the router 12 contains an eSSM code with a value of 0 xFF.

After the transceiver 1 receives the ethernet frame containing the ESMC PDU sent by the router 12, the network processor may parse the ethernet frame to determine that the ethernet frame contains the ESMC PDU. The network processor sends the ESMC PDU to the control board over the control channel. And after the receiver of the control board receives the ESMC PDU, the ESMC PDU is sent to the central processing unit. The central processing unit determines that the quality level information carried in the ESMC PDU is quality level information for the router 12. The central processing unit may determine that port 1 corresponding to transceiver 1 is the port for receiving the timing information transmitted by router 12.

After the transceiver 1 receives the ethernet frame containing the ESMC PDU sent by the router 15, the network processor may parse the ethernet frame, thereby determining that the ethernet network contains the ESMC PDU. The network processor sends the ESMC PDU to the control board over the control channel. And after the receiver of the control board receives the ESMC PDU, the ESMC PDU is sent to the central processing unit. For the ESMC PDU, the central processing unit may determine that the quality level information carried in the ESMC PDU is the quality level information of the router 15. The central processing unit may determine that port 2 corresponding to transceiver 2 is a port for receiving timing information transmitted by router 15.

In addition, the memory stores computer programs or code for executing G.8264/Y.1364 and G.8264/Y.1364 interpretation 2. The central processing unit may perform the following operations by executing the computer program or code. The central processing unit analyzes the ESMC PDU sent by the router 12 and the router 15, obtains an SSM code and an eSSM code indicating the quality level of the router 12, and obtains an SSM code and an eSSM code indicating the quality level of the router 15. By comparing the value of the SSM code indicating the quality class of the router 12 and the value of the SSM code indicating the quality class of the router 15, it is determined that the value of the SSM code indicating the quality class of the router 12 is smaller than the value of the SSM code indicating the quality class of the router 15. The quality level of router 12 is determined to be higher than router 15 based on the value of the SSM code indicating the quality level of router 12 being less than the value of the SSM code indicating the quality level of router 15. The central processing unit configures the transceiver 1 so that the port 1 transmits the received timing information of the router 12 to the control board through the control channel.

In one possible implementation, the first clock source is router 11. The second clock source is router 14. The first SSM may be an ESMC PDU sent by router 12 that router 13 receives via port 1. The second SSM may be an ESMC PDU sent by router 15 that router 13 receives via port 2. The router 15 supports G.8264/Y.1364 and G.8264/Y.1364 attribute 2. Router 15 keeps track of the time and frequency of router 14. The SSM code contained in the ESMC PDU sent by router 15 indicates the quality level of the second clock source (router 14). For example, the SSM code has a value of 0x 4. The quality class of the router 14 is QL-SSU-a. The router 15 supports g.8264/y.1364 attribute 2, and the value of the eSSM code included in the SSM sent by the router 15 is equal to 0 xFF. The router 12 supports G.8264/Y.1364 and G.8264/Y.1364 attribute 2. Router 12 keeps track of the time and frequency of router 11. The inclusion of the SSM code in the ESMC PDU sent by router 12 indicates the quality level of the first clock source (router 11). The SSM code has a value of 0x2 indicating a quality level of QL-PRC for router 11. Since the router 12 supports g.8264/y.1364 attribute 2, the value of the eSSM code included in the ESMC PDU sent by the router 12 is 0 xFF.

After the transceiver 1 receives the ethernet frame containing the ESMC PDU sent by the router 12, the network processor may parse the ethernet frame, thereby determining that the ethernet network contains the ESMC PDU. The network processor sends the ESMC PDU to the control board over the control channel. And after the receiver of the control board receives the ESMC PDU, the ESMC PDU is sent to the central processing unit. The central processing unit determines that the quality class information carried in the ESMC PDU is the quality class information of the router 11. The central processing unit may determine that port 1 corresponding to transceiver 1 is a port for receiving the timing information transmitted by router 11.

After the transceiver 1 receives the ethernet frame containing the ESMC PDU sent by the router 15, the network processor may parse the ethernet frame to determine that the ethernet network contains the ESMC PDU. The network processor sends the ESMC PDU to the control board over the control channel. And after the receiver of the control board receives the ESMC PDU, the ESMC PDU is sent to the central processing unit. For the ESMC PDU, the central processing unit may determine that the quality level information carried in the ESMC PDU is the quality level information of the router 14. The central processing unit may determine that port 2 corresponding to transceiver 2 is the port for receiving the timing information transmitted by router 14.

In addition, the memory stores computer programs for executing G.8264/Y.1364 and G.8264/Y.1364 interpretation 2. The central processing unit may perform the following operations by executing the computer program. The central processing unit parses the ESMC PDUs transmitted by router 12 and router 15, obtains the SSM code and the eSSM code indicating the quality class of router 11, and obtains the SSM code indicating the quality class of router 14. By comparing the value of the SSM code indicating the quality class of the router 11 and the value of the SSM code indicating the quality class of the router 14, it is determined that the value of the SSM code indicating the quality class of the router 11 is smaller than the value of the SSM code indicating the quality class of the router 14. It is determined that the quality level of router 11 is higher than router 14 based on the value of the SSM code indicating the quality level of router 11 being smaller than the value of the SSM code indicating the quality level of router 14. The central processing unit configures the transceiver 1 so that the port 1 transmits the received timing information of the router 11 to the control board through the control channel.

Specifically, the transceiver 1 includes a physical layer device therein. The physical layer device includes a circuit for performing clock recovery (clock recovery). The transceiver 1 receives the data stream from the router 12 and the circuit performing clock recovery is able to obtain timing information from the data stream. The timing information may be, for example, a physical timing flow (physical timing flow). For physical timing flow, see the description of G.8264/Y.1364. The timing information is a periodic signal. Since the periodic signal is to be input to the phase locked loop, the periodic signal is referred to herein as a periodic input signal. The transceiver 1 transmits timing information to the control board through the control channel. Specifically, the receiver sends timing information to the phase locked loop. And the phase-locked loop generates a periodic output signal according to the timing information, wherein the phase of the periodic output signal is the same as that of the periodic input signal contained in the timing information. The control board sends periodic output signals to the transceiver 3 via a transmitter. The periodic output signal may be, for example, T0. For T0, reference may be made to Figure A.2 in G.8264/Y.1364 for the description of T0. The periodic output signal is the reference clock signal of the transceiver 3. Specifically, the physical layer device in the transceiver 3 processes the ethernet frames provided by the network processor according to the reference clock signal. For example, the physical layer device in the transceiver 3 may perform physical layer encoding, scrambling, virtual channel distribution, and alignment word insertion. After processing the ethernet frame, the physical layer device in the transceiver 3 can send the data stream to the base station 16 via the port 3.

Optionally, the method shown in fig. 3 may further include:

when the value of the first SSM code is equal to the value of the second SSM code and the value of the first esm code is less than the value of the second esm code, the network device calibrates the frequency of the network device according to the timing signal of the first clock source.

For example, assuming that the quality level of the first clock source is QL-PRTC and the quality level of the second clock source is QL-PRC, the value of the first SSM code is equal to 0x2 and the value of the second SSM code is equal to 0x 2. The first eSSM code has a value equal to 0x20, and the second SSM code has a value equal to 0 xFF. That is, when the value of the first SSM code is equal to the value of the second SSM code, it is determined that the quality level of the first clock source is equal to the quality level of the second clock source only according to the value of the SSM code. And in fact, the quality level of the first clock source is higher than the quality level of the second clock source.

Optionally, the method shown in fig. 3 may further include:

when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, and the Number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the first SSM is smaller than the value of the Number of cascaded EECs from the nearest adjacent SSU/PRC in the second SSM, the network device calibrates the frequency of the network device according to the timing signal of the first clock source.

Optionally, the method shown in fig. 3 may further include: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous provisioning unit/master reference clock in the first SSM is equal to the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous provisioning unit/master reference clock in the first SSM, and the value of Number of cascaded EECs from the nearest ethernet SSU/PRC in the first SSM is less than the value of Number of cascaded EECs from the nearest ethernet SSU/PRC in the second SSM, the network device calibrates the frequency of the network device according to the timing signal of the first clock source.

Optionally, in the foregoing technical solution, the method may further include: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM equals the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM, the value of Number of housed eecs from the nearest neighbor SSU/PRC in the first SSM is equal to the value of the Number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the second SSM, and the value of the synchronous ethernet Master ID in the first SSM is smaller than the value of the synchronous ethernet Master ID in the second SSM, the network device calibrates a frequency of the network device according to the timing signal of the first clock source.

For example, in the above technical solution, the network device is a synchronous Ethernet device Clock (synchronous Ethernet device Clock) or a synchronous optical transport network device Clock.

Fig. 5 is a schematic structural diagram of a network device 500 provided in the present application. Referring to fig. 5, the network device includes: a receiving unit 501 and a calibration unit 502. For example, the network device 500 may specifically be the network device shown in fig. 4. With regard to the specific implementation of the network device 500, reference may be made to the description in the embodiment corresponding to fig. 4. Network device 500 may perform the method illustrated in fig. 3. With regard to the specific implementation of the network device 500, reference may be made to the description in the corresponding embodiment of fig. 3.

The receiving unit 501 is configured to receive a first SSM and a second SSM.

The first SSM carries a first SSM code used for indicating the quality grade of a first clock source and a first eSSM code used for indicating the quality grade of the first clock source, and the second SSM carries a second SSM code used for indicating the quality grade of a second clock source and a second eSSM code used for indicating the quality grade of the second clock source.

For example, the receiving unit 501 may be configured to perform S301. Regarding a specific implementation manner of the receiving unit 501, reference may be made to the description of S301 in the embodiment shown in fig. 3.

For example, the receiving unit 501 may specifically include the transceiver 1 and the transceiver 2 in fig. 4. For example, network device 500 may be router 13 in fig. 2. Router 13 may receive the first SSM sent by router 12 via port 1 and the second SSM sent by router 15 via port 2.

The calibration unit 502 is configured to calibrate the frequency of the network device according to the timing signal of the first clock source when the value of the first SSM code is smaller than the value of the second SSM code.

For example, the calibration unit 502 may be configured to perform S302. With regard to a specific implementation manner of the calibration unit 502, reference may be made to the description of S302 in the embodiment shown in fig. 3.

For example, the calibration unit 502 may include the phase-locked loop of fig. 4. The phase locked loop may receive the timing signal of the first clock source via the transceiver 1. Calibrating the frequency of the network device according to the timing signal of the first clock source may specifically be generating a system clock signal according to the timing signal of the first clock source. The frequency of the system clock signal is equal to the frequency of the timing signal of the first clock source. The system clock signal may drive components in the network device. For example, the component in the network device may be an interface board or a physical layer device. The operation of determining that the value of the first SSM code is less than the value of the second SSM code may be performed by the central processing unit in fig. 4.

Optionally, the calibration unit 502 is further configured to:

calibrating a frequency of the network device according to a timing signal of the first clock source when a value of the first SSM code is equal to a value of the second SSM code and the value of the first eSSM code is less than the value of the second eSSM code.

Optionally, the calibration unit 502 is further configured to:

when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, and the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the first SSM is smaller than the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the second SSM, calibrating the frequency of the network device according to the timing signal of the first clock source.

Optionally, the calibration unit 502 is further configured to:

when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM equals the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/master reference clock in the first SSM, and the value of the Number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock SSU/PRC in the first SSM is smaller than the value of the Number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/master reference clock in the second SSM, the frequency of the network device is calibrated according to the timing signal of the first clock source.

Optionally, the calibration unit 502 is further configured to: when the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the Number of cascaded synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the first SSM, the value of the Number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the Number of cascaded enhanced synchronous ethernet clocks from the nearest synchronous supply unit/Master reference clock in the second SSM, and the value of the synchronous ethernet Master ID in the first SSM is less than the value of the synchronous ethernet Master ID in the second SSM, and calibrating the frequency of the network equipment according to the timing signal of the first clock source.

Optionally, the network device 500 is a synchronous ethernet device clock or a synchronous optical transport network device clock.

Fig. 6 is a schematic structural diagram of a network device provided in the present application. The network device 600 includes a transceiver 601, a processor 602, and a memory 603. The transceiver 601 is coupled to a processor 602, and the processor 602 is coupled to a memory 603. The memory 603 stores a computer program.

The transceiver 601 is configured to receive a first SSM and a second SSM.

The computer program in memory 603, when executed by processor 602 or other device or other component of the network device, causes processor 602 to: when the value of the first SSM code is less than the value of the second SSM code, the frequency of the network device 600 is calibrated according to the timing signal of the first clock source.

Network device 600 may be, for example, network device 500 shown in fig. 5. Network device 600 may perform the method illustrated in fig. 3. Network device 600 may be network device 400 shown in fig. 4. The network device 600 may be the router 13 shown in fig. 2.

For example, the transceiver 601 may be used to perform S301. Regarding the specific implementation manner of the transceiver 601, reference may be made to the description of S301 in the embodiment shown in fig. 3. For example, transceiver 601 may include transceiver 1 and transceiver 2 in network device 400 shown in fig. 4.

For example, the processor 602 may be configured to perform S302. Regarding the specific implementation manner of the processor 602, reference may be made to the description of S302 in the embodiment shown in fig. 3. For example, processor 602 may include the central processing unit and phase locked loop of fig. 4. Wherein the central processing unit is configured to determine that the value of the first SSM code is less than the value of the second SSM code. The phase locked loop is used to calibrate the frequency of the network device 600. The central processor unit may also be configured to determine that the first clock source is a clock source that needs to be tracked by the network device 600. The memory 603 may include the memory of fig. 4.

Fig. 7 is a schematic structural diagram of a system provided in the present application. Referring to fig. 7, a system 700 includes a network device 701, a first clock source 702, and a second clock source 703. Network device 701 may be network device 600 shown in fig. 6, network device 500 shown in fig. 5, or network device 400 shown in fig. 4. Network device 701 may perform the method illustrated in fig. 3. For a specific implementation of the network device 701, reference may be made to descriptions in embodiments corresponding to fig. 3, fig. 4, fig. 5, and fig. 6, which are not described herein again.

In addition, the system 700 shown in fig. 7 may be applied to the network shown in fig. 2. For example, first clock source 702 may be router 11. Second clock source 703 may be router 15. Network device 701 may be router 13. Router 11 is the clock source of router 12. Router 12 keeps track of the frequency of router 11. Router 15 does not have a trace router 14. Router 15 is a free running clock. For a specific implementation of the system 700 shown in fig. 7 applied to the network shown in fig. 2, please refer to the description in the corresponding embodiment of fig. 2.

A computer program product is provided. The computer program product is stored on a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer program, when executed by a processor or other device or component, causes the processor to perform the method of fig. 3.

It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

Those of ordinary skill in the art will appreciate that the various illustrative elements or steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or a combination of software and electronic hardware depends upon the particular application and design constraints imposed on the technical solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the unit is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit may be implemented in hardware, or in a combination of software and electronic hardware.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a processor or a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, etc. that can store program codes.

Claims

1. A method for synchronizing network devices, comprising:

receiving, by a network device, a first Synchronization Status Message (SSM) and a second SSM, where the first SSM carries a first SSM code for indicating a quality level of a first clock source and a first enhanced synchronization status message (eSSM) code for indicating a quality level of the first clock source, and the second SSM carries a second SSM code for indicating a quality level of a second clock source and a second eSSM code for indicating a quality level of the second clock source, and the network device supports processing of the eSSM codes;

in response to the network device determining that the value of the first SSM code is less than the value of the second SSM code, the network device determining that the first clock source is a clock source of the network device.

2. The method of claim 1, further comprising:

responsive to the network device determining that the value of the first SSM code is equal to the value of the second SSM code and that the value of the first eSSM code is less than the value of the second eSSM code, the network device determining that the first clock source is a clock source of the network device.

3. The method of claim 1 or 2, further comprising:

responsive to the network device determining that the value of the first SSM code is equal to the value of the second SSM code, the value of the first esm code is equal to the value of the second esm code, and the value of the number of cascaded synchronous ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is less than the value of the number of cascaded synchronous ethernet device clocks in the second SSM from the nearest synchronous supply unit/master reference clock, the network device determining that the first clock source is the clock source of the network device.

4. The method of any of claims 1 to 3, further comprising:

in response to the network device determining that the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is equal to the value of the number of cascaded synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock, and the value of the number of cascaded enhanced synchronous ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is less than the value of the number of cascaded enhanced synchronous ethernet device clocks in the second SSM from the nearest synchronous supply unit/master reference clock, the network device determining that the first clock source is the clock source of the network device.

5. The method of any of claims 1 to 4, further comprising:

in response to the network device determining that the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the first SSM, the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the second SSM, and the value of synchronous ethernet Master identity (SyncE Master ID) in the first SSM is less than the value of SyncE Master ID in the second SSM, the network device determines that the first clock source is a clock source of the network device.

6. A network device, comprising:

a receiving unit, configured to receive a first Synchronization Status Message (SSM) and a second SSM, where the first SSM carries a first SSM code used for indicating a quality level of a first clock source and a first enhanced synchronization status message (eSSM) code used for indicating a quality level of the first clock source, and the second SSM carries a second SSM code used for indicating a quality level of a second clock source and a second eSSM code used for indicating a quality level of the second clock source, and the network device supports processing of the eSSM codes;

a calibration unit, configured to determine that the first clock source is the clock source of the network device in response to determining that the value of the first SSM code is smaller than the value of the second SSM code.

7. The network device of claim 6, wherein the calibration unit is further configured to:

in response to determining that the value of the first SSM code is equal to the value of the second SSM code and the value of the first eSSM code is less than the value of the second eSSM code, determining that the first clock source is a clock source of the network device.

8. The network device of claim 6 or 7, wherein the calibration unit is further configured to:

determining that the first clock source is a clock source for the network device in response to determining that the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, and the value of the number of cascaded synchronous Ethernet device clocks in the first SSM from the nearest synchronous supply unit/master reference clock is less than the value of the number of cascaded synchronous Ethernet device clocks in the second SSM from the nearest synchronous supply unit/master reference clock.

9. The network device of any of claims 6 to 8, wherein the calibration unit is further configured to:

in response to determining that the value of the first SSM code is equal to the value of the second SSM code, the value of the first esm code is equal to the value of the second esm code, the value of the number of cascaded synchronous ethernet clocks in the first SSM from the nearest synchronous supply unit/master reference clock is equal to the value of the number of cascaded synchronous ethernet clocks in the first SSM from the nearest synchronous supply unit/master reference clock, and the value of the number of cascaded enhanced synchronous ethernet clocks in the first SSM from the nearest synchronous supply unit/master reference clock is less than the value of the number of cascaded enhanced synchronous ethernet clocks in the second SSM from the nearest synchronous supply unit/master reference clock, determining that the first clock source is the clock source of the network device.

10. The network device of any of claims 6 to 9, wherein the calibration unit is further configured to:

in response to determining that the value of the first SSM code is equal to the value of the second SSM code, the value of the first eSSM code is equal to the value of the second eSSM code, the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the number of cascaded synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the first SSM, the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the first SSM is equal to the value of the number of cascaded enhanced synchronous ethernet device clocks from the nearest synchronous supply unit/Master reference clock in the second SSM, and the value of synchronous ethernet Master identity (sync Master ID) in the first SSM is less than the value of sync Master ID in the second SSM, determining that the first clock source is a clock source of the network device.

11. A network device comprising a transceiver, a processor, and a memory, the transceiver coupled with the processor, the processor coupled with the memory, the memory storing a computer program;

the transceiver is configured to receive a first Synchronization Status Message (SSM) and a second SSM, where the first SSM carries a first SSM code indicating a quality level of a first clock source and a first enhanced synchronization status message (eSSM) code indicating a quality level of the first clock source, and the second SSM carries a second SSM code indicating a quality level of a second clock source and a second eSSM code indicating a quality level of the second clock source, and the network device supports processing of the eSSM codes;

the computer program in the memory, when executed, causes the processor to: in response to determining that the value of the first SSM code is less than the value of the second SSM code, determining that the first clock source is a clock source of the network device.

12. The network device of claim 11, wherein the computer program in the memory, when executed, further causes the processor to:

13. The network device of claim 11 or 12, wherein the computer program in the memory, when executed, further causes the processor to:

14. The network device of any of claims 11 to 13, wherein the computer program in the memory, when executed, further causes the processor to:

15. The network device of any of claims 11 to 14, wherein the computer program in the memory, when executed, further causes the processor to:

16. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program which, when executed, causes a computer or processor to perform the method of any of claims 1 to 5.