CN110808168B - Dry-type high-voltage low-inductance coaxial peaking capacitor and manufacturing process thereof - Google Patents
Dry-type high-voltage low-inductance coaxial peaking capacitor and manufacturing process thereof Download PDFInfo
- Publication number
- CN110808168B CN110808168B CN201911074168.6A CN201911074168A CN110808168B CN 110808168 B CN110808168 B CN 110808168B CN 201911074168 A CN201911074168 A CN 201911074168A CN 110808168 B CN110808168 B CN 110808168B
- Authority
- CN
- China
- Prior art keywords
- electrode
- metal cylinder
- peaking capacitor
- opening
- boss
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 140
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 195
- 239000002184 metal Substances 0.000 claims abstract description 195
- 239000007787 solid Substances 0.000 claims abstract description 6
- 238000004804 winding Methods 0.000 claims description 28
- 239000011230 binding agent Substances 0.000 claims description 18
- 230000004323 axial length Effects 0.000 claims description 12
- 238000009413 insulation Methods 0.000 claims description 6
- 229910001094 6061 aluminium alloy Inorganic materials 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 238000009434 installation Methods 0.000 claims 1
- 210000001503 joint Anatomy 0.000 claims 1
- 238000005498 polishing Methods 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 63
- 230000009286 beneficial effect Effects 0.000 description 4
- 230000006835 compression Effects 0.000 description 4
- 238000007906 compression Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000009422 external insulation Methods 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/38—Multiple capacitors, i.e. structural combinations of fixed capacitors
- H01G4/385—Single unit multiple capacitors, e.g. dual capacitor in one coil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
- H01G4/008—Selection of materials
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
The invention provides a dry-type high-voltage low-inductance coaxial peaking capacitor and a manufacturing process thereof. The peaking capacitor comprises a peaking capacitor high-voltage electrode, an opening metal cylinder electrode and a peaking capacitor ground electrode which are coaxially arranged from inside to outside in sequence, wherein the number of the opening metal cylinder electrodes is multiple; a plurality of layers of organic films are filled between two adjacent electrodes to be used as solid media of the capacitor; the outer surface of the high-voltage electrode of the peaking capacitor and the inner and outer surfaces of the electrode of the opening metal cylinder are provided with annular electrode bosses which are used as effective electrodes of the capacitor; the two adjacent electrodes and the multilayer organic dielectric film filled between the two adjacent electrodes form a cylindrical capacitor, the two adjacent cylindrical capacitors share an open metal cylindrical electrode, and the peaking capacitor is actually a low-inductance capacitor formed by sequentially connecting a plurality of coaxial cylindrical capacitors in series without leads; the thickness of the electrode is designed to be millimeter magnitude, so that the surface electric field is greatly reduced, and the withstand voltage is improved; the peaking capacitor has a simple structure and high withstand voltage, and meets the requirements of low inductance and high voltage.
Description
Technical Field
The invention belongs to the technical field of pulse power, and particularly relates to a dry-type high-voltage low-inductance coaxial peaking capacitor for a fast-leading-edge electromagnetic pulse simulator and a manufacturing process thereof.
Background
In an electromagnetic pulse simulation device, in order to meet the requirements of relevant IEC standards or national standards on electromagnetic pulse waveforms and realize output of nanosecond leading edge double-exponential pulse waveforms, a multistage pulse compression technology is generally adopted to perform pulse compression on waveforms generated by a primary pulse source.
The IEC1000-2-9 standard stipulates that the leading edge time of a nuclear electromagnetic pulse waveform is 2.3 +/-0.5 ns, the full width at half maximum time is 23 +/-5 ns, and to generate such a fast leading edge pulse waveform, an MV-grade electromagnetic pulse simulator generally adopts a two-stage pulse compression circuit, namely, a MARX generator generates a primary pulse to charge a storage capacitor for hundreds of ns, then the storage capacitor charges a peaking capacitor through a storage switch for tens of ns, the peaking capacitor is a low-inductance capacitor and is matched with an output switch to generate the needed fast leading edge pulse waveform, and the peaking capacitor is used as one of key devices of the electromagnetic pulse simulator and plays a vital role in the effect of pulse compression.
The conventional pulse capacitor is generally insulated by adopting oiled paper, the electrode material of an element is aluminum foil with the thickness of micron order, the element is connected in series and parallel through an insert to form the pulse capacitor, the highest direct current withstand voltage is generally 100kV, the inductance is dozens of nanohenries, a plurality of pulse capacitors are connected in series and can bear the pulse voltage exceeding MV, and a plurality of series components are connected in parallel to form the pulse peaking capacitor[1]The peaking capacitor inductance is several hundred nanohenries. Because the requirement on the output front edge pulse waveform of the electromagnetic pulse simulator is faster and faster, and the requirement on the inductance of the peaking capacitor is higher, the peaking capacitor needs to meet higher voltage and lower inductance, and therefore the peaking capacitor which is good in insulating property and can meet the use requirement of high voltage and low inductance is urgently needed at present.
Disclosure of Invention
The invention provides a dry-type high-voltage low-inductance coaxial peaking capacitor and a manufacturing process thereof, aiming at solving the technical problem that the inductance and voltage of the existing peaking capacitor cannot meet the high requirement of an electromagnetic pulse simulator on the output leading edge pulse waveform.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
a dry-type high-voltage low-inductance coaxial peaking capacitor is characterized in that: the device comprises a peaking capacitor high-voltage electrode, a plurality of open metal cylinder electrodes and a peaking capacitor ground electrode which are coaxially arranged from inside to outside in sequence, wherein a dielectric thin film cylinder is arranged between every two adjacent electrodes; the two adjacent electrodes and the organic dielectric film layer cylinder filled between the two adjacent electrodes form a cylindrical capacitor, the two adjacent cylindrical capacitors share one open metal cylinder electrode, the peaking capacitor is formed by connecting a plurality of cylindrical capacitors in series, and the inductance is minimum because no series lead is arranged;
the dielectric film layer cylinder is a solid cylinder formed by tightly winding an organic insulating dielectric film, two ends of each dielectric film layer cylinder exceed two ends of two opening metal cylinder electrodes adjacent to the dielectric film layer cylinder as far as possible to improve the flashover distance along the surface, and the judgment basis is that the dielectric film cylinder does not overlap the end parts of the opening metal cylinder electrodes;
the two ends of the outer surface of the high-voltage electrode of the peaking capacitor are both cut into first annular steps, a first annular electrode boss is formed in the middle of the first annular step, and the boss is an effective electrode of the cylindrical capacitor;
the two ends of the inner surface of each opening metal cylinder electrode are respectively cut with an inner annular step, the middle part of the inner surface of each opening metal cylinder electrode is provided with an inner annular electrode boss, the two ends of the outer surface of each opening metal cylinder electrode are respectively cut with an outer annular step, the middle part of the outer surface of each opening metal cylinder electrode is provided with an outer annular electrode boss, the end part of the inner surface of each opening metal cylinder electrode and the end part of the outer surface of each opening metal cylinder electrode are respectively provided with a circular chamfer, and the electrode surface of each opening metal cylinder electrode is polished and is axially cut with a gap of 2-3 mm;
the plurality of open metal cylinder electrodes are a first open metal cylinder electrode, a second open metal cylinder electrode … … and an Nth open metal cylinder electrode from inside to outside in sequence, wherein N is a positive integer greater than or equal to 2;
aligning two ends of a first annular electrode boss on the outer surface of a peaking capacitor high-voltage electrode with an inner annular electrode boss on the inner surface of a first opening metal cylinder electrode, aligning two ends of an outer annular electrode boss on the outer surface of the first opening metal cylinder electrode with two ends of an inner annular electrode boss on the inner surface of a second opening metal cylinder electrode, aligning two ends of an outer annular electrode boss on the outer surface of the second opening metal cylinder electrode with two ends of an inner annular electrode boss on the inner surface of a third opening metal cylinder electrode, and repeating the steps until two ends of an outer annular electrode boss on the outer surface of an N-1 opening metal cylinder electrode and an inner annular electrode boss on the inner surface of an N-1 opening metal cylinder electrode are aligned;
the peaking capacitor ground electrode is formed by combining two semicircular metal cylinders, and a gap exists in the axial direction after the two semicircular metal cylinders are butted;
further, the axial lengths of the plurality of opening metal cylinder electrodes are reduced from inside to outside in sequence, and the axial length of the outer annular electrode boss of each opening metal cylinder electrode is smaller than that of the inner annular electrode boss.
Furthermore, the thicknesses of the plurality of open metal cylinder electrodes are all equal;
the thicknesses of all the medium film layer cylinders are equal;
all the annular electrode bosses are equal in height.
A manufacturing process of a dry-type low-inductance coaxial peaking capacitor is characterized by comprising the following steps:
1) winding a dielectric film layer cylinder on the outer surface of a high-voltage electrode of a peaking capacitor
Winding a plurality of layers of organic insulating medium films on the peaking capacitor high-voltage electrode, and forming a medium film layer cylinder on the outer surface of the peaking capacitor high-voltage electrode;
2) tightly hooped first opening metal cylinder electrode
2.1) tightly hooping the first open metal cylinder electrode on the dielectric film cylinder by using a binder/belt, so that a first annular electrode boss on the outer surface of the peaking capacitor high-voltage electrode is aligned with two ends of an inner annular electrode boss on the inner surface of the first open metal cylinder electrode;
2.2) winding a fastening wire/belt on an outer annular step of the outer surface of the first open metal cylinder electrode, and tightly hooping the first open metal cylinder electrode on the dielectric film layer cylinder;
2.3) judging whether a gap exists at the opening of the tightly-hooped first opening metal cylinder electrode, and if so, unfastening the binder/belt;
if no gap exists, unfastening the fastening wire/belt and the binder/belt, disassembling the first open metal cylinder electrode, properly increasing the number of winding layers of the organic insulating medium film, and executing the step 1) and the steps 2.1-2.2) until a gap exists at the position of the tightly hooped first open metal cylinder electrode opening, so as to finish the hooping of the first open metal cylinder electrode;
3) tightly hooping the second to Nth opening metal cylinder electrodes
3.1) winding a plurality of layers of organic insulating medium films on the tightly hooped first open metal cylinder electrode to form a medium film layer cylinder on the outer surface of the first open metal cylinder electrode;
3.2) sleeving the second open metal cylinder electrode on the dielectric film cylinder by using a binder/belt, so that the two ends of an outer annular electrode boss on the outer surface of the first open metal cylinder electrode are aligned with the two ends of an inner annular electrode boss on the inner surface of the second open metal cylinder electrode;
3.3) winding a fastening wire/belt on an outer annular step of the outer surface of the second open metal cylinder electrode, and tightly hooping the second open metal cylinder electrode on the dielectric film layer cylinder;
3.4) judging whether a gap exists at the opening of the tightly hooped second open metal cylinder electrode, and if so, unfastening the binder/belt;
if no gap exists, unfastening the fastening wire/belt and the binder/belt, disassembling the second open metal cylinder electrode, increasing the number of winding layers of the organic insulating medium film, and executing the steps 3.1) -3.3) until a gap exists at the position of the tightly hooped second open metal cylinder electrode opening, so as to finish the hooping of the second open metal cylinder electrode;
repeating the steps 3.1) -3.3) for multiple times to finish the tight hooping from the third opening metal cylinder electrode to the Nth opening metal cylinder electrode;
4) mounting peaking capacitor ground electrodes
4.1) winding a plurality of layers of organic insulating medium films on the tightly hooped Nth opening metal cylinder electrode to form a medium film layer cylinder on the outer surface of the Nth opening metal cylinder electrode;
4.2) tightly hooping the ground electrode of the peaking capacitor on the dielectric film barrel by using a bolt, wherein a gap exists between the tightly hooped ground electrode of the peaking capacitor along the axial direction;
5) removing fastening lines/bands
And removing all fastening wires/belts to finish the manufacture of the capacitor.
Further, the exterior insulation environment of the peaking capacitor is high-pressure SF when in application6A gas.
Compared with the prior art, the invention has the advantages that:
1. the peaking capacitor is formed by sequentially connecting a plurality of coaxial cylindrical capacitors in series, two adjacent capacitors share one open metal cylinder electrode, and the capacitor is connected in series without a lead wire, so that the inductance of the peaking capacitor is minimized, and the higher requirement of an electromagnetic pulse simulator on the output of a leading edge pulse waveform is met.
2. The conventional film capacitor electrode material adopts microsecond-thickness aluminum foil, the withstand voltage of each element is only several kV, tens of elements can be connected in series and parallel to form a pulse capacitor with withstand voltage of hundreds of kV, tens of pulse capacitors can be connected in series and parallel to form a peaking capacitor, and the peaking capacitor is large in size, weight and inductance. The insulation medium of the peaking capacitor is a solid multi-layer machine insulation medium film, the thickness of the electrode is millimeter magnitude, under the condition of the same external insulation, the withstand voltage of a single cylinder capacitor can reach hundreds of kV, the peaking capacitor formed by connecting dozens of coaxial cylinder capacitors in series has simple structure, small volume, weight and inductance, and no oil liquid used by a liquid capacitor is soaked, thereby being beneficial to reducing stray capacitance and accurately designing the capacitance value of the capacitor.
3. The axial lengths of the plurality of open metal cylinder electrodes are sequentially reduced from inside to outside, the end part of the peaking capacitor is in a conical surface shape, the peaking capacitor and a matched connecting structure achieve a common-mode design, the current directions are consistent, and the pulse front edge distortion is favorably reduced.
4. The peaking capacitor has the advantages that the thicknesses of the electrodes of the plurality of open metal cylinders are equal, the thicknesses of the dielectric film layer cylinders are equal, and the radial depths of the annular steps are equal, so that the peaking capacitor is beneficial to simplifying the design and optimizing the insulation design.
5. The metal cylinder electrode can be made of 6061 aluminum alloy in an O state, and the low rigidity of the material is favorable for hooping the electrode on the outer surface of the dielectric film cylinder.
6. The ground electrode of the peaking capacitor consists of two semicircular metal cylinders and is used for ensuring the mechanical strength of the whole peaking capacitor.
Drawings
FIG. 1 is a half sectional view of one embodiment of a dry high voltage low inductance coaxial peaking capacitor of the present invention;
FIG. 2 is an enlarged view of a portion of FIG. 1 at A;
FIG. 3 is a schematic diagram of the structure of an open metal can electrode in one embodiment of a dry high voltage low inductance coaxial peaking capacitor of the present invention;
FIG. 4 is a cross-sectional view of FIG. 3;
FIG. 5 is a schematic diagram of a high voltage electrode structure in the dry high voltage low inductance coaxial peaking capacitor of the present invention;
FIG. 6 is a schematic diagram of the structure of the ground electrode in the dry high-voltage low-inductance coaxial peaking capacitor of the present invention.
Wherein the reference numbers are as follows:
1-peaking capacitor high voltage electrode, 2-peaking capacitor ground electrode, 3-opening metal cylinder electrode, 4-dielectric film cylinder, 5-outer annular step, 6-inner annular step, 7-round chamfer, 8-first annular step, 9-bolt, 10-semicircle metal cylinder.
Detailed Description
The invention is described in further detail below with reference to the figures and specific embodiments.
As shown in fig. 1 and fig. 2, a dry-type high-voltage low-inductance coaxial peaking capacitor comprises a peaking capacitor body, wherein the peaking capacitor body comprises a peaking capacitor high-voltage electrode 1, an opening metal cylinder electrode 3 and a peaking capacitor ground electrode 2 which are coaxially arranged from inside to outside in sequence; (ii) a The number of the open metal cylinder electrodes 3 is multiple, the dielectric film layer cylinders 4 are filled between two adjacent electrodes (between the peaking capacitor high-voltage electrode 1 and the open metal cylinder electrode 3, between the two adjacent open metal cylinder electrodes 3, and between the open metal cylinder electrode 3 and the peaking capacitor ground electrode 2), the two adjacent electrodes and the organic dielectric film layer cylinder 4 clamped between the two adjacent electrodes form a cylindrical capacitor, the two adjacent cylindrical capacitors share one open metal cylinder electrode 3, and the peaking capacitor is formed by connecting dozens of coaxial cylindrical capacitors in series in sequence. The external insulating environment of the peaking capacitor may be high pressure SF6Gas, the inventionThe capacitor is different from a conventional capacitor, and the thickness of the peaking capacitor electrode is at least millimeter magnitude, so that the electric field intensity on the surface of the electrode is favorably reduced, and high voltage is realized.
As shown in fig. 5, the peaking capacitor high voltage electrode 1 is a metal cylinder, and both ends of the outer surface of the metal cylinder are cut with first annular steps 8 to form a section of outer surface thinning layer, and the middle part of the metal cylinder is formed with a first annular electrode boss.
The dielectric film layer cylinder 4 is a solid cylinder formed by tightly winding a plurality of layers of organic insulating dielectric films, two ends of each dielectric film layer cylinder 4 are extended out of two ends of two adjacent open metal cylinder electrodes 3 as far as possible, the internal insulating medium of the peaking capacitor is a solid cylinder formed by tightly winding a plurality of layers of organic insulating dielectric films, and the external insulating medium is high-pressure SF6And gas is used for adjusting the insulating capacity by adjusting the gas pressure. No oil liquid medium used by the liquid capacitor is soaked, which is beneficial to reducing stray capacitance and accurately designing capacitance value.
As shown in fig. 3 and 4, the material of the open metal can electrode 3 can be 6061 aluminum alloy in an O state, and the low rigidity of the material is beneficial to clamping the open metal can electrode 3 on the outer surface of the ground electrode 2 of the peaking capacitor; inner annular steps 6 are cut at two ends of the inner surface of each opening metal cylinder electrode 3, namely, inner surface skiving layers are arranged at two ends, outer annular steps 5 are cut at two ends of the outer surface of each opening metal cylinder electrode 3, namely, outer surface skiving layers are arranged at two ends. The inner surface skiving layer mainly forms an inner surface effective electrode boss with the area consistent with that of a corresponding outer surface effective electrode boss, and the other function of the inner surface skiving layer is to increase the effective sliding flash distance of two ends of the medium film layer cylinder 4; the external surface skiving layer has enough depth and length, and is mainly used for tightly hooping the open metal cylinder electrode 3 outside the dielectric film cylinder 4 by using a fastening wire/belt in the external surface skiving layer section, and in addition, the external surface skiving layer forms an external surface effective electrode boss on the external surface of the electrode; the two sections of inner surface skiving layers enable the inner surface of the opening metal cylinder electrode 3 to form an inner annular electrode boss, the two outer surface skiving layers enable the outer surface of the opening metal cylinder electrode 3 to form an outer annular electrode boss, and the inner annular electrode boss and the outer annular electrode boss are effective electrode parts of the opening metal cylinder electrode 3 and are used for accurately designing capacitor capacitance values.
The plurality of open metal cylinder electrodes are a first open metal cylinder electrode, a second open metal cylinder electrode … … and an Nth open metal cylinder electrode from inside to outside in sequence, wherein N is a positive integer greater than or equal to 2; the first annular electrode boss on the outer surface of the high-voltage electrode of the peaking capacitor is aligned with the two ends of the inner annular electrode boss on the inner surface of the first opening metal cylinder electrode; the outer annular electrode boss on the outer surface of the first opening metal cylinder electrode is aligned with the two ends of the inner annular electrode boss on the inner surface of the second opening metal cylinder electrode; the outer annular electrode boss on the outer surface of the second opening metal cylinder electrode is aligned with the two ends of the inner annular electrode boss on the inner surface of the third opening metal cylinder electrode; and analogizing in sequence until the two ends of the outer annular electrode boss on the outer surface of the electrode of the N-1 th opening metal cylinder are aligned with the two ends of the inner annular electrode boss on the inner surface of the electrode of the N-1 th opening metal cylinder, and the electrode bosses which are positioned on the two sides of the dielectric film layer cylinder 4 and are adjacent to (contacted with) the dielectric film layer cylinder 4 are aligned.
As shown in fig. 4, if the axial length of the open metal cylinder electrode 3 is a, the right side in the figure is the upper end of the open metal cylinder electrode 3, the axial length of the annular step on the inner surface of the upper end of the open metal cylinder electrode 3 is f, the axial length of the annular step on the inner surface of the lower end of the open metal cylinder electrode 3 is h, and the axial length of the annular electrode boss in the inner surface (the effective electrode length of the inner surface of the open metal cylinder electrode 3) is a-f-h; the axial length of the annular step on the outer surface of the upper end of the opening metal cylinder electrode 3 is e, the axial length of the annular step on the outer surface of the lower end of the opening metal cylinder electrode 3 is g, and the axial length of the outer annular electrode boss on the outer surface (the effective electrode length on the outer surface of the opening metal cylinder electrode 3) is a-e-g; in two adjacent open metal cylinder electrodes 3, the outer annular electrode boss on the outer surface of the inner open metal cylinder electrode 3 is strictly aligned with the inner annular electrode boss on the inner surface of the outer open metal cylinder electrode 3. For convenience of design and processing, the thicknesses c of all the open metal cylinder electrodes 3 are equal, and the heights of the effective electrode bosses on the inner surface and the outer surface are equal.
The main function of the skiving layer on the outer surface of the two ends of the opening metal cylinder electrode 3 is to tightly clamp the opening metal cylinder electrode 3 on the outer surface of the wound dielectric film cylinder 4 at the skiving layer by using a wire or a thin strip in the process of winding the capacitor.
The coaxial cylinder capacitor adopts an equal-capacitance design, if the thicknesses c of the opening metal cylinder electrodes 3 and the thicknesses of the dielectric film layer cylinders 4 of all the capacitors are consistent, the areas of the bosses of the effective electrodes of all the electrodes are consistent, the thinning layer on the inner surface of the metal cylinder electrode mainly acts on aligning the bosses, and the other function of the thinning layer is to improve the effective flashover distances at two ends of the dielectric film layer cylinders 4.
Due to SF6The gas is an electronegative insulating medium and is particularly sensitive to field intensity, so that the processing edges and corners of each opening metal cylinder electrode 3 need to be subjected to fine rounding treatment, round chamfers 7 are processed at two ends of the inner surface and two ends of the outer surface of each opening metal cylinder electrode 3, and the surfaces of the round chamfers are processed by a polishing process. And the end part of each inner annular electrode boss and the end part of each outer annular electrode boss are also provided with round chamfers 7.
The peaking capacitor ground electrode 2 is composed of two semicircular metal cylinders 10 as shown in fig. 6 and used for guaranteeing the mechanical strength of the whole peaking capacitor, the two semicircular metal cylinders 10 are fixed through bolts 9, inner surface skiving layers are arranged at two ends of the inner surface of the peaking capacitor ground electrode 2, a section of inner surface effective electrode boss is also formed in the middle of the inner surface of the electrode, and an obvious gap is formed at the opening of the tightly hooped ground electrode and can be seen by naked eyes.
The distances from the upper end of each dielectric film layer cylinder 4 in the peaking capacitor to the upper ends of the adjacent outer opening metal cylinder electrodes 3 are equal; the distances from the lower end of each dielectric film layer cylinder 4 to the lower end of the metal cylinder electrode 3 adjacent to the lower end of the outer opening of each dielectric film layer cylinder are equal, so that the design is simplified, the insulation design is optimized, and the total withstand voltage of the peaking capacitor is improved.
Meanwhile, the invention provides a manufacturing process of the dry-type high-voltage low-inductance coaxial peaking capacitor, which comprises the following steps of:
1) winding a dielectric film layer cylinder 4 on the outer surface of the high-voltage electrode 1 of the peaking capacitor
Winding a plurality of layers of organic insulating medium films on the peaking capacitor high-voltage electrode 1, and forming a medium film layer cylinder 4 on the outer surface of the peaking capacitor high-voltage electrode 1;
2) tightly hooped first opening metal cylinder electrode 3
2.1) using a binder/belt to sleeve the first open metal cylinder electrode 3 on the dielectric film layer cylinder 4, so that a first annular electrode boss on the outer surface of the peaking capacitor high-voltage electrode 1 is aligned with two ends of an inner annular electrode boss on the inner surface of the first open metal cylinder electrode 3;
2.2) winding a fastening wire/belt on an outer annular step 5 of the outer surface of the first open metal cylinder electrode 3, and tightly hooping the first open metal cylinder electrode 3 on the dielectric film layer cylinder 4;
2.3) judging whether a gap exists at the opening of the tightly-hooped first opening metal cylinder electrode 3, and if so, unfastening the binder/belt in the step 2.1);
if no gap exists, unfastening the fastening wire/belt in the step 2.2) and the binder/belt in the step 2.1), disassembling the first open metal cylinder electrode 3, increasing the number of winding layers of the organic insulating medium film, and executing the step 1) and the steps 2.1-2.2) until a gap exists at the opening of the tightly hooped first open metal cylinder electrode 3, so as to finish the hooping of the first open metal cylinder electrode 3;
3) tightly hooping the second to Nth opening metal cylinder electrodes 3 to 3
3.1) winding a plurality of layers of organic insulating medium films on the tightly hooped first open metal cylinder electrode 3, and forming a medium film layer cylinder 4 on the outer surface of the first open metal cylinder electrode 3;
3.2) using a binder/belt to sleeve the second open metal cylinder electrode 3 on the dielectric film cylinder 4, so that the outer annular electrode boss on the outer surface of the first open metal cylinder electrode 3 is aligned with the two ends of the inner annular electrode boss on the inner surface of the second open metal cylinder electrode 3;
3.3) winding a fastening wire/belt on an outer annular step 5 of the outer surface of the second open metal cylinder electrode 3, and tightly hooping the second open metal cylinder electrode 3 on the dielectric film layer cylinder 4;
3.4) judging whether a gap exists at the opening of the tightly hooped second opening metal cylinder electrode 3, and if so, unfastening the binder/belt used in the step 3.2);
if no gap exists, unfastening the fastening wire/belt used in the step 3.3) and the binder/belt used in the step 3.2), disassembling the second open metal cylinder electrode 3, increasing the number of winding layers of the organic insulating medium film, and executing the steps 3.1) -3.3) until a gap exists at the opening of the second open metal cylinder electrode 3 which is fastened, so as to finish the fastening of the second open metal cylinder electrode 3;
repeating the steps 3.1) -3.3) for multiple times to finish the tight hooping of the third opening metal cylinder electrode 3 to the Nth opening metal cylinder electrode 3;
4) mounting peaking capacitor ground electrode 2
4.1) winding a plurality of layers of organic insulating medium films on the tightly hooped Nth opening metal cylinder electrode 3, and forming a medium film layer cylinder 4 on the outer surface of the Nth opening metal cylinder electrode 3;
4.2) tightly hooping the peaking capacitor ground electrode 2 on the dielectric film barrel 4 by using a bolt 9, wherein a gap exists between the tightly hooped peaking capacitor ground electrode 2 along the axial direction;
5) removing fastening lines/bands
Removing all the fastening wires/tapes used in the step 2.3) and the step 3.3) to finish the manufacture of the capacitor.
Step 6) peaking capacitor external insulation environment to high pressure SF when applying6A gas.
In the manufacturing process, the diameters of the open metal cylinder electrodes 3 need to be increased from inside to outside in sequence, and the gaps b of the open metal cylinder electrodes 3 are equal; when the organic insulating medium film is wound, a certain tension is kept to ensure that the organic insulating medium film is tightly wound, the tension is based on that the film is not obviously deformed, and the width of the film is as long as possible, so that the film can exceed two ends of the open metal cylinder electrode 3 to improve the surface flashover voltage of the capacitor; after the film exceeds the length and is formed by the peaking capacitor, the adjacent two layers of dielectric film layer cylinders 4 are not overlapped.
The above description is only for the purpose of describing the preferred embodiments of the present invention and does not limit the technical solutions of the present invention, and any known modifications made by those skilled in the art based on the main technical concepts of the present invention fall within the technical scope of the present invention.
Reference documents:
[1]I.D.Smith,“The pulse power technology of high altitude EMP simulators,”in Proc.5thSymp.Exhib.Electromagn.Compat.,Zurich,Switzerland,Mar.8-10,1983。
Claims (4)
1. a dry-type high-voltage low-inductance coaxial peaking capacitor is characterized in that: the device comprises peaking capacitor high-voltage electrodes (1), opening metal cylinder electrodes (3) and peaking capacitor ground electrodes (2) which are coaxially arranged from inside to outside in sequence, wherein the number of the opening metal cylinder electrodes (3) is multiple, and a dielectric film layer cylinder (4) is arranged between every two adjacent electrodes;
the dielectric film layer cylinders (4) are solid cylinders formed by tightly winding organic insulating dielectric films, and two ends of each dielectric film layer cylinder (4) exceed two ends of two opening metal cylinder electrodes (3) adjacent to the dielectric film layer cylinder;
both ends of the outer surface of the peaking capacitor high-voltage electrode (1) are cut into first annular steps (8), and a first annular electrode boss is formed in the middle of the first annular steps;
the opening metal cylinder electrodes (3) are made of 6061 aluminum alloy in an O state, inner annular steps (6) are cut at two ends of the inner surface of each opening metal cylinder electrode (3), an inner annular electrode boss is formed in the middle of the inner surface of each opening metal cylinder electrode, outer annular steps (5) are cut at two ends of the outer surface of each opening metal cylinder electrode (3), an outer annular electrode boss is formed in the middle of the outer surface of each opening metal cylinder electrode, round chamfers are arranged at the end part of the inner surface of each opening metal cylinder electrode (3) and the end part of the outer surface of each opening metal cylinder electrode (3), and a gap of 2-3 mm is cut on the surface of each opening metal cylinder electrode (3) in the axial direction after polishing treatment;
the plurality of open metal cylinder electrodes (3) are a first open metal cylinder electrode, a second open metal cylinder electrode … … and an Nth open metal cylinder electrode from inside to outside in sequence, wherein N is a positive integer greater than or equal to 2;
the first annular electrode boss on the outer surface of the peaking capacitor high-voltage electrode (1) is aligned with the two ends of the inner annular electrode boss on the inner surface of the first opening metal cylinder electrode,
aligning the two ends of an outer annular electrode boss on the outer surface of the first opening metal cylinder electrode with the two ends of an inner annular electrode boss on the inner surface of the second opening metal cylinder electrode, aligning the two ends of an outer annular electrode boss on the outer surface of the second opening metal cylinder electrode with the two ends of an inner annular electrode boss on the inner surface of the third opening metal cylinder electrode, and repeating the steps until the two ends of the outer annular electrode boss on the outer surface of the N-1 opening metal cylinder electrode are aligned with the two ends of the inner annular electrode boss on the inner surface of the N-1 opening metal cylinder electrode;
the thicknesses of the plurality of open metal cylinder electrodes (3) are all equal;
the thicknesses of all the medium film layer cylinders (4) are equal;
the heights and the areas of all the annular electrode bosses are equal;
the peaking capacitor ground electrode (2) is formed by combining two semicircular metal cylinders (10), and a gap exists in the axial direction after the two semicircular metal cylinders (10) are in butt joint.
2. The dry, high-voltage, low-inductance, coaxial peaking capacitor of claim 1, further comprising: the axial lengths of the plurality of opening metal cylinder electrodes (3) are reduced from inside to outside in sequence, and the axial length of the outer annular electrode boss of each opening metal cylinder electrode (3) is smaller than that of the inner annular electrode boss.
3. The process for manufacturing the dry-type high-voltage low-inductance coaxial peaking capacitor of claim 1 or 2, comprising the steps of:
1) a dielectric film layer cylinder (4) is wound on the outer surface of the peaking capacitor high-voltage electrode (1)
Winding a plurality of layers of organic insulating medium films on the peaking capacitor high-voltage electrode (1), and forming a medium film layer cylinder (4) on the outer surface of the peaking capacitor high-voltage electrode (1);
2) tightly hooped first opening metal cylinder electrode
2.1) tightly hooping the first open metal cylinder electrode on the dielectric film layer cylinder (4) by using a binder/belt, so that a first annular electrode boss on the outer surface of the peaking capacitor high-voltage electrode (1) is aligned with two ends of an inner annular electrode boss on the inner surface of the first open metal cylinder electrode;
2.2) winding a fastening wire/belt on an outer annular step of the outer surface of the first open metal cylinder electrode, and tightly hooping the first open metal cylinder electrode on the dielectric film layer cylinder (4);
2.3) judging whether a gap exists at the opening of the tightly-hooped first opening metal cylinder electrode, and if so, unfastening the binder/belt;
if no gap exists, unfastening the fastening wire/belt and the binder/belt, disassembling the first open metal cylinder electrode, increasing the number of winding layers of the organic insulating medium film, and executing the step 1) and the steps 2.1-2.2) until a gap exists at the position of the tightly hooped first open metal cylinder electrode opening, so as to finish the hooping of the first open metal cylinder electrode;
3) tightly hooping the second to Nth opening metal cylinder electrodes
3.1) winding a plurality of layers of organic insulating medium films on the tightly hooped first open metal cylinder electrode to form a medium film cylinder (4) on the outer surface of the first open metal cylinder electrode;
3.2) tightly hooping the second open metal cylinder electrode on the dielectric film cylinder (4) by using a binder/belt, so that the two ends of an outer annular electrode boss of the outer surface of the first open metal cylinder electrode are aligned with the two ends of an inner annular electrode boss of the inner surface of the second open metal cylinder electrode;
3.3) winding a fastening wire/belt on an outer annular step of the outer surface of the second open metal cylinder electrode, and tightly hooping the second open metal cylinder electrode on the dielectric film layer cylinder (4);
3.4) judging whether a gap exists at the opening of the tightly hooped second open metal cylinder electrode, and if so, unfastening the binder/belt;
if no gap exists, unfastening the fastening wire/belt and the binder/belt, disassembling the second open metal cylinder electrode, increasing the number of winding layers of the organic insulating medium film, and executing the steps 3.1) -3.3) until a gap exists at the position of the tightly hooped second open metal cylinder electrode opening, so as to finish the hooping of the second open metal cylinder electrode;
repeating the steps 3.1) -3.3) for multiple times to finish the tight hooping from the third opening metal cylinder electrode to the Nth opening metal cylinder electrode;
4) installation peaking capacitor ground electrode (2)
4.1) winding a plurality of layers of organic insulating medium films on the tightly hooped N-th opening metal cylinder electrode to form a medium film layer cylinder (4) on the outer surface of the N-th opening metal cylinder electrode;
4.2) tightly hooping the peaking capacitor ground electrode (2) on the dielectric film layer cylinder (4) in the step 4.1), wherein a gap exists in the tightly hooped peaking capacitor ground electrode (2) along the axial direction;
5) removing fastening lines/bands
And removing all fastening wires/belts to finish the manufacture of the capacitor.
4. The process of claim 3, wherein the dry high-voltage low-inductance coaxial peaking capacitor comprises: the exterior insulation environment of the peaking capacitor is high-pressure SF when in use6A gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911074168.6A CN110808168B (en) | 2019-10-31 | 2019-10-31 | Dry-type high-voltage low-inductance coaxial peaking capacitor and manufacturing process thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911074168.6A CN110808168B (en) | 2019-10-31 | 2019-10-31 | Dry-type high-voltage low-inductance coaxial peaking capacitor and manufacturing process thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110808168A CN110808168A (en) | 2020-02-18 |
| CN110808168B true CN110808168B (en) | 2021-12-24 |
Family
ID=69501339
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911074168.6A Active CN110808168B (en) | 2019-10-31 | 2019-10-31 | Dry-type high-voltage low-inductance coaxial peaking capacitor and manufacturing process thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110808168B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112768233B (en) * | 2020-12-29 | 2022-06-07 | 西北核技术研究所 | High-voltage megavolt coaxial-flat plate mixed type low-inductance pulse capacitor |
| CN112685985B (en) * | 2020-12-29 | 2023-01-17 | 西北核技术研究所 | Capacitor design method for inhibiting surface flashover |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB381017A (en) * | 1931-01-31 | 1932-09-29 | Ericsson Telefon Ab L M | Improvements in high tension condensers |
| CN1855324A (en) * | 2005-04-27 | 2006-11-01 | 京瓷株式会社 | Laminate electronic device |
| CN105679534A (en) * | 2016-01-23 | 2016-06-15 | 中国人民解放军国防科学技术大学 | Dual coaxial-type high-voltage pulse capacitor, capacitor and switch integrated device |
| CN105977024A (en) * | 2016-06-27 | 2016-09-28 | 安徽赛福电子有限公司 | Metalized safety film layer stacked-type pulse capacitor |
| CN108922777A (en) * | 2018-06-22 | 2018-11-30 | 西北核技术研究所 | A kind of plate low inductance impulse capacitor of high pressure megavolt grade |
-
2019
- 2019-10-31 CN CN201911074168.6A patent/CN110808168B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB381017A (en) * | 1931-01-31 | 1932-09-29 | Ericsson Telefon Ab L M | Improvements in high tension condensers |
| CN1855324A (en) * | 2005-04-27 | 2006-11-01 | 京瓷株式会社 | Laminate electronic device |
| CN105679534A (en) * | 2016-01-23 | 2016-06-15 | 中国人民解放军国防科学技术大学 | Dual coaxial-type high-voltage pulse capacitor, capacitor and switch integrated device |
| CN105977024A (en) * | 2016-06-27 | 2016-09-28 | 安徽赛福电子有限公司 | Metalized safety film layer stacked-type pulse capacitor |
| CN108922777A (en) * | 2018-06-22 | 2018-11-30 | 西北核技术研究所 | A kind of plate low inductance impulse capacitor of high pressure megavolt grade |
Non-Patent Citations (1)
| Title |
|---|
| "300kV/3ns脉冲电压源的研制";汤俊萍等;《强激光与粒子束》;20070630;第19卷(第6期);第1031-1034页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110808168A (en) | 2020-02-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110808168B (en) | Dry-type high-voltage low-inductance coaxial peaking capacitor and manufacturing process thereof | |
| CN104158430B (en) | ultra-compact high-voltage nanosecond pulse source | |
| US10763034B2 (en) | Compact pulse transformer with transmission line embodiment | |
| US9831027B2 (en) | Electrostatic shielding of transformers | |
| US8907223B2 (en) | Bushings foil design | |
| CN204089634U (en) | Ultra-compact high-voltage nanosecond pulse source | |
| US4484085A (en) | Spiral line voltage pulse generator characterized by secondary winding | |
| Bagheri et al. | Influence of electrostatic shielding of disc winding on increasing the series capacitance in transformer | |
| US4379999A (en) | Electrostatic shield for a transformer | |
| CN102998496B (en) | Series capacitor anti-interference layer structure and manufacturing method thereof | |
| CN111682862B (en) | Combined insulation type winding ribbon pulse forming line | |
| RU2382488C1 (en) | Device for generating subnanosecond pulses | |
| Luan et al. | Design Guidelines to Reduce Parasitic Capacitance in Planar Inductors | |
| US6414581B1 (en) | Air core transformer with coaxial grading shield | |
| CN105023746B (en) | Method for equalizing field intensity in medium-voltage transformer | |
| JPS61234014A (en) | Transition voltage protector for toroidal transformer | |
| JP2917081B2 (en) | Ultra-high voltage transformer secondary winding | |
| CN113871194B (en) | Combined insulation method of high-voltage pulse transformer and high-voltage pulse transformer | |
| US20240282488A1 (en) | Electrical Insulation Tube | |
| CN219179534U (en) | Passive digital sleeve | |
| CN214203466U (en) | Compact low-inductance metallized film dry capacitor for pulse equipment | |
| CN210272041U (en) | Structure is wrapped to high-voltage current transformer electric capacity screen | |
| CN109698043B (en) | Wire for transformer winding and transformer | |
| US10277013B2 (en) | High-power breakdown spark plugs and related methods | |
| CN104376987B (en) | A kind of integrated multistage high-voltage pulse isolation inductance |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |