CN110767844B - Array substrate, manufacturing method thereof, display screen and display device - Google Patents

Array substrate, manufacturing method thereof, display screen and display device Download PDF

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CN110767844B
CN110767844B CN201910098900.7A CN201910098900A CN110767844B CN 110767844 B CN110767844 B CN 110767844B CN 201910098900 A CN201910098900 A CN 201910098900A CN 110767844 B CN110767844 B CN 110767844B
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layer
display area
electrode
array substrate
conductive
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CN110767844A (en
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楼均辉
王云
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Yungu Guan Technology Co Ltd
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Yungu Guan Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/17Passive-matrix OLED displays

Abstract

The application provides a manufacturing method of an array substrate, the array substrate, a display screen and a display device, wherein the manufacturing method comprises the following steps: providing a substrate, and forming a first conductive film layer on the substrate; patterning the first conductive film layer to form a first conductive layer in the first display area and a second conductive layer in the second display area; forming a second conductive film layer on the first conductive layer and the second conductive layer; patterning the second conductive film layer of the first display area, and removing the material of the second conductive film layer covering the area except the first conductive layer to form a third conductive layer only on the first conductive layer; in the same process, a light emitting structure layer is formed on the third conductive layer and the second conductive layer to form light emitting structure layers of the first display area and the second display area, wherein a first electrode of the light emitting structure layer of the first display area comprises a lamination of the first conductive layer and the third conductive layer, and a first electrode of the light emitting structure layer of the second display area comprises the second conductive layer.

Description

Array substrate, manufacturing method thereof, display screen and display device
Technical Field
The present disclosure relates to the field of display, and in particular, to a manufacturing method of an array substrate, a display screen, and a display device.
Background
With the rapid development of display terminals, the requirements of users on screen occupation ratios are higher and higher, so that the comprehensive screen display of the display terminal receives more and more attention in the industry. Traditional display terminal such as cell-phone, panel computer, etc. owing to need integrated such as leading camera, earphone and infrared sensing element etc. but the fluting region can not be used for showing the picture, like the bang screen among the prior art, or adopts the mode of trompil on the screen, to the electronic equipment who realizes the function of making a video recording, external light accessible screen trompil department gets into the photosensitive element that is located the screen below. However, these electronic devices are not all full-screen in the true sense, and cannot display in each area of the whole screen, for example, the camera area cannot display the picture.
Disclosure of Invention
Based on the above, the application provides a manufacturing method of an array substrate, the array substrate, a display screen and a display device.
The application provides a manufacturing method of an array substrate, the array substrate comprises a first display area and a second display area, and the manufacturing method of the array substrate comprises the following steps: providing a substrate, and forming a first conductive film layer on the substrate; patterning the first conductive film layer, and reserving a part of the first conductive film layer material above the first display area and the second display area to form a first conductive layer in the first display area and a second conductive layer in the second display area; forming a second conductive film layer on the first conductive layer and the second conductive layer; patterning the second conductive film layer of the first display area, and removing the material of the second conductive film layer covering the area except the first conductive layer to form a third conductive layer only on the first conductive layer; in the same process, a light emitting structure layer is formed on the third conductive layer and the second conductive layer to form the light emitting structure layers of the first display area and the second display area, wherein a first electrode of the light emitting structure layer of the first display area comprises a lamination of the first conductive layer and the third conductive layer, and a first electrode of the light emitting structure layer of the second display area comprises the second conductive layer.
The application provides a manufacturing method of an array substrate, which has the following beneficial effects: in the same process, the first electrode of the first display area and the first electrode of the second display area are formed, and compared with the method of forming the first electrode of the first display area and the first electrode of the second display area in different processes, the manufacturing process is simplified, the productivity is improved, and the manufacturing cost is reduced.
Preferably, after the first conductive layer in the first display region and the second conductive layer in the second display region are formed, the method further includes: and annealing and crystallizing the first conductive layer and the second conductive layer. After annealing crystallization is carried out, when the second conductive film layer is etched, the second conductive layer cannot be etched by the etching liquid of the second conductive film layer, and meanwhile, the first conductive layer, the second conductive layer and the planarization layer are tightly combined, so that the yield of products is improved.
Preferably, the patterning of the first conductive film layer includes patterning the first conductive film layer by photolithography and etching processes.
Preferably, the forming a second conductive film layer on the first conductive layer and the second conductive layer includes: forming a first sub-film layer on the first conductive layer and the second conductive layer; preferably, the first conductive film layer and the second sub-film layer are transparent conductive film layers, and the first sub-film layer is a non-transparent conductive film layer. Preferably, the material of the first conductive film layer and the second sub-film layer includes indium tin oxide or indium zinc oxide, and the material of the first sub-film layer includes silver. The first sub-film layer can be used as a reflecting layer to increase emergent rays and improve light utilization rate, and the second sub-film layer can be made of materials with higher power functions, such as indium tin oxide or indium zinc oxide materials, and used for providing hole injection.
Preferably, the thickness of the first conductive film layer is 100-1000 angstroms, and the thickness of the second sub-film layer is 50-200 angstroms. The thickness of the first conductive film layer is 100-1000 angstroms, so that the second conductive layer 22 meets the requirement of providing hole injection and is matched with the resistance value of the transparent display area; the thickness of the second sub-film layer is 50-200 angstroms so as to meet the requirement that the second sub-electron layer meets the requirement of providing hole injection and the requirement of forming a proper micro-cavity structure with other film layers.
Preferably, the method for manufacturing the array substrate includes: after forming the light emitting structure layer on the third conductive layer and the second conductive layer, forming a fourth conductive layer on the light emitting structure layer, wherein the fourth conductive layer is a second electrode corresponding to the light emitting structure layer; wherein the light transmittance of the fourth conductive layer of the first display region is less than the light transmittance of the fourth conductive layer of the second display region. The first electrode, the light emitting structure layer and the second electrode of the first display area and the second display area are formed in the same process, so that the problem of complex process caused by respectively forming the first electrode, the light emitting structure layer and the second electrode is avoided, the manufacturing process is further simplified, the productivity is increased, and the manufacturing cost is reduced.
Preferably, the substrate includes a substrate, a driving layer formed on the substrate, and a planarization layer formed on the driving layer.
The application also provides an array substrate, the array substrate is manufactured by the manufacturing method of the array substrate, the array substrate comprises a first display area and a second display area, the first display area is a non-transparent display area, and the second display area is a transparent display area. The array substrate is manufactured by the manufacturing method of the array substrate, the process is simplified, and the manufacturing cost of the array substrate is reduced.
Preferably, the second display area is shaped as a drop, rectangle or circle.
Preferably, the first display area at least partially surrounds the second display area.
Preferably, the second display area is a PMOLED substrate, and the first display area is an AMOLED substrate.
Preferably, the first electrode corresponding to the light emitting structure layer of the second display region has a circular, square, oval or gourd-shaped shape.
Preferably, the light emitting structure layer of the second display region has a circular, elliptical or dumbbell shape.
Preferably, the first electrode is an anode and the second electrode is a cathode.
Preferably, the second electrode of the second display region is a face electrode.
Preferably, the second electrode of the second display area is of a single-layer structure or a stacked structure, when the second electrode of the second display area is of a single-layer structure, the second electrode of the second display area is of a single-layer metal layer, or a single-layer metal mixture layer, or a single-layer transparent metal oxide layer, and when the second electrode of the second display area is of a stacked structure, the second electrode of the second display area is of a stacked layer of a transparent metal oxide layer and a metal layer, or the second electrode of the second display area is of a stacked layer of a transparent metal oxide layer and a metal mixture layer.
Preferably, when the second electrode material of the second display area is doped with metal, the thickness of the second electrode of the second display area is greater than or equal to 100 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 500 angstroms, the thickness of the second electrode of the second display area is entirely continuous, and the transparency of the second electrode of the second display area is greater than 40%.
Preferably, when the second electrode material of the second display area is doped with metal, the thickness of the second electrode of the second display area is greater than or equal to 100 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 200 angstroms, the thickness of the second electrode of the second display area is entirely continuous, and the transparency of the second electrode of the second display area is greater than 40%.
Preferably, when the second electrode material of the second display area is doped with metal, the thickness of the second electrode of the second display area is greater than or equal to 50 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 200 angstroms, the thickness of the second electrode of the second display area is entirely continuous, and the transparency of the second electrode of the second display area is greater than 50%.
Preferably, when the second electrode material of the second display area is doped with a metal, the thickness of the second electrode of the second display area is greater than or equal to 50 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 200 angstroms, the thickness of the second electrode of the second display area is entirely continuous, and the transparency of the second electrode of the second display area is greater than 60%.
Preferably, when the second electrode of the second display region has a single-layer structure, the single-layer metal layer is made of Al or Ag, the single-layer metal mixture layer is made of MgAg or an Al-doped metal mixture material, and the transparent metal oxide is ITO or IZO. The application also provides a display screen, which comprises the array substrate.
The application also provides a display device, which comprises an equipment body and the display screen, wherein the equipment body is provided with a device area; the display screen covers the equipment body; the device area is located below the second display area, and a photosensitive device which penetrates through the second display area to collect light is arranged in the device area.
Drawings
Fig. 1 is a schematic flow chart illustrating a method for manufacturing an array substrate according to the present application;
FIG. 2 is a schematic cross-sectional view of a substrate according to the present application;
fig. 3 is a schematic cross-sectional view illustrating a first conductive film layer formed on a substrate according to the method for manufacturing an array substrate of the present application;
fig. 4 is a schematic cross-sectional view illustrating patterning of a first conductive film layer in the method for manufacturing an array substrate according to the present application;
FIG. 5 is a schematic cross-sectional view of a first sub-film layer of a second conductive layer formed on a first conductive layer in the method for manufacturing an array substrate of the present application;
FIG. 6 is a schematic cross-sectional view of a second sub-film layer of a second conductive layer formed on a first sub-film layer in the method for manufacturing an array substrate of the present application;
fig. 7 is a schematic structural diagram illustrating patterning of a second conductive film layer in the method for manufacturing an array substrate according to the present application;
fig. 8 is a schematic cross-sectional view illustrating the formation of a pixel defining layer in the method for manufacturing an array substrate according to the present application;
fig. 9 is a schematic cross-sectional view illustrating a light emitting structure layer formed on a second conductive layer and a first conductive layer in the method for manufacturing an array substrate of the present application;
fig. 10 is a schematic cross-sectional view illustrating a fourth electrode film layer formed on the light emitting structure layer in the manufacturing method of the array substrate of the present application;
fig. 11 is a schematic cross-sectional view illustrating a fourth conductive film layer patterned in the method for manufacturing an array substrate according to the present application;
fig. 12 is a schematic cross-sectional view illustrating another embodiment of forming a fourth electrode layer on a light emitting structure layer in the method for manufacturing an array substrate of the present application.
FIG. 13 is a schematic structural diagram of one embodiment of a display screen of the present application;
fig. 14 is a schematic structural diagram of an embodiment of a display device according to the present application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the description and in the claims does not indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. "plurality" or "a number" means two or more. The word "comprising" or "comprises", and the like, means that the element or item listed as preceding "comprising" or "includes" covers the element or item listed as following "comprising" or "includes" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
As described in the background art, in order to improve the light transmittance, the area corresponding to the photosensitive device is set as the transparent display area, and the other display areas are the non-transparent display areas, the film layer of the transparent display area is made of a transparent material, and the film layer of the non-transparent display area is usually made of a non-transparent material. Further, the inventors have found that the film layer of the transparent display region and the film layer of the non-transparent display region are formed in different processes, which inevitably leads to an increase and complication of the process, a reduction in the production capacity, and an increase in the manufacturing cost.
In order to solve the above technical problems, the present embodiment provides a method for manufacturing an array substrate, where the array substrate includes a first display area a and a second display area B, the first display area a is a non-transparent display area, such as an AMOLED substrate, and the second display area B is a transparent display area, such as a PMOLED substrate.
Referring to fig. 1, the method for manufacturing the array substrate includes steps S1-S7.
Step S1: providing a substrate 1, and forming a first conductive film layer 2 on the substrate 1, as shown in fig. 2 and fig. 3.
It should be noted that, the first conductive film layer 2 is formed on the substrate 1, and it should be understood that the first conductive film layer 2 is located above the substrate 1, and the substrate 1 and the first conductive film layer 2 may be in direct contact, or may be separated by another film layer.
In one embodiment, the substrate 1 includes a substrate 11, a driving layer formed on the substrate 11, and a planarization layer 19 formed on the driving layer, optionally, the driving layer is a thin film transistor layer. The driving layer includes an active layer 12 formed on the substrate 11 of the first display region a, a first insulating layer 13 formed on the active layer 12, a gate layer 14 formed on the first insulating layer 13 of the first display region a, a second insulating layer 15 formed on the gate layer 14, and a capacitor layer 16 formed on the second insulating layer 15 of the first display region a; a third insulating layer 17 formed on the capacitor layer 16, and a source/drain layer 18 formed on the third insulating layer 17 of the first display area a. A planarization layer 19 is formed on the source drain layer 18. Of course, in other embodiments, the gate layer 14 may also be disposed above the source drain layer 18, i.e., a top gate mechanism.
The substrate 11 includes a substrate 111 and a barrier layer 112 formed on the substrate 111, the substrate 111 may be made of a glass substrate, a PET substrate, a PI substrate, or the like, and the barrier layer 112 may be made of at least one of SiNx and SiOx for blocking water and oxygen; the material of the active layer 12 can be p-type doped silicon p-Si, amorphous silicon a-Si, or metal oxide; the first insulating layer 13, the second insulating layer 15, and the third insulating layer 17 are made of an organic insulating material or an inorganic insulating material; the gate layer 14 and the source drain layer 18 are made of metal materials; the planarization layer 19 is made of an organic material, such as a fluorinated polymer, parylene, methyl cyclopentenolone, polyacrylate, or the like.
A first through hole 131 and a second through hole 132 are formed in the first insulating layer 13, the second insulating layer 15 and the third insulating layer 17, the source-drain layer 18 includes a source 181 and a drain 182, and the source 182 and the drain 182 are connected to the active layer 12 through the first through hole 131 and the second through hole 132, respectively; the planarization layer 19 is provided with a via 191 for connecting an electrode of the array substrate with the source 181 or the drain 182.
In one embodiment, the first conductive film layer 2 is formed of at least one of indium tin oxide, indium zinc oxide, and other transparent conductive materials, and for example, the first conductive film layer 2 made of indium tin oxide has a larger adhesion force with the planarization layer 19 made of an organic material, and is not easy to be stripped.
Step S2: the first conductive film layer 2 is patterned, and a portion of the first conductive film layer material in the first display area a and the second display area B is remained, so as to form a first conductive layer 21 in the first display area a and a second conductive layer 22 in the second display area B, as shown in fig. 4.
The first conductive layer 21 includes a plurality of first conductive portions (not shown) arranged in an array, and the first conductive portions are electrically connected to the drain 182 (or the source 181) of the source/drain layer 18 through via holes 191 to receive a driving signal. The second conductive layer 22 includes a plurality of second conductive portions (not shown) arranged in an array, or the second conductive layer 22 includes a plurality of second conductive portions (not shown) arranged in a row direction or a column direction.
Step S3: the first conductive layer 21 and the second conductive layer 22 are annealed and crystallized.
In one embodiment, the first conductive layer 21 and the second conductive layer 22 are annealed and crystallized by heating at 200-300 ℃ for one hour. After the annealing crystallization, the first conductive layer 21 and the second conductive layer 22 (and the film layers above the first conductive layer 21 and the second conductive layer 22) are prevented from being stripped by the subsequent patterning processes such as photolithography and etching. For example, when the second conductive film layer is etched, the second conductive layer is not etched by the etching solution of the second conductive film layer, and the first conductive layer, the second conductive layer and the planarization layer are tightly combined, so that the yield of the product is improved, and the manufacturing cost is reduced.
Step S4: a second conductive film layer 3A is formed on the first conductive layer 21 and the second conductive layer 22.
In one embodiment, referring to fig. 5 and fig. 6, a second conductive film layer 3A is formed on the first conductive layer 21 and the second conductive layer 22. The second conductive film layer 3A includes a first sub-film layer 31A and a second sub-film layer 32A. Step S4 includes:
substep S41: forming a first sub-film layer 31A on the first conductive layer 21 and the second conductive layer 22;
substep S42: a second sub-film layer 32A is formed on the first sub-film layer 31A.
The first sub-film layer 31A and the second sub-film layer 32A are formed in a manner similar to the forming process of the first conductive film layer 2.
Step S5: the second conductive film layer 3A of the first display area a is patterned, and the material of the second conductive film layer covering the first conductive layer 21 area is removed, so as to form the third conductive layer 3 only above the first conductive layer 21, as shown in fig. 7.
In one embodiment, the second conductive film layer 3 includes a first sub-film layer 31 and a second sub-film layer 41, and correspondingly, the third conductive layer 3 includes a first sub-conductive layer 31 and a second sub-conductive layer formed on the first sub-conductive layer 31. The third conductive layer 3 may be a single conductive layer, or may be a conductive layer group composed of two or more conductive layers. The material of the first sub-film layer 31A includes silver, and the materials of the second conductive layer 22 and the second sub-film layer 32A include at least one of indium tin oxide, indium zinc oxide, and the like. The second sub-conductive layer 31 is used for injecting holes, the first sub-conductive layer 31 is used as a reflective metal layer to reflect the OLED light upwards, so that the light utilization rate is improved, the display brightness is improved, the first conductive layer is used as a transition layer between the first sub-conductive layer 31 and the planarization layer 19, the adhesion between the first sub-conductive layer 31 and the planarization layer is improved, and the problem of demoulding is avoided.
Since the second sub-conductive layer 32 needs to provide hole injection for the hole injection layer (on the first electrode forming the first display region) of the first display region a, a material with a high power function, such as an ITO material, needs to be selected. The second sub-conductive layer 32 also needs to form a suitable microcavity structure with other film layers to eliminate or reduce the microcavity effect, and the thickness of the second sub-conductive layer 32 (or the second sub-conductive film layer) is optionally in the range of 50 to 200 angstroms, in combination of the two factors. The second conductive layer 22 is required to be a hole injection layer of the second display region, the second conductive layer 22 also needs to satisfy the requirement of the resistance value of the second display region, and the thickness of the second conductive layer 22 can be selected within a range of 100-1000 angstroms. It should be noted that the second sub-conductive layer 32 and the second conductive layer 22 are closely related to the specification of the array substrate, and cannot be changed arbitrarily.
If the conductive film layer is formed in the same process and patterned to form the second conductive layer 22 and the second sub-conductive layer 32 with the same thickness, the thickness of the conductive film layer needs to satisfy the requirements of providing hole injection, forming a suitable micro-cavity structure, resistance value, and the like, which has very high requirements for manufacturing. Moreover, for array substrates of certain specifications, the thickness of the conductive film layer may not exist, and the above requirements are met. Therefore, in the present embodiment, the second conductive layer 22 and the second sub-conductive layer 32 are formed in different sub-processes.
The first electrode of the first display area a includes a stack of the first conductive layer 21 and the third conductive layer 3 (including the first sub-conductive layer 31 and the second sub-conductive layer 32), and the first electrode of the second display area B includes the second conductive layer 22. That is, in the same process (which may include a plurality of sub-processes), compared to forming the first electrode of the first display area a and the first electrode of the second display area B in different processes (each of which may include a plurality of sub-processes), the first electrode of the first display area a and the first electrode of the second display area B are formed, so that the manufacturing process is simplified, the productivity is improved, and the manufacturing cost is reduced.
Of course, the method for manufacturing the array substrate further includes forming a hole injection layer and a hole transport layer on the first electrode of the first display area a and the first electrode of the second display area B.
In one embodiment, referring to fig. 8, a pixel defining layer 4 is formed on the second sub-conductive layer 32 and the second conductive layer 22, and the pixel defining layer 4 has a pixel opening 41.
Step S6 illustrated in fig. 1: in the same process, a light emitting structure layer 5 is formed on the third conductive layer 3A and the second conductive layer 22 to form the light emitting structure layer 5 in the first display area a and the second display area B, as shown in fig. 9.
The light emitting structure layer 5 includes a first light emitting structure layer 51 in a first display area a and a second light emitting structure layer 52 in a second display area B, wherein a first electrode (i.e., the first electrode in the first display area a, for example, the anode) corresponding to the first light emitting structure layer 51 includes a stack of the first conductive layer 21 and the third conductive layer 3, and a first electrode (i.e., the first electrode in the second display area B, for example, the anode) corresponding to the second light emitting structure layer 52 includes the second conductive layer 22.
In one embodiment, the shape of the first electrode corresponding to the first light emitting structure layer 51 may be a circle, a square, an ellipse, or the like, preferably a square, and the shape of the first electrode corresponding to the second light emitting structure layer 52 may be a circle, a square, an ellipse, a gourd-shaped, or the like; the shape of the light emitting structure of the first light emitting structure layer 51 may be a circle, a square, or an ellipse, preferably a square, and the shape of the light emitting structure of the second light emitting structure layer 52 is a circle, an ellipse, or a dumbbell, preferably a circle.
Of course, the method of manufacturing the array substrate further includes forming an electron transport layer and an electron injection layer on the light emitting structure layer 5.
Step S7: a fourth conductive film layer 6A is formed on the light emitting structure layer, where the fourth conductive layer is a second electrode corresponding to the light emitting structure layer, as shown in fig. 10.
The first electrode, the light emitting structure layer and the second electrode of the first display area A and the second display area B are all formed in the same process, so that the problem of complex process caused by respectively forming the first electrode, the light emitting structure layer and the second electrode is avoided, the manufacturing process is further simplified, the productivity is increased, and the manufacturing cost is reduced.
In one embodiment, referring to fig. 11, the fourth conductive film layer 6A is patterned to form a fourth conductive layer 6, the fourth conductive layer includes a fourth conductive layer 61 of the first display area a and a fourth conductive layer 62 of the second display area B, the thickness of the fourth conductive layer 61 of the first display area a is greater than that of the fourth conductive layer 62 of the second display area B, and the fourth conductive layer of the second display area B has a greater light transmittance than the fourth conductive layer 61 of the first display area a, so as to implement a transparent display or a nearly transparent display of the second display area B. The thickness reduction of the fourth conductive layer of the second display region B may be achieved by laser thinning. Of course, in other embodiments, the light transmittance of the fourth conductive layer 62 of the second display area B may be made larger than the light transmittance of the fourth conductive layer 61 of the first display area a by changing the material of the fourth conductive layer 62 of the second display area B.
In another embodiment, referring to fig. 12, the second electrode 61A of the first display area and the second electrode 62A of the second display area may also be formed on the light emitting structure layer 5, wherein the material of the second electrode 61A of the first display area a may be a alloy material or a doped composite material. In one embodiment, the electrodes of the second electrodes 62A of the second display region B are planar electrodes (i.e., a full-surface structure). The second electrode 62A of the second display region B has a single-layer structure or a stacked-layer structure, when the second electrode 62A of the second display region B has a single-layer structure, a single-layer metal layer, a single-layer metal mixture layer, or a single-layer transparent metal oxide layer may be selected, and when the second electrode 62A of the second display region B has a stacked-layer structure, a stacked layer of a transparent metal oxide layer and a metal layer, or a stacked layer of a transparent metal oxide layer and a metal mixture layer may be selected.
In one embodiment, when the second electrode 62A of the second display region B is doped with a metal, when the thickness of the second electrode 62A of the second display region B is greater than or equal to 100 angstroms and less than or equal to 500 angstroms, the thickness of the second electrode 62A of the second display region B is entirely continuous, and the transparency of the second electrode 62A of the second display region B is greater than 40%; when the thickness of the second electrode 62A of the second display region B is greater than or equal to 50 angstroms and less than or equal to 200 angstroms, the thickness of the second electrode 62A of the second display region B is entirely continuous, and the transparency of the second electrode 62A of the second display region B is greater than 50%; preferably, when the second electrode 62A of the second display region B is doped with metal, and the thickness of the second electrode 62A of the second display region B is greater than or equal to 50 angstroms and less than or equal to 200 angstroms, the thickness of the second electrode is continuous as a whole, and the transparency of the second electrode is greater than 60%.
In one embodiment, when the second electrode 62A of the second display region B has a single-layer structure, the single-layer metal layer is made of Al or Ag, the single-layer metal mixture layer is made of MgAg or a metal mixture material doped with Al, and the transparent metal oxide is ITO or IZO.
Whichever material is selected, it is ensured that the second electrode 62A of the second display region B has a sufficiently large light transmittance, thereby ensuring that the second display region B realizes a transparent display or a nearly transparent display.
It should be noted that the above steps can be adjusted, increased or decreased according to actual requirements, for example, in some embodiments, step S7 is not included.
The present application further provides an array substrate 10, please refer to fig. 12, which is manufactured by the method for manufacturing the array substrate. The array substrate 10 includes a first display area a and a second display area B, the first display area a is a non-transparent display area, such as an AMOLED substrate, and the second display area B is a transparent display area, such as a PMOLED substrate. The second display area B is transparent or approximately transparent when not displaying images, and the photosensitive elements arranged below the second display area B can acquire light through the second display area B. In one embodiment, the second display area B may be shaped as a drop, a rectangle, or a circle, and the first display area a may be a rectangle, a right-angled rectangle, a rounded rectangle, or the like, and at least partially surrounds the second display area B.
Referring to fig. 13, the present application further provides a display panel 100, which includes the array substrate and an encapsulation layer 10 encapsulating the array substrate. The display screen can be used as a display device, and can also be provided with a touch layer used as a touch panel. The display screen can also be used as a semi-finished product to be integrated with other components and assembled together to form a display device such as a mobile phone, a tablet computer, a vehicle-mounted display screen and the like.
Please refer to fig. 14, the present application further provides a display device, which includes an apparatus main body 200 and the display screen 100, wherein the display screen 100 covers the apparatus main body 200, the apparatus main body 200 has a device area, the device area is located below the second display area B, and a photosensitive device 201 for collecting light through the second display area is disposed in the device area. The light sensing device 201 is, for example, an infrared sensor, a camera, an iris recognition sensor, or the like.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Claims (25)

1. A manufacturing method of an array substrate, the array substrate comprising a first display area and a second display area, the manufacturing method of the array substrate comprising:
providing a substrate, and forming a first conductive film layer on the substrate;
patterning the first conductive film layer, and reserving part of the first conductive film layer material in the first display area and the second display area to form a first conductive layer in the first display area and a second conductive layer in the second display area;
forming a second conductive film layer on the first conductive layer and the second conductive layer;
patterning the second conductive film layer of the first display area, and removing the material of the second conductive film layer covering the area except the first conductive layer to form a third conductive layer only on the first conductive layer;
in the same process, a light emitting structure layer is formed on the third conductive layer and the second conductive layer to form the light emitting structure layers of the first display area and the second display area, wherein a first electrode corresponding to the light emitting structure layer of the first display area comprises a lamination of the first conductive layer and the third conductive layer, and a first electrode corresponding to the light emitting structure layer of the second display area comprises the second conductive layer.
2. The method of manufacturing an array substrate of claim 1, wherein: after forming the first conductive layer located in the first display area and the second conductive layer located in the second display area, the method further includes:
and annealing and crystallizing the first conductive layer and the second conductive layer.
3. The method of manufacturing an array substrate of claim 2, wherein: the patterning of the first conductive film layer includes patterning the first conductive film layer by photolithography and etching processes.
4. The method of manufacturing an array substrate of claim 1, wherein: the forming a second conductive film layer on the first conductive layer and the second conductive layer includes:
forming a first sub-film layer on the first conductive layer and the second conductive layer;
a second sub-film layer is formed on the first sub-film layer.
5. The method of manufacturing an array substrate of claim 4, wherein: the first conductive film layer and the second sub-film layer are transparent conductive film layers, and the first sub-film layer is a non-transparent conductive film layer.
6. The method of manufacturing an array substrate of claim 5, wherein: the first conductive film layer and the second sub-film layer are made of indium tin oxide or indium zinc oxide, and the first sub-film layer is made of silver.
7. The method of manufacturing an array substrate of claim 5, wherein: the thickness of the first conductive film layer is 100-1000 angstroms, and the thickness of the second sub-film layer is 50-200 angstroms.
8. The method of manufacturing an array substrate according to claim 1, wherein: the manufacturing method of the array substrate comprises the following steps: after forming the light emitting structure layer on the third conductive layer and the second conductive layer,
forming a fourth conductive layer on the light emitting structure layer, wherein the fourth conductive layer is a second electrode corresponding to the light emitting structure layer;
wherein the light transmittance of the fourth conductive layer of the first display region is less than the light transmittance of the fourth conductive layer of the second display region.
9. The method of manufacturing an array substrate of claim 1, wherein: the base plate comprises a substrate, a driving layer formed on the substrate and a planarization layer formed on the driving layer.
10. An array substrate, comprising: the array substrate is manufactured by the method of manufacturing an array substrate according to any one of claims 1 to 9, the array substrate includes a first display region and a second display region, the first display region is a non-transparent display region, and the second display region is a transparent display region.
11. The array substrate of claim 10, wherein: the second display area is shaped like a water drop, a rectangle or a circle.
12. The array substrate of claim 10, wherein: the first display area at least partially surrounds the second display area.
13. The array substrate of claim 10, wherein: the second display area is a PMOLED substrate, and the first display area is an AMOLED substrate.
14. The array substrate of claim 10, wherein: the first electrode corresponding to the light emitting structure layer of the second display area is in a circular, square, oval or gourd-shaped shape.
15. The array substrate of claim 10, wherein: the shape of the light emitting structure layer of the second display area is circular, oval or dumbbell-shaped.
16. The array substrate of claim 10, wherein: the first electrode is an anode, a fourth conducting layer is formed on the light-emitting structure layer, and when the fourth conducting layer is a second electrode corresponding to the light-emitting structure layer, the second electrode is a cathode.
17. The array substrate of claim 16, wherein: the second electrode of the second display region is a face electrode.
18. The array substrate of claim 16, wherein: the second electrode of the second display area is of a single-layer structure or a laminated structure, when the second electrode of the second display area is of a single-layer structure, the second electrode of the second display area is of a single-layer metal layer, or a single-layer metal mixture layer, or a single-layer transparent metal oxide layer, and when the second electrode of the second display area is of a laminated structure, the second electrode of the second display area is of a laminated layer of a transparent metal oxide layer and a metal layer, or the second electrode of the second display area is of a laminated layer of a transparent metal oxide layer and a metal mixture layer.
19. The array substrate of claim 16, wherein: when the second electrode material of the second display area is doped with metal, the thickness of the second electrode of the second display area is greater than or equal to 100 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 500 angstroms, the thickness of the second electrode of the second display area is wholly continuous, and the transparency of the second electrode of the second display area is greater than 40%.
20. The array substrate of claim 16, wherein: when the second electrode material of the second display area is doped with metal, the thickness of the second electrode of the second display area is greater than or equal to 100 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 200 angstroms, the thickness of the second electrode of the second display area is wholly continuous, and the transparency of the second electrode of the second display area is greater than 40%.
21. The array substrate of claim 16, wherein: when the second electrode material of the second display area is doped with metal, the thickness of the second electrode of the second display area is greater than or equal to 50 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 200 angstroms, the thickness of the second electrode of the second display area is wholly continuous, and the transparency of the second electrode of the second display area is greater than 50%.
22. The array substrate of claim 16, wherein: when the second electrode material of the second display area is doped with metal, the thickness of the second electrode of the second display area is greater than or equal to 50 angstroms, and when the thickness of the second electrode of the second display area is less than or equal to 200 angstroms, the thickness of the second electrode of the second display area is wholly continuous, and the transparency of the second electrode of the second display area is greater than 60%.
23. The array substrate of claim 18, wherein: when the second electrode of the second display region is of a single-layer structure, the single-layer metal layer is made of Al and Ag, the single-layer metal mixture layer is made of MgAg or a metal mixture material doped with Al, and the transparent metal oxide is ITO or IZO.
24. A display screen comprising the array substrate of any one of claims 10-23.
25. A display device, characterized in that the display device comprises:
an apparatus body having a device region;
the display screen of claim 24 overlaid on the device body;
the device area is located below the second display area, and a photosensitive device for collecting light rays through the second display area is arranged in the device area.
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