CN110767708A - Array substrate, mask plate, display panel and display device - Google Patents

Array substrate, mask plate, display panel and display device Download PDF

Info

Publication number
CN110767708A
CN110767708A CN201910099788.9A CN201910099788A CN110767708A CN 110767708 A CN110767708 A CN 110767708A CN 201910099788 A CN201910099788 A CN 201910099788A CN 110767708 A CN110767708 A CN 110767708A
Authority
CN
China
Prior art keywords
light
electrode
region
pixel repeating
repeating units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910099788.9A
Other languages
Chinese (zh)
Other versions
CN110767708B (en
Inventor
余珺
楼均辉
张兵
贾智信
刘如胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunshan Guoxian Photoelectric Co Ltd
Original Assignee
Kunshan Guoxian Photoelectric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunshan Guoxian Photoelectric Co Ltd filed Critical Kunshan Guoxian Photoelectric Co Ltd
Priority to CN201910099788.9A priority Critical patent/CN110767708B/en
Publication of CN110767708A publication Critical patent/CN110767708A/en
Application granted granted Critical
Publication of CN110767708B publication Critical patent/CN110767708B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04Coating on selected surface areas, e.g. using masks
    • C23C14/042Coating on selected surface areas, e.g. using masks using masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/10OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/805Electrodes
    • H10K50/81Anodes
    • H10K50/813Anodes characterised by their shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/805Electrodes
    • H10K50/82Cathodes
    • H10K50/822Cathodes characterised by their shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10Deposition of organic active material
    • H10K71/16Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/166Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask

Landscapes

  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Sustainable Development (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

An array substrate, a mask plate, a display panel and a display device are provided. The array substrate comprises a light-emitting layer, wherein the light-emitting layer comprises a first light-emitting area, a second light-emitting area and a third light-emitting area, and the second light-emitting area is positioned between the first light-emitting area and the third light-emitting area; the first light-emitting area comprises a plurality of first pixel repeating units, the second light-emitting area comprises a plurality of second pixel repeating units, the third light-emitting area comprises a plurality of third pixel repeating units, the first pixel repeating units, the second pixel repeating units and the third pixel repeating units respectively comprise n pixels, n is not less than 1 and is an integer, the pixel density of the third light-emitting area is smaller than that of the first light-emitting area, and the distance between the central axes of the adjacent second pixel repeating units is smaller than that of the central axes of the adjacent third pixel repeating units.

Description

Array substrate, mask plate, display panel and display device
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a mask plate, a display panel and a display device.
Background
With the rapid development of electronic devices, the requirements of users on screen occupation ratio are higher and higher, so that the comprehensive screen display of the electronic devices is concerned more and more in the industry.
Traditional electronic equipment such as cell-phone, panel computer etc. owing to need integrate such as leading camera, listen a section of thick bamboo and infrared sensing element etc. so the accessible sets up camera, earphone and infrared sensing element etc. in fluting region on display panel (Notch), but fluting region is not used for the display screen, like the bang screen among the prior art, or adopts the mode of trompil on the screen, to the electronic equipment who realizes the camera function, external light accessible screen on trompil department get into the photosensitive element who is located the screen below. However, these electronic devices are not all full-screen in the true sense, and cannot display in each area of the whole screen, for example, the camera area cannot display the picture.
Disclosure of Invention
In order to solve the technical problems in the related art, the application provides an array substrate, a mask plate, a display panel and a display device.
According to an embodiment of the present application, there is provided an array substrate, including:
the array substrate is characterized by comprising a light-emitting layer, wherein the light-emitting layer comprises a first light-emitting area, a second light-emitting area and a third light-emitting area, and the second light-emitting area is positioned between the first light-emitting area and the third light-emitting area;
the first light-emitting area comprises a plurality of first pixel repeating units, the second light-emitting area comprises a plurality of second pixel repeating units, the third light-emitting area comprises a plurality of third pixel repeating units, the first pixel repeating units, the second pixel repeating units and the third pixel repeating units respectively comprise n pixels, n is not less than 1 and is an integer, the pixel density of the third light-emitting area is smaller than that of the first light-emitting area, and the distance between the central axes of the adjacent second pixel repeating units is smaller than that of the central axes of the adjacent third pixel repeating units.
Optionally, the first light emitting region is a non-transparent region, and the third light emitting region is a transparent region;
preferably, the pitch between adjacent sub-pixels in the second pixel repeating unit is smaller than the pitch between adjacent sub-pixels in the third pixel repeating unit; and/or
The size of the sub-pixels in the second pixel repeating unit is smaller than the size of the sub-pixels in the third pixel repeating unit.
Optionally, the sub-pixels in adjacent second pixel repeating units have equal or unequal pitches;
preferably, the sizes of the sub-pixels in the adjacent second pixel repeating units are equal or different;
preferably, the sizes of the plurality of second pixel repeating units sequentially increase in a first direction from a side close to the first light emitting region to a side close to the third light emitting region.
Preferably, in a second direction, the size of the second pixel repeating unit is equal to the size of the third pixel repeating unit, and the second direction is perpendicular to the first direction.
Preferably, the plurality of second pixel repeating units are arranged in the same manner as the plurality of third pixel repeating units.
Optionally, the light emitting structures in the plurality of first pixel repeating units, the plurality of second pixel repeating units, and the plurality of third pixel repeating units are manufactured in the same process by using the same mask plate; or the like, or a combination thereof,
the plurality of first pixel repeating units are formed by adopting an evaporation process, the plurality of third pixel repeating units are formed by adopting an ink-jet printing process, and the plurality of second pixel repeating units are formed in the same way as the plurality of first pixel repeating units or the plurality of third pixel repeating units.
Optionally, the method further includes:
a substrate;
the first electrode layer is formed on the substrate, and the light-emitting structure is formed on the first electrode layer;
a second electrode layer formed on the light emitting layer;
the first electrode layer comprises a plurality of rows of first electrode groups arranged corresponding to the third light emitting areas, the plurality of rows of first electrode groups are arranged along a third direction, the third direction is perpendicular to a fourth direction, and the fourth direction is an extending direction of the first electrode groups.
Preferably, each first electrode group comprises at least one first electrode, and the extending directions of the first electrodes in the same first electrode group are the same;
the third light emitting area comprises n colors of light emitting sub-pixels, at least one light emitting sub-pixel is arranged on each first electrode, the light emitting sub-pixels corresponding to the same first electrode are of the same color, the first electrodes of two adjacent first electrode groups are arranged in a staggered mode in the parallel direction of the first electrode groups, the distance between the central axes of the two adjacent first electrode groups is d, the distance between the central axes of the two adjacent first electrode groups corresponding to the light emitting sub-pixels of the same color is smaller than n x d in the parallel direction of the first electrode groups, and the central axes of the first electrode groups are the same as the extending direction of the first electrodes.
Optionally, the first electrode group includes one first electrode, the first electrode includes one electrode block, and each electrode block is provided with a plurality of light-emitting color blocks; or, the first electrode comprises a plurality of electrode blocks, each electrode block is provided with a luminous color block, and the first electrode comprises a connecting part for connecting two adjacent electrode blocks.
Preferably, the projection of the electrode block on the substrate is circular, square, oval or gourd-shaped;
preferably, the projection of the luminous color block on the substrate is circular, square, oval or gourd-shaped
Preferably, in the first electrode group, adjacent first electrodes are staggered from each other in the parallel direction, and the staggered distance is 0.5 times or 1.5 times the width of the first electrodes.
Optionally, the first electrode group includes a plurality of first electrodes, and the colors of the light-emitting color blocks on the plurality of first electrodes of one first electrode group are the same;
preferably, a plurality of first electrodes in the same first electrode group are electrically connected;
preferably, two adjacent first electrode groups are spaced from each other, and the spacing between the two first electrode groups varies in a wave shape.
Preferably, a region of the first electrode layer and/or the second electrode layer corresponding to the third light emitting region is made of a transparent material;
preferably, the light transmittance of the transparent material is greater than or equal to 90%;
preferably, the transparent material comprises one or more of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide and silver-doped indium zinc oxide.
Optionally, the method further includes:
a pixel defining layer formed on the first electrode layer and including a plurality of first pixel defining holes corresponding to the first light emitting areas, a plurality of second pixel defining holes corresponding to the second light emitting areas, and a plurality of third pixel defining holes disposed corresponding to the third light emitting areas, each of the third pixel defining holes corresponding to one or more light emitting sub-pixels for forming the third pixel repeating unit.
Preferably, the pixel defining layer is made of a transparent organic material or a transparent inorganic material.
According to a third aspect of the embodiments of the present application, there is provided a mask blank for forming an array substrate according to any one of the embodiments, including:
a first mask region for forming a first opening of the first light emitting region pixel;
a second mask region for forming a second opening of the second light emitting region pixel;
a third mask region for forming a third opening of the third light-emitting region pixel;
the density of the third openings is smaller than that of the first openings, wherein the first pixel repeating unit comprises n first openings, the second pixel repeating unit comprises n second openings, the third pixel repeating unit comprises n third openings, n is larger than or equal to 1 and is an integer, and the distance between the central axes of the adjacent second pixel repeating units is smaller than that between the central axes of the adjacent third pixel repeating units;
a non-functional mask region comprising a plurality of through holes and/or a plurality of recesses, the non-functional mask region being located in a region of at least one of:
the non-functional mask region is located on a side of the third mask region that is distal from the second mask region;
the non-functional mask region is located on a side of the first mask region that is distal from the second mask region;
the non-functional mask area is positioned in the junction area of the first mask area and the second mask area;
the non-functional mask area is positioned in the junction area of the third mask area and the second mask area;
the non-functional mask region is located in the third mask region;
the non-functional mask region is located in the second mask region;
preferably, at least a part of the non-functional mask region is located on a side of the third mask region away from the second mask region, and the size of the plurality of holes and/or the plurality of recesses included in the non-functional mask region decreases sequentially from the side close to the third mask region to the side away from the third mask region;
preferably, at least a part of the non-functional mask region is located on a side of the first mask region away from the second mask region, and the size of the plurality of holes and/or the plurality of recesses included in the non-functional mask region increases in order from the side close to the first mask region to the side away from the first mask region.
According to a third aspect of embodiments of the present application, there is provided a display panel including:
in the array substrate according to any of the above embodiments, the third light emitting area of the array substrate is a transparent area;
and the packaging layer is packaged on one side of the array substrate, which is far away from the array substrate, and a photosensitive device can be arranged below the third light emitting area.
Preferably, at least part of the third light emitting area on the array substrate is surrounded by the second light emitting area;
preferably, the first light-emitting area is a non-transparent display area, and the third light-emitting area is a transparent display area;
preferably, the encapsulation layer comprises a polarizer, and the polarizer covers the first light-emitting area; or, the polarizer covers at least a part of the first light-emitting area and the second light-emitting area, and does not cover the third light-emitting area.
According to a fourth aspect of embodiments of the present application, there is provided a display device including:
an apparatus body having a device region;
the display panel according to any one of the above embodiments, wherein the display panel covers the device body;
the device region is located below the third light emitting region and comprises a photosensitive device which emits or collects light through the third light emitting region.
Preferably, the photosensitive device comprises at least one of:
camera, light sensor, light emitter.
According to the embodiment, the second light emitting area is arranged between the first light emitting area and the third light emitting area, the distance between the central axes of the adjacent second pixel repeating units is smaller than that between the central axes of the adjacent third pixel repeating units, the occupied area of the second pixel repeating units is reduced, the integral second pixel repeating units can be arranged in the second light emitting area, dark lines are avoided, and the display effect is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a pixel arrangement diagram in the related art.
Fig. 2 is a schematic structural diagram of an array substrate according to an exemplary embodiment of the present application.
Fig. 3 is a schematic diagram of the structure of a light emitting layer shown in the present application according to an exemplary embodiment.
Fig. 4 is a schematic diagram of another light emitting layer structure shown in the present application according to an exemplary embodiment.
Fig. 5 is a schematic diagram of a second light emitting region shown in the present application according to an exemplary embodiment.
Fig. 6 is a schematic cross-sectional view of an array substrate according to an exemplary embodiment of the present application.
Fig. 7 is a schematic diagram of a third light emitting region shown in accordance with an exemplary embodiment of the present application.
Fig. 8 is a schematic diagram of another third light emitting region shown in accordance with an exemplary embodiment of the present application.
Fig. 9 is a schematic diagram of yet another third light emitting region shown in accordance with an exemplary embodiment of the present application.
Fig. 10 is a structural illustration of yet another third light emitting region illustrated in accordance with an exemplary embodiment of the present application.
Fig. 11 is a cross-sectional schematic view of another array substrate shown in the present application according to an exemplary embodiment.
Fig. 12 is a schematic structural diagram of another array substrate according to an exemplary embodiment of the present application.
Fig. 13-18 are schematic structural views of a mask blank shown in the present application according to an exemplary embodiment.
FIG. 19 is a cross-sectional schematic view of a display panel shown in accordance with an exemplary embodiment of the present application.
FIG. 20 is a cross-sectional schematic view of a display device shown in the present application according to an exemplary embodiment.
Fig. 21 is a schematic diagram of a structure of a display device according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present application. The word "if" as used herein may be interpreted as "at … …" or "at … …" or "in response to a determination", depending on the context.
In the related art, as shown in fig. 1, a designer may set a first area a and a second area B on an array substrate as shown in fig. 1 according to requirements of different display areas on display effects and light transmission performance, and the pixel densities of the first area a and the second area B are different. However, since the pixel densities of the first area B and the second area B are different, a complete pixel repeating unit cannot be designed for the width of the connecting area between the first area a and the second area B, so that an area which cannot emit light exists between the first area a and the second area B, and for the display panel, the area is shown as a dark line and cannot be used for displaying, so that a display gap is caused, and the display effect is poor.
Based on this, the present application proposes an array substrate as shown in fig. 2 to solve the problem of dark lines in the related art. Specifically, as shown in fig. 2 and 3, the array substrate 100 may include a light emitting layer 101, and the light emitting layer 101 may include a first light emitting region 1, a second light emitting region 2, and a third light emitting region 3, where the second light emitting region 2 is located between the first light emitting region 1 and the third light emitting region 3. The first light emitting region 1 may include a plurality of first pixel repeating units 11, the second light emitting region 2 may include a plurality of second pixel repeating units 21, and the third light emitting region 3 may include a plurality of third pixel repeating units 31. Further, the first pixel repeating unit 11, the second pixel repeating unit 21, and the third pixel repeating unit 31 may include n pixels, respectively, n ≧ 1 and n is an integer. For example, as shown in fig. 3, when the first pixel repeating unit 11, the second pixel repeating unit 21, and the third pixel repeating unit 31 are respectively configured to include three kinds of sub-pixels of red, green, and blue, one pixel repeating unit may be arranged. Of course, only the pixel repeating unit including three colors is taken as an example for description, and in other embodiments, four or more than four pixels with different colors may be included, which is not limited in the present application.
In the present embodiment, the pixel density of the first light emitting region 1 may be set to be greater than the pixel density of the third light emitting region 3. Therefore, in order to solve the dark line problem in the related art, the pitch between the adjacent second pixel repeating units 21 may be made smaller than the pitch between the adjacent third pixel repeating units 31. The pitch may be a distance between central axes of adjacent pixel repeating units. For example, as shown in fig. 3, taking the second pixel repeating unit 21A, the second pixel repeating unit 21B, the third pixel repeating unit 31A and the third pixel repeating unit 31B as an example, the distance between the second pixel repeating unit 21A and the second pixel repeating unit 21B is D1, the distance between the third pixel repeating unit 31A and the third pixel repeating unit 31B is D2, and D2 is greater than D1, so that the distance between each second pixel repeating unit can be reduced, and a complete pixel unit can be arranged between the first light emitting region 1 and the third light emitting region 3 to solve the problem of displaying dark lines.
According to the embodiment, the second light emitting area 2 is arranged between the first light emitting area 1 and the third light emitting area 3, the distance between the central axes of the adjacent second pixel repeating units 21 is smaller than the distance between the central axes of the adjacent third pixel repeating units 31, the area occupied by the second pixel repeating units 21 is reduced, the integral second pixel repeating units 21 can be arranged in the second light emitting area 2, dark lines are avoided, and the display effect is improved. The first light-emitting area 1 may be set as a non-transparent area, and the third light-emitting area 3 may be set as a transparent area, based on which, when the array substrate 100 is configured to an electronic device, the image pickup head or the photosensitive structure may be set corresponding to the third light-emitting area 3, so that light can be transmitted while display is ensured, which is beneficial to improving screen occupation ratio.
The reduction of the pitch between the adjacent second pixel repeating units may be, as shown in fig. 3, that the size of the sub-pixels in the second pixel repeating unit is smaller than the size of the sub-pixels in the third pixel repeating unit; alternatively, as shown in fig. 4, the pitch between adjacent sub-pixels in the second pixel repeating unit may be smaller than the pitch between adjacent sub-pixels in the third pixel repeating unit; in another embodiment, the size of the sub-pixels in the second pixel repeating unit may be smaller than the size of the sub-pixels in the third pixel repeating unit, and the distance between adjacent sub-pixels in the second pixel repeating unit may be smaller than the distance between adjacent sub-pixels in the third pixel repeating unit, which is not limited in this application. In the above embodiments, the pixel arrangement on the first light emitting region 1, the second light emitting region 2, and the third light emitting region 3 in the direction indicated by the arrow a on the array substrate 100 is exemplified. In fact, in the direction perpendicular to the arrow a, the arrangement of the pixels can also be referred to as shown in fig. 3 and 4, and will not be described again here.
In the above-described respective embodiments, the pitches between the sub-pixels in the adjacent second pixel repeating units 21 may be set to be equal. In other words, the second pixel repeating units 21 in the second light emitting region 2 are uniformly arranged. In another embodiment, further to dispose an integer number of second pixel repeating units 21 in the second light emitting region 2, as shown in fig. 5, the pitches between the sub-pixels in the adjacent second pixel repeating units 21 may be set to be unequal, which is beneficial to adjust the pitch between the central axes of the adjacent second pixel repeating units 21. When the distances between the central axes of the adjacent second pixel repeating units 21 are not equal, the minimum value of the central axes of the adjacent second pixel repeating units 21 may be smaller than the distance between the central axes of the adjacent third pixel repeating units 31.
For example, as shown in fig. 5, the sizes of the sub-pixels in the adjacent second pixel repeating units 21 may be set to be unequal and the pitches between the sub-pixels may be equal, so that the pitches between the central axes of the adjacent second pixel repeating units 21 are unequal. For example, as shown in fig. 5, taking the second pixel repeating unit 21A, the second pixel repeating unit 21B and the second pixel repeating unit 21C as an example, the size of the sub-pixels in the second pixel repeating unit 21A is smaller than the size of the sub-pixels in the second pixel repeating unit 21B, and the size of the sub-pixels in the second pixel repeating unit 21B is smaller than the size of the sub-pixels in the second pixel repeating unit 21C. Therefore, a spacing D11 between the central axes of the second pixel repeating unit 21A and the second pixel repeating unit 21B is smaller than a spacing D12 between the second pixel repeating unit 21B and the second pixel repeating unit 21C. Alternatively, in another embodiment, the sizes of the sub-pixels in the adjacent second pixel repeating units 21 may be set to be equal, and the pitches between the sub-pixels may be different, so that the pitches between the axes of the adjacent second pixel repeating units 21 may be different. And will not be described in detail herein.
In this embodiment, the size inequality of the second pixel repeating unit 21 may be irregularly changed or may be regularly changed. For example, since the pixel density of the first light emitting region 1 is less than the pixel density of the third light emitting regions 3 and 1, that is, the size of the first pixel repeating unit is less than the size of the third pixel repeating unit 31, as shown in fig. 5, the sizes of the second pixel repeating units sequentially increase in a direction from a side close to the first light emitting region 1 to a side close to the third light emitting region 3, that is, in a direction indicated by an arrow a in fig. 5, so that the transition between the first light emitting region 1 and the third light emitting region 3 is gradual, thereby avoiding a sudden change in display and improving the display effect. Further, the lengths of the plurality of second pixel repeating units increase in the direction indicated by the arrow a, and the sizes of the plurality of second pixel repeating units are equal in the direction perpendicular to the arrow a.
Based on the above embodiments, the light emitting structures in the plurality of first pixel repeating units 11, the plurality of second pixel repeating units 21, and the plurality of third pixel repeating units 31 may be manufactured in the same process by using the same mask, thereby reducing the number of process steps. Or, since the pixel densities of the first light emitting region 1 and the third light emitting region 3 are different, when the first pixel repeating unit 11 and the third pixel repeating unit 3 are prepared by using the same mask, the opening specifications of the mask region corresponding to the first pixel repeating unit 11 and the mask region corresponding to the third pixel repeating unit 3 are different, so that the amount of deformation is increased during screening, and a color mixing risk is generated. Therefore, in another embodiment, the plurality of first pixel repeating units 11 may be formed by an evaporation process and a plurality of third pixel repeating units formed by an inkjet printing process, so that on one hand, the color mixing risk can be reduced, and on the other hand, the number of mask plates can be reduced, thereby reducing the production cost. In this embodiment, the plurality of second pixel repeating units 21 may be formed in the same manner as the plurality of first pixel repeating units 11, i.e., also by using an evaporation process; alternatively, the plurality of second pixel repeating units 21 may be formed in the same manner as the plurality of third pixel repeating units 31, i.e., by using an inkjet process, which is not limited in this application.
Based on the technical solution of the present application, as shown in fig. 6, the array substrate 100 may further include a substrate 102, a first electrode layer 103, and a second electrode layer 104. Here, the first electrode layer 103 is formed on the substrate 102, the light emitting structures of the first light emitting region 1, the second light emitting region 2, and the third light emitting region 3 are formed on the first electrode layer 103, and the second electrode layer 104 is formed on the light emitting layer 101. As shown in fig. 7, the first electrode layer 103 may include a plurality of rows of first electrode groups 4 disposed corresponding to the third light emitting areas 3, the first electrode groups 4 being arranged along a third direction X, the third direction X being perpendicular to a fourth direction Y, the fourth direction Y being an extending direction of the first electrode groups 4.
Referring to fig. 7, in an embodiment, each first electrode group 4 includes one first electrode 41, and each first electrode 41 extends along the fourth direction Y, and of course, the first electrode group 4 also extends along the fourth direction. Optionally, the third direction X is perpendicular to a fourth direction Y, the fourth direction Y is defined as a length direction of the first electrode 41, and the third direction is defined as a width direction of the first electrode. Each first electrode 41 corresponds to a plurality of light emitting structures 5, and optionally, the color of the light emitting structures on one first electrode is the same (for example, the light emitting structures 5A corresponding to the first electrode 41A are all red), and the color of the light emitting structures on the plurality of first electrodes 41 of one first electrode group 4 is also the same. For example, the first electrode 41A corresponds to the plurality of red light emitting structures 5A, the first electrode 41B corresponds to the plurality of green light emitting structures 5B, the first electrode 41C corresponds to the plurality of blue light emitting structures 5C, and the first electrode 41D corresponds to the plurality of red light emitting structures 5D.
In the third direction X, the first electrodes 41A of the first electrode group 4A and the first electrodes 41B of the first electrode group 4B are arranged in a staggered manner, i.e., two first electrodes of adjacent first electrode groups are arranged in a staggered manner. Optionally, the offset distance is 0.5 times the width of the first electrode. In the third direction X, the distances between the first electrode groups (for example, the first electrodes 41A and the first electrodes 41D) corresponding to the two adjacent light-emitting structures of the same color are reduced, and accordingly, the distances between the adjacent light-emitting structures of the same color are also reduced. For example, the distance between the red light emitting structure 5A corresponding to the first electrode 41A and the green light emitting structure 5B corresponding to the first electrode 41B is decreased, and the distance between the red light emitting structure 5A corresponding to the first electrode 41A and the red light emitting structure 5C corresponding to the first electrode 41D is decreased or eliminated when the third light emitting region 3 is a transparent region, so as to improve the display effect by reducing or eliminating the vertical stripes generated between the light emitting structures of the same color corresponding to the adjacent first electrode groups.
The distance between the central axis L1 of the first electrode group 4A (in this embodiment, the central axis of the first electrode 41, the same applies hereinafter) and the central axis L2 of the adjacent first electrode group 4B is D, the distance between the central axis L1 of the first electrode group 4A and the central axis L3 of the first electrode group 4D corresponding to the adjacent red light-emitting structure is less than 3D, as can be seen by analogy, the distance between the central axes of the first electrode groups corresponding to the two adjacent light-emitting structures of the same color is less than n × D, and n is the number of colors of the light-emitting structure. Wherein the aforementioned respective central axes L1, L2, L3 all extend in the fourth direction Y. It is noted that the first electrode may be of an asymmetric configuration and the central axis may represent an approximate bisector of the first electrode group.
In two adjacent first electrode groups, taking the first electrode group 4A and the first electrode group 4B as an example, the first electrode group 4A and the first electrode group 4B (i.e., the first electrode 41A and the first electrode 41B) are spaced apart from each other, and the distances between the two are always the same, which is beneficial to simplifying the patterning process of the first electrode layer; in other embodiments, the two may be spaced apart unequally to reduce the effects of diffraction. In this embodiment, since the gap between the first electrode group 4A and the first electrode group 4B is not a straight line, it is advantageous to further reduce diffraction.
Alternatively, in this embodiment, each first electrode 41 includes an electrode block 411, and in this embodiment, the first electrode 41 may be understood as a monolithic electrode block. Each electrode block 411 corresponds to a plurality of light emitting structures 5, so that the electrode blocks 411 corresponding to the plurality of light emitting structures can be driven by the same driving circuit, thereby simplifying the structure of the driving circuit and reducing the cost.
In this embodiment, the projection of the electrode block 411 on the substrate is gourd-shaped, and the projection of the light emitting structure on the substrate 1 is circular. The gourd shape can be understood as: the shape of the electrode block 411 that is alternately increased and decreased in size in the extending direction (i.e., the extending direction of the first electrode 41, i.e., the fourth direction Y) is similar to the shape of a gourd, and of course, the gourd shape here corresponds to the shape of one or more gourds connected end to end and connected in series. The projection of the light emitting structure on the substrate 1 may be a circle (as shown in fig. 7), or may be a square (as shown in fig. 8), and in other embodiments, the projection may also be an ellipse or a dumbbell, which is not described in detail.
In another embodiment, referring to fig. 9, each first electrode group includes a first electrode 42, the first electrode 42 includes a plurality of electrode blocks 421 and a connection portion 422 connecting adjacent electrode blocks, and the connection portion 422 may be formed on the same layer as the first electrode 42 or may be a connection line routed through other film layers. Each first electrode block 421 corresponds to one light-emitting structure 5, and the projections of the electrode blocks 421 on the substrate 1 are all circular. Of course, in other embodiments, the projection of the electrode block 421 on the substrate 1 may also be in the shape of a circle, a square, an ellipse, etc. The structure other than the connection portion is substantially the same as that of the embodiment shown in fig. 5, and will not be described in detail.
Referring to fig. 10, in an embodiment, projections of the first electrode layer 103 and the light emitting layer 101 on the substrate are as shown in fig. 10, the first electrode layer includes a plurality of first electrode groups 6 arranged along a third direction X1, and the first electrode groups 6 extend along a fourth direction Y1. It should be noted that the third direction X1 and the fourth direction Y1 are different from the third direction X and the fourth direction Y in the above embodiments.
In the present embodiment, each first electrode group 6 includes two first electrodes 61, and in other embodiments, the first electrode group 6 may include a plurality of first electrodes 61. The first electrodes 61 extend in the fourth direction Y1, and the first electrode group 6 also extends in the fourth direction Y1. Each of the first electrodes 61 includes a plurality of electrode blocks 611 and a connecting portion 612 connecting adjacent electrode blocks 611, and the connecting portion 612 connects electrode blocks of different first electrodes (e.g., the first electrode 61A and the first electrode 61B). Each first electrode 61 corresponds to a plurality of light emitting structures, each electrode block 611 corresponds to one light emitting structure, the light emitting structures corresponding to the same first electrode 61 are of the same color, and the light emitting structures corresponding to the same first electrode group 6 are of the same color.
Referring to fig. 10, in the third direction X1, the first electrodes of two adjacent first electrode groups are staggered, for example, the first electrodes 61B of the first electrode group 6A and the first electrodes 61C of the second electrode group 6B are staggered, and in the third direction X1, the distance between the first electrode groups (for example, the first electrodes 61B and the first electrodes 61E) corresponding to two adjacent light emitting structures of the same color is reduced, and correspondingly, the distance between the adjacent light emitting structures of the same color is also reduced, so that when the third light emitting region 3 is a transparent display region, the vertical stripes between the light emitting structures of the same color corresponding to the adjacent first electrode groups are reduced or eliminated. Alternatively, in the third direction X1, adjacent first electrodes are staggered from each other, for example, the first electrode 61B and the first electrode 61C, and the staggered distance is 1.5 times the width of the first electrode 61B (or 61C). The first electrode 61B and the first electrode 61A are aligned in the third direction in the prior art, and the first electrode 61B and the first electrode 61A are located at the positions shown in fig. 10 in this embodiment, so the offset distance is 1.5 times the width of the first electrode.
Due to the staggered arrangement of the first electrodes (e.g., the first electrode 61B and the first electrode 61C) of the two first electrode groups, the distance between the first electrode 21B of the corresponding first electrode group 6A and the first electrode 61E of the first electrode group 6C is correspondingly reduced, the distance between the red pixel 51 corresponding to the first electrode 61B and the red pixel 52 corresponding to the first electrode 61E is also correspondingly reduced, and the streaks of the red pixel 51 and the red pixel 52 are reduced or eliminated when the third light-emitting region 3 is a transparent region. In this embodiment, the central axis of the first electrode group is located between the two first electrodes. The distance between the central axis line L4 of the first electrode group 6A and the central axis line L5 of the first electrode group 6B is d1, the distance between the central axis line L4 of the first electrode group 6A and the central axis line L6 of the first electrode group 6C is less than 3 × d1, corresponding to the analogy, the distance between the central axis lines of the first electrode groups corresponding to two adjacent light-emitting structures of the same color is less than n × d1, and n is the number of colors of the light-emitting structures.
In the above embodiments, the regions of the first electrode layer 103 and/or the second electrode layer 104 corresponding to the third light emitting regions and 3 are made of transparent materials, and the transparent material layer may include one or more of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide; the metal layer 42 may include an alloy made of one or more of Mg, Ag, and AL, such as MgAg alloy.
The second electrode layer 104 may further include a second electrode disposed corresponding to the third light emitting region 3, and the second electrode is a planar electrode, preferably, the second electrode is a single-layer structure or a stacked-layer structure, when the second electrode is a single-layer structure, the second electrode is a single-layer metal layer, or a single-layer metal mixture layer, or a single-layer transparent metal oxide layer, and when the second electrode is a stacked-layer structure, the second electrode is a stack of a transparent metal oxide layer and a metal layer, or a stack of a transparent metal oxide layer and a metal mixture layer;
preferably, when the second electrode material is doped with metal, the thickness of the second electrode is greater than or equal to 100 angstroms, and when the thickness of the second electrode is less than or equal to 500 angstroms, the thickness of the second electrode is entirely continuous, and the transparency of the second electrode is greater than 40%;
preferably, when the second electrode material is doped with metal, the thickness of the second electrode is greater than or equal to 100 angstroms, and when the thickness of the second electrode is less than or equal to 200 angstroms, the thickness of the second electrode is entirely continuous, and the transparency of the second electrode is greater than 40%;
preferably, when the second electrode material is doped with metal, the thickness of the second electrode is greater than or equal to 50 angstroms, and when the thickness of the second electrode is less than or equal to 200 angstroms, the thickness of the second electrode is entirely continuous, and the transparency of the second electrode is greater than 50%;
preferably, when the second electrode material is doped with metal, the thickness of the second electrode is greater than or equal to 50 angstroms, and when the thickness of the second electrode is less than or equal to 200 angstroms, the thickness of the second electrode is entirely continuous, and the transparency of the second electrode is greater than 60%;
preferably, when the second electrode is a single-layer structure, the single-layer metal layer is made of Al or Ag, the single-layer metal mixture layer is made of MgAg or a metal mixture material doped with Al, and the transparent metal oxide is ITO or IZO.
In the above embodiments, as shown in fig. 11 and 12, the array substrate 100 may further include a pixel defining layer 105, and the pixel defining layer 105 is formed on the first electrode layer 103 and includes a first pixel defining hole 1051 disposed corresponding to the first light emitting region 1, a second pixel defining hole 1052 disposed corresponding to the second light emitting region 2, and a third pixel defining hole 1053 disposed corresponding to the third light emitting region 3. A plurality of light-emitting sub-pixels may be correspondingly formed in each third pixel defining hole 1053; alternatively, in another embodiment, a single light-emitting sub-pixel may also be formed within each third pixel defining aperture 1053, reducing the risk of color mixing between adjacent light-emitting sub-pixels. The pixel defining layer 105 may be made of a transparent organic material; alternatively, the pixel defining layer 105 may be made of a transparent inorganic material; alternatively, a section of the pixel defining layer 105 corresponding to the third light emitting region 3 is made of a transparent material, and a section corresponding to the second light emitting region 2 is made of a non-transparent material, which is not limited in this application.
According to a second aspect of the present application, as shown in fig. 13, there is further provided a mask plate 200, which may be used to form the array substrate 100 described in any one of the above embodiments. In particular, the mask plate 200 may comprise a first mask region 201, a second mask region 202, a third mask region 203 and a non-functional mask region 204. The first mask region 201 can be used to form a first opening 2011 of a first light emitting region 1 pixel, the second mask region 202 can be used to form a first opening 2021 of a second light emitting region 2 pixel, and the third mask region 203 can be used to form a third opening 2031 of a third light emitting region 3 pixel, the density of the third opening 2031 is less than that of the first opening 2021, wherein the first pixel repeating unit includes n first openings 2011, the second pixel repeating unit includes n second openings 2021, the third pixel repeating unit includes n third openings 2031, n is greater than or equal to 1 and is an integer, and the distance between the central axes of the adjacent second pixel repeating units is less than that between the central axes of the adjacent third pixel repeating units; the non-functional mask region 204 may include a plurality of through holes or a plurality of recesses, or may include both through holes and recesses to buffer stress and reduce deformation through the through holes and recesses.
In one of the embodiments, as shown in fig. 13, since the deformation amount of the mask plates on both sides is easily large in the area where the opening size is excessively increased, the non-functional mask area 204 may be located at the boundary area between the second mask area 202 and the third mask area 203.
In a second embodiment, as shown in FIG. 14, the non-functional mask region 204 may also be located at the interface area between the second mask region 202 and the first mask region 201 to buffer the deformation stress.
In a third embodiment, as shown in FIG. 15, the non-functional mask region 204 may also be located within the third mask region 203 to buffer the stress of the third mask region 203.
In a fourth embodiment, as shown in FIG. 16, the non-functional mask region 204 may also be located within the second mask region 202 to buffer the stress of the second mask region 202.
In the fifth embodiment, as shown in fig. 17, the non-functional mask region 204 may also be located on the third mask region 203 on the side away from the second mask region 202 to balance the stress of the entire mask blank 200. Further, as shown in fig. 17, the size of the plurality of holes and/or the plurality of recesses included in the non-functional mask region 204 decreases sequentially from the side close to the third mask region 203 to the side far from the third mask region 203, so that the whole mask plate 200 is formed into a structure form from large to small and then from small to large, which is beneficial to buffering the stress.
In the sixth embodiment, as shown in fig. 18, the non-functional mask region 204 may also be located on the first mask region 201 on the side away from the second mask region 202 to balance the stress of the entire mask blank 200. Further, from the side close to the first mask region 201 to the side far from the first mask region 201, the area size of the plurality of holes and/or the plurality of recesses included in the non-functional mask region 204 increases in sequence, so that the whole mask plate 200 forms a structure form from small to large and then from large to small, which is beneficial to buffering stress.
It should be noted that the embodiments shown in fig. 13 to 18 can be combined with each other. For example, while the non-functional mask region 204 is provided between the first mask region 201 and the second mask region 202, the non-functional mask region 204 may also be provided within the third mask region 203; alternatively, while the non-functional mask region 204 is provided between the second mask region 202 and the third mask region 203, the non-functional mask region may be provided on the third mask region 203 on the side away from the second mask region 202. Various combination modes may exist, and are not described in detail herein.
In the embodiment of the present application, as shown in fig. 19, a display panel 300 is further provided, where the display panel 300 may include an encapsulation layer 301 and the array substrate 100 described in any of the above embodiments, and the third light emitting region 3 on the array substrate 200 is a transparent region. The encapsulation layer 301 is located on a side of the array substrate 100 away from the substrate. Based on this, a transparent display region disposed corresponding to the third light emitting region 31 may be formed on the display panel 300. And, a light sensing device may be disposed below the transparent display area, and the light sensing device may collect external light through the transparent display area or emit light to the outside. Specifically, when the photosensitive device is in an operating state, the transparent display region may be switched to a non-display state, and when the photosensitive device is in an off state, the transparent display region may be switched to a display state. The encapsulation layer 301 may include a polarizer (not shown), and the polarizer may cover a region corresponding to the first light emitting region 1 and not cover a region corresponding to the third light emitting region 3, so as to prevent the polarizer from affecting external incident light or light emitted from an electronic device equipped with the display panel 300. Specifically, the polarizer covers at least a portion of the first light emitting region 1 and the second light emitting region 2, and does not cover the third light emitting region 3.
The embodiment of the present application further provides a display device 400 as shown in fig. 20, where the display device 400 may include an apparatus body 401 and the display panel 300 according to any of the above embodiments, and the display panel 300 is disposed on the apparatus body 401 and is connected to the apparatus body 401. The display panel 300 may be the display panel of any of the above embodiments, and is used to display static or dynamic pictures.
In this embodiment, as shown in fig. 21, the apparatus body 401 may include a device region 4011, and the device region 4011 may be provided with a photosensitive device such as the camera 500 and a photosensor. At this time, the transparent display region of the display panel 300 is disposed corresponding to the device region 4011 so that the above-described photosensitive devices such as the camera 500 and the photosensor can perform operations such as collecting external light through the first light emitting region. Because the display panel in the first light-emitting area can effectively improve the diffraction phenomenon that external light transmits the first light-emitting area and produces to can effectively promote the quality that camera 500 shot the image on the display device, avoid leading to the image distortion of shooing because of the diffraction, also can promote the precision and the sensitivity of light sensor sensing external light simultaneously.
The display device can be any product or component with a display function, such as a liquid crystal display device, electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
Those skilled in the art will appreciate that the drawings are merely schematic representations of one preferred embodiment and that the blocks or flow diagrams in the drawings are not necessarily required to practice the present application. The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. The array substrate is characterized by comprising a light-emitting layer, wherein the light-emitting layer comprises a first light-emitting area, a second light-emitting area and a third light-emitting area, and the second light-emitting area is positioned between the first light-emitting area and the third light-emitting area;
the first light-emitting area comprises a plurality of first pixel repeating units, the second light-emitting area comprises a plurality of second pixel repeating units, the third light-emitting area comprises a plurality of third pixel repeating units, the first pixel repeating units, the second pixel repeating units and the third pixel repeating units respectively comprise n pixels, n is not less than 1 and is an integer, the pixel density of the third light-emitting area is smaller than that of the first light-emitting area, and the distance between the central axes of the adjacent second pixel repeating units is smaller than that of the central axes of the adjacent third pixel repeating units.
2. The array substrate of claim 1, wherein the first light-emitting region is a non-transparent region and the third light-emitting region is a transparent region;
preferably, the pitch between adjacent sub-pixels in the second pixel repeating unit is smaller than the pitch between adjacent sub-pixels in the third pixel repeating unit; and/or
The size of the sub-pixels in the second pixel repeating unit is smaller than the size of the sub-pixels in the third pixel repeating unit.
3. The array substrate of claim 1, wherein the sub-pixels in adjacent second pixel repeating units have equal or unequal pitches;
preferably, the sizes of the sub-pixels in the adjacent second pixel repeating units are equal or different;
preferably, the sizes of the second pixel repeating units are sequentially increased in a first direction from a side close to the first light emitting area to a side close to the third light emitting area;
preferably, in a second direction, the size of the second pixel repeating unit is equal to the size of the third pixel repeating unit, and the second direction is perpendicular to the first direction;
preferably, the plurality of second pixel repeating units are arranged in the same manner as the plurality of third pixel repeating units.
4. The array substrate of claim 1, wherein the light emitting structures in the first, second, and third pixel repeating units are fabricated in a same process using a same mask; or,
the plurality of first pixel repeating units are formed by adopting an evaporation process, the plurality of third pixel repeating units are formed by adopting an ink-jet printing process, and the plurality of second pixel repeating units are formed in the same way as the plurality of first pixel repeating units or the plurality of third pixel repeating units.
5. The array substrate of claim 1, further comprising:
a substrate;
the first electrode layer is formed on the substrate, and the light-emitting structure is formed on the first electrode layer;
a second electrode layer formed on the light emitting layer;
wherein the first electrode layer includes a plurality of rows of first electrode groups arranged corresponding to the third light emitting regions, the plurality of rows of first electrode groups being arranged in a third direction, the third direction being perpendicular to a fourth direction, the fourth direction being an extending direction of the first electrode groups;
preferably, each first electrode group comprises at least one first electrode, and the extending directions of the first electrodes in the same first electrode group are the same;
the third light-emitting area comprises light-emitting sub-pixels with n colors, at least one light-emitting sub-pixel is arranged on each first electrode, the light-emitting sub-pixels corresponding to the same first electrode are of the same color, and the first electrodes of two adjacent first electrode groups are arranged in a staggered mode in the parallel direction of the first electrode groups.
6. The array substrate of claim 5, wherein the first electrode set comprises one first electrode, the first electrode comprises one electrode block, and each electrode block is provided with a plurality of light-emitting color blocks; or the first electrode comprises a plurality of electrode blocks, each electrode block is provided with a luminous color block, and the first electrode comprises a connecting part for connecting two adjacent electrode blocks;
preferably, the projection of the electrode block on the substrate is circular, square, oval or gourd-shaped;
preferably, the projection of the luminous color block on the substrate is circular, square, oval or gourd-shaped;
preferably, in the first electrode group, adjacent first electrodes are staggered from each other in the parallel direction, and the staggered distance is 0.5 times or 1.5 times the width of the first electrodes.
7. The array substrate of claim 5, wherein the first electrode set comprises a plurality of first electrodes, and the colors of the light-emitting color blocks on the plurality of first electrodes of one first electrode set are the same;
preferably, a plurality of first electrodes in the same first electrode group are electrically connected;
preferably, two adjacent first electrode groups are spaced from each other, and the spacing between the two first electrode groups changes in a wave shape;
preferably, a region of the first electrode layer and/or the second electrode layer corresponding to the third light emitting region is made of a transparent material;
preferably, the light transmittance of the transparent material is greater than or equal to 90%;
preferably, the transparent material includes one or more of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide.
8. A mask plate for forming the array substrate according to any one of claims 1 to 7, comprising:
a first mask region for forming a first opening of the first light emitting region pixel;
a second mask region for forming a second opening of the second light emitting region pixel;
a third mask region for forming a third opening of the third light-emitting region pixel;
the density of the third openings is smaller than that of the first openings, wherein the first pixel repeating unit comprises n first openings, the second pixel repeating unit comprises n second openings, the third pixel repeating unit comprises n third openings, n is larger than or equal to 1 and is an integer, and the distance between the central axes of the adjacent second pixel repeating units is smaller than that between the central axes of the adjacent third pixel repeating units;
a non-functional mask region comprising a plurality of through holes and/or a plurality of recesses, the non-functional mask region being located in a region of at least one of:
the non-functional mask region is located on a side of the third mask region that is distal from the second mask region;
the non-functional mask region is located on a side of the first mask region that is distal from the second mask region;
the non-functional mask area is positioned in the junction area of the first mask area and the second mask area;
the non-functional mask area is positioned in the junction area of the third mask area and the second mask area;
the non-functional mask region is located in the third mask region;
the non-functional mask region is located in the second mask region;
preferably, at least a part of the non-functional mask region is located on a side of the third mask region away from the second mask region, and the size of the plurality of holes and/or the plurality of recesses included in the non-functional mask region decreases sequentially from the side close to the third mask region to the side away from the third mask region;
preferably, at least a part of the non-functional mask region is located on a side of the first mask region away from the second mask region, and the size of the plurality of holes and/or the plurality of recesses included in the non-functional mask region increases in order from the side close to the first mask region to the side away from the first mask region.
9. A display panel, comprising:
the array substrate as claimed in any one of claims 1 to 7, wherein the third light emitting region of the array substrate is a transparent region;
the packaging layer is packaged on one side, far away from the array substrate, of the array substrate, and a photosensitive device can be arranged below the third light emitting area;
preferably, at least part of the third light emitting area on the array substrate is surrounded by the second light emitting area;
preferably, the first light-emitting area is a non-transparent display area, and the third light-emitting area is a transparent display area;
preferably, the encapsulation layer comprises a polarizer, and the polarizer covers the first light-emitting area; or the polarizer covers at least one part of the first light-emitting area and the second light-emitting area, and does not cover the third light-emitting area.
10. A display device, comprising:
an apparatus body having a device region;
the display panel according to any one of claims 9, which is overlaid on the device body;
the device region is positioned below the third light emitting region and comprises a photosensitive device which emits or collects light through the third light emitting region;
preferably, the photosensitive device comprises at least one of:
camera, light sensor, light emitter.
CN201910099788.9A 2019-01-31 2019-01-31 Array substrate, mask plate, display panel and display device Active CN110767708B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910099788.9A CN110767708B (en) 2019-01-31 2019-01-31 Array substrate, mask plate, display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910099788.9A CN110767708B (en) 2019-01-31 2019-01-31 Array substrate, mask plate, display panel and display device

Publications (2)

Publication Number Publication Date
CN110767708A true CN110767708A (en) 2020-02-07
CN110767708B CN110767708B (en) 2022-05-10

Family

ID=69328657

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910099788.9A Active CN110767708B (en) 2019-01-31 2019-01-31 Array substrate, mask plate, display panel and display device

Country Status (1)

Country Link
CN (1) CN110767708B (en)

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111312776A (en) * 2020-02-26 2020-06-19 深圳市华星光电半导体显示技术有限公司 Display panel and preparation method thereof
CN111341936A (en) * 2020-03-10 2020-06-26 昆山国显光电有限公司 Display panel and display device
CN112258987A (en) * 2020-10-23 2021-01-22 合肥维信诺科技有限公司 Light-transmitting display panel and display device
US11043636B2 (en) 2017-05-17 2021-06-22 Oti Lumionics Inc. Method for selectively depositing a conductive coating over a patterning coating and device including a conductive coating
US11088327B2 (en) 2015-10-26 2021-08-10 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
CN113745271A (en) * 2020-05-29 2021-12-03 华为技术有限公司 Display panel and display device
CN114284322A (en) * 2021-12-16 2022-04-05 武汉华星光电半导体显示技术有限公司 Display panel and display device
CN114300513A (en) * 2021-12-20 2022-04-08 深圳市华星光电半导体显示技术有限公司 OLED display panel and OLED display device
WO2022110040A1 (en) * 2020-11-27 2022-06-02 京东方科技集团股份有限公司 Display substrate, mask, and display device
US11581487B2 (en) 2017-04-26 2023-02-14 Oti Lumionics Inc. Patterned conductive coating for surface of an opto-electronic device
US11700747B2 (en) 2019-06-26 2023-07-11 Oti Lumionics Inc. Optoelectronic device including light transmissive regions, with light diffraction characteristics
US11730012B2 (en) 2019-03-07 2023-08-15 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US11744101B2 (en) 2019-08-09 2023-08-29 Oti Lumionics Inc. Opto-electronic device including an auxiliary electrode and a partition
US11751415B2 (en) 2018-02-02 2023-09-05 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US11832473B2 (en) 2019-06-26 2023-11-28 Oti Lumionics Inc. Optoelectronic device including light transmissive regions, with light diffraction characteristics
EP4362643A1 (en) * 2022-10-25 2024-05-01 Samsung Display Co., Ltd. Display panel
US11985841B2 (en) 2020-12-07 2024-05-14 Oti Lumionics Inc. Patterning a conductive deposited layer using a nucleation inhibiting coating and an underlying metallic coating
US11997864B2 (en) 2018-05-07 2024-05-28 Oti Lumionics Inc. Device including patterning a conductive coating
EP4415506A1 (en) * 2023-02-13 2024-08-14 Samsung Display Co., Ltd. Display panel
US12069938B2 (en) 2019-05-08 2024-08-20 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US12101987B2 (en) 2019-04-18 2024-09-24 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US12101954B2 (en) 2016-12-02 2024-09-24 Oti Lumionics Inc. Device including a conductive coating disposed over emissive regions and method therefore
US12113279B2 (en) 2020-09-22 2024-10-08 Oti Lumionics Inc. Device incorporating an IR signal transmissive region

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1625312A (en) * 2003-12-02 2005-06-08 索尼株式会社 Deposition mask and manufacturing method thereof
CN107111973A (en) * 2015-01-12 2017-08-29 杜比实验室特许公司 Block of pixels structure and layout
CN107731870A (en) * 2017-09-28 2018-02-23 上海天马有机发光显示技术有限公司 Organic LED pixel structure and display panel comprising it, display device
CN108269840A (en) * 2017-09-30 2018-07-10 昆山国显光电有限公司 Display screen and display device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1625312A (en) * 2003-12-02 2005-06-08 索尼株式会社 Deposition mask and manufacturing method thereof
CN107111973A (en) * 2015-01-12 2017-08-29 杜比实验室特许公司 Block of pixels structure and layout
CN107731870A (en) * 2017-09-28 2018-02-23 上海天马有机发光显示技术有限公司 Organic LED pixel structure and display panel comprising it, display device
CN108269840A (en) * 2017-09-30 2018-07-10 昆山国显光电有限公司 Display screen and display device

Cited By (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11706969B2 (en) 2015-10-26 2023-07-18 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
US11785831B2 (en) 2015-10-26 2023-10-10 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
US11088327B2 (en) 2015-10-26 2021-08-10 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
US11335855B2 (en) 2015-10-26 2022-05-17 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
US11158802B2 (en) 2015-10-26 2021-10-26 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
US11158803B2 (en) 2015-10-26 2021-10-26 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
US12101954B2 (en) 2016-12-02 2024-09-24 Oti Lumionics Inc. Device including a conductive coating disposed over emissive regions and method therefore
US12069939B2 (en) 2017-04-26 2024-08-20 Oti Lumionics Inc. Method for patterning a coating on a surface and device including a patterned coating
US11581487B2 (en) 2017-04-26 2023-02-14 Oti Lumionics Inc. Patterned conductive coating for surface of an opto-electronic device
US11730048B2 (en) 2017-05-17 2023-08-15 OTI Lumionic Inc. Method for selectively depositing a conductive coating over a patterning coating and device including a conductive coating
US11043636B2 (en) 2017-05-17 2021-06-22 Oti Lumionics Inc. Method for selectively depositing a conductive coating over a patterning coating and device including a conductive coating
US11751415B2 (en) 2018-02-02 2023-09-05 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US11997864B2 (en) 2018-05-07 2024-05-28 Oti Lumionics Inc. Device including patterning a conductive coating
US11730012B2 (en) 2019-03-07 2023-08-15 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US12101987B2 (en) 2019-04-18 2024-09-24 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US12069938B2 (en) 2019-05-08 2024-08-20 Oti Lumionics Inc. Materials for forming a nucleation-inhibiting coating and devices incorporating same
US12004383B2 (en) 2019-06-26 2024-06-04 Oti Lumionics Inc. Optoelectronic device including light transmissive regions, with light diffraction characteristics
US11832473B2 (en) 2019-06-26 2023-11-28 Oti Lumionics Inc. Optoelectronic device including light transmissive regions, with light diffraction characteristics
US11700747B2 (en) 2019-06-26 2023-07-11 Oti Lumionics Inc. Optoelectronic device including light transmissive regions, with light diffraction characteristics
US11744101B2 (en) 2019-08-09 2023-08-29 Oti Lumionics Inc. Opto-electronic device including an auxiliary electrode and a partition
WO2021168979A1 (en) * 2020-02-26 2021-09-02 深圳市华星光电半导体显示技术有限公司 Display panel and manufacturing method therefor
CN111312776B (en) * 2020-02-26 2022-11-01 深圳市华星光电半导体显示技术有限公司 Display panel and preparation method thereof
CN111312776A (en) * 2020-02-26 2020-06-19 深圳市华星光电半导体显示技术有限公司 Display panel and preparation method thereof
CN111341936B (en) * 2020-03-10 2021-11-12 昆山国显光电有限公司 Display panel and display device
US11910683B2 (en) 2020-03-10 2024-02-20 Kunshan Go-Visionox Opto-Electronics Co., Ltd Display panel and display device
CN111341936A (en) * 2020-03-10 2020-06-26 昆山国显光电有限公司 Display panel and display device
WO2021179807A1 (en) * 2020-03-10 2021-09-16 昆山国显光电有限公司 Display panel and display apparatus
CN113745271A (en) * 2020-05-29 2021-12-03 华为技术有限公司 Display panel and display device
US12113279B2 (en) 2020-09-22 2024-10-08 Oti Lumionics Inc. Device incorporating an IR signal transmissive region
CN112258987A (en) * 2020-10-23 2021-01-22 合肥维信诺科技有限公司 Light-transmitting display panel and display device
WO2022110040A1 (en) * 2020-11-27 2022-06-02 京东方科技集团股份有限公司 Display substrate, mask, and display device
US11985841B2 (en) 2020-12-07 2024-05-14 Oti Lumionics Inc. Patterning a conductive deposited layer using a nucleation inhibiting coating and an underlying metallic coating
CN114284322A (en) * 2021-12-16 2022-04-05 武汉华星光电半导体显示技术有限公司 Display panel and display device
WO2023108783A1 (en) * 2021-12-16 2023-06-22 武汉华星光电半导体显示技术有限公司 Display panel and display device
CN114300513A (en) * 2021-12-20 2022-04-08 深圳市华星光电半导体显示技术有限公司 OLED display panel and OLED display device
EP4362643A1 (en) * 2022-10-25 2024-05-01 Samsung Display Co., Ltd. Display panel
EP4415506A1 (en) * 2023-02-13 2024-08-14 Samsung Display Co., Ltd. Display panel

Also Published As

Publication number Publication date
CN110767708B (en) 2022-05-10

Similar Documents

Publication Publication Date Title
CN110767708B (en) Array substrate, mask plate, display panel and display device
EP3882897B1 (en) Display substrate, display panel, and display device
US20210351243A1 (en) Display devices, display panels and transparent display panels thereof
JP7280979B2 (en) Display panel and display device
WO2020244258A1 (en) Display substrate, display panel and display apparatus
WO2020133964A1 (en) Array substrate, display panel and display device
EP4036979B1 (en) Transparent display substrate, transparent display panel, and display device
WO2020199575A1 (en) Oled array substrate, display panel and display device
TWI718493B (en) Display panel, display screen and display terminal
WO2021088953A1 (en) Display panel and electronic device
US11515362B2 (en) Display panel and display device
KR20220098036A (en) Display substrates, display panels and display devices
US20220102670A1 (en) Light-transmitting display panel and method for manufacturing the same, and display panel
TWI690066B (en) Array substrate, display panel, and display device
CN110767830A (en) Transparent OLED substrate, array substrate, display screen and display device
CN110767682A (en) Display screen and display terminal
CN111833754B (en) Display panel and display device
KR20210021216A (en) Display device
CN210129515U (en) Display panel and display device
WO2022237141A1 (en) Display panel and display device
CN111710708A (en) Display panel and display device
WO2022206053A1 (en) Display panel and display device
CN117222274A (en) Display substrate, display panel and display device
CN114914281A (en) Display panel and display device
CN116794893A (en) Display substrate, manufacturing method thereof and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant