CN110751600B - Miniaturized camera alink digital acquisition device and system - Google Patents

Miniaturized camera alink digital acquisition device and system Download PDF

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CN110751600B
CN110751600B CN201910826118.2A CN201910826118A CN110751600B CN 110751600 B CN110751600 B CN 110751600B CN 201910826118 A CN201910826118 A CN 201910826118A CN 110751600 B CN110751600 B CN 110751600B
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module
data
carrying
camera
gigabit network
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CN110751600A (en
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王伟亮
叶国华
徐兴奎
李松颖
李春龙
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Harbin Xinguang Photoelectric Technology Co ltd
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Harbin Xinguang Photoelectric Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/70Denoising; Smoothing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/40Image enhancement or restoration using histogram techniques
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T5/00Image enhancement or restoration
    • G06T5/90Dynamic range modification of images or parts thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/10Image acquisition modality
    • G06T2207/10048Infrared image
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/20Special algorithmic details
    • G06T2207/20024Filtering details
    • G06T2207/20028Bilateral filtering

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
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Abstract

The invention provides a miniaturized cameralink digital acquisition device and system for solving the defects that only respective display can be carried out when the valid bit of cameralink data exceeds 8 bits, and the device is high in cost, high in hardware complexity and not beneficial to carrying, wherein the miniaturized cameralink digital acquisition device comprises: the camera alink signal receiving module is used for receiving the camera alink digital signal; the bilateral filtering module is used for carrying out bilateral filtering and noise reduction; the Gaussian filtering module is used for carrying out Gaussian filtering denoising; the histogram stretching module is used for stretching the gray level of the histogram; the DDE module is used for carrying out detail enhancement; the brightness contrast adjusting module is used for adjusting brightness and contrast; and the gigabit network module is used for outputting the information through the gigabit network port for display. The invention also comprises a miniaturized cameralink digital acquisition system. The invention is suitable for acquiring and displaying the digital image of the camera alink of the infrared detector.

Description

Miniaturized camera alink digital acquisition device and system
Technical Field
The invention relates to the field of cameralink digital image acquisition and display, in particular to a miniaturized cameralink digital acquisition device and system.
Background
In the traditional technology, a camera alink digital image acquisition system is directly installed on an industrial personal computer and cannot be separated, so that the problems of inconvenience in carrying, high price and the like are caused; meanwhile, when the effective bit of the input camera link data exceeds 8 bits, different 8 bits can be respectively displayed, and the requirement of some special occasions on display after image processing cannot be met.
Disclosure of Invention
The invention aims to overcome the defects that in the prior art, when the effective bit of input camera link data exceeds 8 bits, the input camera link data can only be respectively displayed, the cost is high, the hardware complexity is high, and the carrying is not facilitated, and provides a miniaturized camera link digital acquisition device and system.
According to a first aspect of the present invention, there is provided a miniaturized cameralink digital acquisition apparatus, comprising: a camera link signal receiving module for receiving the camera link digital signal,
the bilateral filtering module is used for carrying out bilateral filtering noise reduction on the camera alink digital signal; the Gaussian filtering module is used for carrying out Gaussian filtering denoising on the data subjected to bilateral filtering denoising; the histogram stretching module is used for stretching the gray level of the histogram of the data subjected to Gaussian filtering noise reduction; the DDE module is used for carrying out detail enhancement on the data subjected to the histogram gray level stretching; the brightness contrast adjusting module is used for adjusting the brightness and the contrast of the data subjected to the detail enhancement; and the gigabit network module is used for outputting the data subjected to brightness and contrast adjustment through the gigabit network port for display.
Preferably, the miniaturized cameralink digital acquisition device further comprises a cameralink acquisition circuit, and the cameralink acquisition circuit is used for acquiring cameralink digital signals input by an external detector and transmitting the cameralink digital signals to the cameralink signal receiving module.
Preferably, the camera alink signal receiving module is configured to receive 8-bit and 16-bit camera alink digital signals.
Preferably, the miniaturized cameralink digital acquisition device further comprises a bilateral filtering module, which is used for performing bilateral filtering noise reduction on the 16-bit cameralink digital signal.
Preferably, the histogram stretching module is configured to perform histogram gray stretching on the 16-bit data to obtain 8-bit data, and transmit the 8-bit data to the DDE module.
Preferably, the camera link signal receiving module also directly transmits the received 8-bit data to the DDE module.
According to a second aspect of the present invention, a miniaturized digital camera link acquisition system is provided, which includes an infrared detector, an FPGA device and an upper computer, wherein the FPGA device includes the miniaturized digital camera link acquisition apparatus according to the first aspect of the present invention, and the FPGA device is configured to acquire digital camera link signals from the infrared detector and send processed data to the upper computer for display.
The invention has the beneficial effects that: 1. the ability to process and display 16bit cameralink data; 2. the FPGA main control unit is used for completing the acquisition, so that the volume of a camera alink digital acquisition system is reduced; 3. the cost of the image acquisition system is reduced; 4. the design of the image acquisition system is simplified, the maintenance of the system is facilitated, and the reliability of the image acquisition system is improved.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a block schematic diagram of one embodiment of the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
The invention provides a miniaturized camera alink digital acquisition device and system, which are used for acquiring data from an infrared detector and forming displayable data after processing. The device of the first embodiment is a virtual device, which is a program module; the system of the second embodiment is a hardware system.
< first embodiment >
The present embodiment provides a miniaturized cameralink digital acquisition device, as shown in fig. 1, including:
and the camera alink signal receiving module is used for receiving the camera alink digital signal.
And the bilateral filtering module is used for carrying out bilateral filtering and noise reduction on the camera alink digital signal.
And the Gaussian filtering module is used for carrying out Gaussian filtering denoising on the data subjected to bilateral filtering denoising.
And the histogram stretching module is used for stretching the gray level of the histogram of the data subjected to Gaussian filtering and noise reduction.
And the DDE module is used for performing detail enhancement on the data subjected to the histogram gray level stretching.
And the brightness contrast adjusting module is used for adjusting the brightness and the contrast of the data subjected to the detail enhancement.
And the gigabit network module is used for outputting the data subjected to brightness and contrast adjustment through the gigabit network port for display.
Specifically, the camera link signal receiving module is connected to an external acquisition circuit, and is configured to receive and send the camera link signal acquired from the infrared detector to other modules. Wherein the acquisition circuit can be external to the FPGA chip. The received camralink signal may be 8bit, or 16bit, or may be received at the same time and processed separately. The 8bit is data that can be directly displayed, and the 16bit data generally needs to be converted into 8bit to be normally displayed, so the camera link signal receiving module in the embodiment can be set to receive both 8bit and 16bit data, and transmit the data to different modules for processing according to the difference of the number of data bits.
The bilateral filtering module is used for removing noise on the image according to a bilateral filtering algorithm and storing edge information on the image. And the Gaussian filtering module scans each pixel in the image through the template, and replaces the value of the central pixel point of the template by using the weighted average gray value of the pixels in the neighborhood determined by the template to finish the smoothing processing of the signal. In this embodiment, the bilateral filtering module and the gaussian filtering module are both implemented in the field, and the purpose of the implementation is to perform denoising and smoothing processing on an image and simultaneously retain edge information.
The histogram stretching module specifically performs histogram stretching on image data in a maximum value range by counting a maximum value of a frame of image, stretches 16-bit image data into visual 8-bit image data, and then sends the visual 8-bit image data to the DDE module. Histogram stretching, also known as gray stretching, can selectively stretch certain segments of gray intervals to improve the output image. The principle is as follows: if the gray scale of an image is concentrated in a darker area to cause the image to be darker, a gray scale stretching function can be used for stretching the gray scale interval of the object to improve the image; also, if the image gray scale is concentrated in a brighter area, which results in a brighter image, the gray scale stretching function can be used to compress the object gray scale interval to improve the image quality. The histogram gradation extension algorithm of the present embodiment uses an algorithm in the related art.
The DDE is "Dige Details Enhance" (image enhancement technology), and the DDE module is used to effectively retain the tiny target Details in the input image through an image enhancement algorithm. Meanwhile, the DDE can also judge whether the received 8-bit data comes from the histogram stretching module or the camera link signal receiving module.
And the brightness contrast adjusting module is used for adjusting the brightness and the contrast as required, for example, a threshold value can be set as required, and when the brightness and the contrast do not meet the threshold value requirement, the brightness and the contrast are adjusted until the threshold value requirement is met.
And the gigabit network module is used for carrying out gigabit network packaging and sending on the data, and can add information such as a line number, a frame number and the like simultaneously so as to complete image display. The data of the gigabit network module can be sent to an upper computer, and the upper computer is an external device of the FPGA and can process the data, display images and the like. For example, when the gigabit network module sends data to the upper computer, the upper computer displays the data according to information such as a line number and a frame number in the data. The upper computer can also be configured with the number of lines, columns, effective bit width and the like of the acquired image of the image acquisition circuit, and can also store image data, judge whether the data transmission function is effective and the like.
The miniaturized cameralink digital acquisition device also comprises an upper computer command receiving and converting module and a gigabit network receiving module. The upper computer command receiving and converting module is used for receiving a control instruction from the upper computer, and the gigabit network receiving module is used for receiving and transmitting the instruction from the upper computer through the gigabit network.
The most outstanding characteristic of the embodiment is that the 16-bit data can be directly processed and then changed into a clear visual image with edge and detail information; moreover, all modules are integrated in the FPGA, so that the maintenance is easy, and the reliability of the system is improved; the size and cost of the system are reduced, and the portability and reliability of the system are improved.
< second embodiment >
The embodiment provides a miniaturized digital camera alink acquisition system, which comprises an infrared detector, an FPGA device and an upper computer, wherein the FPGA device comprises a miniaturized digital camera alink acquisition device in the first embodiment, and the FPGA device is used for acquiring digital camera alink signals from the infrared detector and sending the processed data to the upper computer for display.
The hardware system provided by the embodiment comprises an internal program module of the FPGA mentioned in the first embodiment, and further comprises an infrared detector and an upper computer which are connected with an FPGA chip. The function of each program module in the FPGA chip is the same as that of the first embodiment, and is not described in detail here.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims (2)

1. A miniaturized cameralink digital acquisition device, comprising:
the camera alink signal receiving module is used for receiving the camera alink digital signal; the camera alink signal receiving module is used for receiving 8-bit and 16-bit camera alink digital signals; the camera link signal receiving module is also used for directly transmitting the received 8-bit data to the DDE module;
the bilateral filtering module is used for carrying out bilateral filtering noise reduction on the camera alink digital signal; the bilateral filtering module is used for carrying out bilateral filtering noise reduction on the 16-bit camera alink digital signal;
the Gaussian filtering module is used for carrying out Gaussian filtering denoising on the data subjected to bilateral filtering denoising;
the histogram stretching module is used for stretching the gray level of the histogram of the data subjected to Gaussian filtering and noise reduction; the histogram stretching module is used for performing histogram gray stretching on the 16-bit data to obtain 8-bit data and transmitting the 8-bit data to the DDE module;
the DDE module is used for carrying out detail enhancement on the data subjected to the histogram gray level stretching; the brightness contrast adjusting module can set a threshold value, and when the brightness and the contrast do not meet the threshold value requirement, the brightness contrast adjusting module adjusts the brightness and the contrast until the threshold value requirement is met;
the brightness contrast adjusting module is used for adjusting the brightness and the contrast of the data subjected to the detail enhancement;
the gigabit network module is used for outputting the data subjected to brightness and contrast adjustment through a gigabit network port for display; the device is also used for carrying out gigabit network packing and sending on the data, and can add information such as a line number, a frame number and the like at the same time so as to complete image display;
the device also comprises a camera alink acquisition circuit which is used for acquiring a camera alink digital signal input by an external detector and transmitting the signal to a camera alink signal receiving module;
the device also comprises an upper computer command receiving and converting module and a gigabit network receiving module; the gigabit network receiving module is used for receiving and transmitting the command from the upper computer through the gigabit network;
when the gigabit network module sends data to the upper computer, the upper computer displays the information according to the line number, the frame number and the like in the gigabit network module, and the upper computer can also configure the line number, the column number, the effective bit width and the like of the image acquired by the image acquisition circuit, and can also store the image data, judge whether the data transmission function is effective and the like.
2. A miniaturized cameralink digital acquisition system, comprising an infrared detector, an FPGA device and an upper computer, wherein the FPGA device comprises the miniaturized cameralink digital acquisition device according to claim 1, and the FPGA device is used for acquiring cameralink digital signals from the infrared detector and sending processed data to the upper computer for display.
CN201910826118.2A 2019-09-03 2019-09-03 Miniaturized camera alink digital acquisition device and system Active CN110751600B (en)

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CN103177429A (en) * 2013-04-16 2013-06-26 南京理工大学 FPGA (field programmable gate array)-based infrared image detail enhancing system and method
CN104424383B (en) * 2013-08-22 2017-09-15 南京理工大学 Hardware handles algorithm effect evaluating apparatus and its evaluation method based on infrared image
CN103763549B (en) * 2014-01-13 2016-02-24 昆明理工大学 A kind of Camera Link interface experiment based on FPGA and development system
CN107144703B (en) * 2017-05-09 2019-06-18 华中科技大学 Built-in image collection and processing system and method based on particle image velocimetry
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