CN110728963A - Pixel driving circuit and driving method, display device and display control method - Google Patents

Pixel driving circuit and driving method, display device and display control method Download PDF

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Publication number
CN110728963A
CN110728963A CN201911053152.7A CN201911053152A CN110728963A CN 110728963 A CN110728963 A CN 110728963A CN 201911053152 A CN201911053152 A CN 201911053152A CN 110728963 A CN110728963 A CN 110728963A
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circuit
control
sub
node
signal
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CN110728963B (en
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王铁石
秦纬
徐智强
刘伟星
张春芳
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G09G3/342—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

A pixel driving circuit for driving a light emitting element to emit light, comprising: the memory comprises an input sub-circuit, a first storage sub-circuit, a second storage sub-circuit, a storage control sub-circuit and a driving sub-circuit; an input sub-circuit for supplying a signal of a data signal terminal to the first node under the control of a signal of a scan signal terminal; a first storage sub-circuit connected to the first node and a first power supply terminal; a second storage sub-circuit connected to the second node and the first power supply terminal; the storage control sub-circuit is used for conducting or disconnecting the first node and the second node under the control of a signal of the control signal end so as to enable the connection between the first storage sub-circuit and the second storage sub-circuit to be conducted or disconnected; and the driving sub-circuit is used for switching on or switching off the first power supply end and a third node under the control of the light-emitting control end and the second node, and the third node is connected with the light-emitting element.

Description

Pixel driving circuit and driving method, display device and display control method
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a pixel driving circuit and a driving method, a display device and a display control method.
Background
The currently mainstream three-dimensional display principle is to use the left and right eyes to receive different pictures respectively, and to superimpose and reproduce the received image information through the brain to form an image with a three-dimensional effect. In other words, the left eye sees a left view and the right eye sees a right view, forming a stereoscopic image in the brain. Therefore, three-dimensional stereoscopic display requires that left and right views be separated from each other and enter left and right eyes, respectively.
The current three-dimensional display technology can be divided into a naked-eye type three-dimensional display technology and a glasses type three-dimensional display technology. The glasses type three-dimensional display technology adopts a shutter type three-dimensional display device. For example, the liquid crystal shutter type stereoscopic display device alternately drives a left-eye liquid crystal shutter and a right-eye liquid crystal shutter of glasses to alternately synchronize the left eye and the right eye, thereby separating the left eye and the right eye of an image and providing the image to a viewer. However, significant crosstalk is generated during the process of alternately switching the left-eye picture and the right-eye picture, which brings very poor use experience to users.
Disclosure of Invention
The application provides a pixel driving circuit and a driving method, a display device and a display control method, which can solve the problem of crosstalk caused by a shutter and a picture switching process in three-dimensional display, thereby improving the use experience of a user.
In one aspect, the present application provides a pixel driving circuit for driving a light emitting element to emit light, the pixel driving circuit including: the memory comprises an input sub-circuit, a first storage sub-circuit, a second storage sub-circuit, a storage control sub-circuit and a driving sub-circuit; the input sub-circuit is connected with the data signal end, the scanning signal end and the first node and is used for providing a signal of the data signal end for the first node under the control of a signal of the scanning signal end; the first storage sub-circuit is connected with a first node and a first power supply end; the second storage sub-circuit is connected with the second node and the first power supply end; the storage control sub-circuit is connected with the control signal end, the first node and the second node and is used for conducting or disconnecting the first node and the second node under the control of a signal of the control signal end so as to enable the connection between the first storage sub-circuit and the second storage sub-circuit to be conducted or disconnected; the driving sub-circuit is connected with the light-emitting control end, the second node, the third node and the first power end, and is used for switching on or switching off the first power end and the third node under the control of the light-emitting control end and the second node, and the third node is connected with the light-emitting element.
In another aspect, the present application provides a driving method of a pixel driving circuit, applied to the pixel driving circuit as described above, the driving method including: in the pre-writing stage, according to a signal of a light-emitting control end and a light-emitting signal which is stored by a second storage sub-circuit and is obtained according to a previous frame data signal, a driving sub-circuit is controlled to drive a light-emitting element to emit light, under the control of a signal of a control signal end, the connection between the first storage sub-circuit and the second storage sub-circuit is disconnected, and under the control of a signal of a scanning signal end, a current frame data signal of a data signal end is written into the first storage sub-circuit; in the writing stage, under the control of the signal of the control signal end, the connection between the first storage sub-circuit and the second storage sub-circuit is conducted, and the light-emitting signal obtained according to the data signal of the current frame is written into the second storage sub-circuit.
In another aspect, the present application provides a display device including the pixel driving circuit as described above.
In an exemplary embodiment, the display device further includes: a two-dimensional display control circuit and a three-dimensional display control circuit; the two-dimensional display control circuit comprises a plurality of cascaded two-dimensional control sub-circuits, the input end of a first-level two-dimensional control sub-circuit is connected with an initial control signal end, the input end of an N + 1-level two-dimensional control sub-circuit is connected with the output end of an Nth-level two-dimensional control sub-circuit, and N is an integer greater than 0; the output end of any two-dimensional control sub-circuit is connected with the light-emitting control end of one pixel driving circuit; the three-dimensional display control circuit comprises a plurality of fifth switching transistors, the control electrode and the first electrode of any fifth switching transistor are connected with the three-dimensional display control end, and the second electrode is connected with the light-emitting control end of one pixel driving circuit.
In another aspect, the present application provides a method for controlling display of a display device, applied to the display device, the method comprising: in a two-dimensional display mode, under the control of an initial control signal end and a three-dimensional display control end, providing a signal output by a two-dimensional display control circuit for a light-emitting control end of a pixel driving circuit; in the three-dimensional display mode, under the control of the initial control signal end and the three-dimensional display control end, a signal of the three-dimensional display control end is provided for the light-emitting control end of the pixel driving circuit.
The pixel driving circuit provided by the application can support the pre-writing of the next frame data signal during the current frame light-emitting period by arranging the first storage sub-circuit, the second storage sub-circuit and the storage control sub-circuit for controlling the connection between the first storage sub-circuit and the second storage sub-circuit to be switched on or off, so that the problem of crosstalk caused in the process of switching a shutter and a picture in three-dimensional display is solved, and the use experience of a user is improved. Moreover, the display device provided by the embodiment of the application supports switching between a two-dimensional display mode and a three-dimensional display mode.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. Other advantages of the application may be realized and attained by the instrumentalities and combinations particularly pointed out in the specification, claims, and drawings.
Drawings
The accompanying drawings are included to provide an understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present disclosure;
fig. 2 is another schematic structural diagram of a pixel driving circuit according to an embodiment of the present disclosure;
FIG. 3 is an equivalent circuit diagram of an input sub-circuit provided in an embodiment of the present application;
FIG. 4 is an equivalent circuit diagram of a first memory sub-circuit provided in an embodiment of the present application;
FIG. 5 is an equivalent circuit diagram of a second memory sub-circuit provided in an embodiment of the present application;
FIG. 6 is an equivalent circuit diagram of a memory control sub-circuit provided in an embodiment of the present application;
fig. 7 is an equivalent circuit diagram of a driving sub-circuit provided in an embodiment of the present application;
fig. 8 is an equivalent circuit diagram of a reset sub-circuit provided in an embodiment of the present application;
fig. 9 is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of the present application;
fig. 10 is a timing diagram illustrating an operation of a pixel driving circuit according to an embodiment of the present disclosure;
fig. 11 is a working state diagram of a pixel driving circuit in a pre-writing stage according to an embodiment of the present disclosure;
fig. 12 is a working state diagram of a pixel driving circuit in a reset phase according to an embodiment of the present application;
fig. 13 is a working state diagram of the pixel driving circuit in the writing stage according to the embodiment of the present application;
fig. 14 is a circuit structure example of a display device according to an embodiment of the present application.
Description of reference numerals:
Data-Data signal terminal; gate-scan signal terminal; cont-control signal terminal; Reset-Reset signal terminal; EM-emission control terminal; ELVDD — first power supply terminal; ELVSS-second power supply terminal; Initial-Initial signal end; c1 — first capacitance; c2 — second capacitance; m1 — first switching transistor; m2 — a second switching transistor; m3 — a third switching transistor; m4 — fourth switching transistor; m5 — drive transistor; p1 to Pn-a fifth switching transistor; n1-first node; n2-second node; n3-third node; ETV-initial control signal terminal; 3 DEM-three-dimensional display control terminal.
Detailed Description
The present application describes embodiments, but the description is illustrative rather than limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or instead of any other feature or element in any other embodiment, unless expressly limited otherwise.
The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive concept as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive aspects to form yet another unique inventive aspect, as defined by the claims. Thus, it should be understood that any of the features shown and/or discussed in this application may be implemented alone or in any suitable combination. Accordingly, the embodiments are not limited except as by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
Further, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other orders of steps are possible as will be understood by those of ordinary skill in the art. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Further, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.
It will be understood by those skilled in the art that the switching transistors and the driving transistors employed in all embodiments of the present application may be thin film transistors or field effect transistors or other devices having the same characteristics. Illustratively, the thin film transistor used in the embodiment of the present application may be an oxide semiconductor transistor. Since the source and drain of the switching transistor used here are symmetrical, the source and drain can be interchanged. In the embodiment of the present application, the control electrode is a gate, and in order to separate two electrodes except for the gate of the switching transistor, one of the electrodes is referred to as a first electrode, the other electrode is referred to as a second electrode, the first electrode may be a source or a drain, and the second electrode may be a drain or a source.
Illustratively, the switching transistor and the driving transistor in the present embodiment may employ a P-type transistor. The P-type switching transistor is turned on when the gate is at a low level and turned off when the gate is at a high level. However, this is not limited in this application. The switch transistor and the driving transistor in this embodiment may also be N-type transistors. The N-type switching transistor is turned on when the grid electrode is at a high level and is turned off when the grid electrode is at a low level.
The embodiment of the application provides a pixel driving circuit, a driving method, a display device and a display control method, aiming at the problem of crosstalk caused in the process of switching a shutter and a picture in the three-dimensional display technology.
First embodiment
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present disclosure. As shown in fig. 1, the present embodiment provides a pixel driving circuit for driving a light emitting element to emit light, including: the memory comprises an input sub-circuit, a first storage sub-circuit, a second storage sub-circuit, a storage control sub-circuit and a driving sub-circuit.
The input sub-circuit is connected to the Data signal terminal Data, the scan signal terminal Gate, and the first node N1, and is configured to provide a signal of the Data signal terminal Data to the first node N1 under the control of a signal of the scan signal terminal Gate.
And a first storage sub-circuit connected to the first node N1 and the first power source terminal ELVDD, for storing a signal of the Data signal terminal Data written at the first node N1.
And the storage control sub-circuit is connected with the control signal terminal Cont, the first node N1 and the second node N2 and is used for conducting or disconnecting the first node N1 and the second node N2 under the control of the signal of the control signal terminal Cont so as to conduct or disconnect the connection between the first storage sub-circuit and the second storage sub-circuit.
And a second memory sub-circuit connected to the second node N2 and the first power source terminal ELVDD, for storing a light emitting signal derived from a signal of the Data signal terminal Data written in the first memory sub-circuit under the control of the memory control sub-circuit.
And a driving sub-circuit connected to the light emission control terminal EM, the second node N2, the third node N3, and the first power source terminal ELVDD, for turning on or off the first power source terminal ELVDD and the third node N3 under the control of the light emission control terminal EM and the second node N2.
The first pole of the light emitting element is connected to the third node N3, and the second pole is connected to the second power source terminal ELVSS. Illustratively, the light emitting element may be an organic electroluminescent diode (OLED), the first pole being an anode and the second pole being a cathode.
It is noted that the voltage of the first power source terminal ELVDD may be continuously at a high level and the voltage of the second power source terminal ELVSS may be continuously at a low level. The scan signal terminal Gate is a scan line, and the Data signal terminal Data is a Data line.
The pixel driving circuit provided by the embodiment of the application can perform pre-writing of the next frame data signal during the current frame light emitting period by arranging the first storage sub-circuit, the storage control sub-circuit and the second storage sub-circuit, so that the problem of crosstalk caused in the shutter and picture switching process is avoided, and the user experience is improved.
Fig. 2 is another schematic structural diagram of a pixel driving circuit according to an embodiment of the present disclosure. As shown in fig. 2, the pixel driving circuit provided in this embodiment further includes: a reset sub-circuit; and a Reset sub-circuit connected to the Reset signal terminal Reset, the second node N2 and the Initial signal terminal Initial, for providing a signal of the Initial signal terminal Initial to the second node N2 under the control of the signal of the Reset signal terminal Reset. The Reset sub-circuit is used for resetting the second node N2 under the control of a signal of a Reset signal terminal Reset.
Fig. 3 is an equivalent circuit diagram of an input sub-circuit provided in an embodiment of the present application. As shown in fig. 3, the input sub-circuit includes: a control electrode of the first switching transistor M1, a control electrode of the first switching transistor M1 is connected to the scan signal terminal Gate, a first electrode of the first switching transistor M1 is connected to the Data signal terminal Data, and a second electrode of the first switching transistor M1 is connected to the first node N1.
It should be noted that fig. 3 specifically shows an exemplary structure of the input sub-circuit, and those skilled in the art will readily understand that the implementation manner of the sub-circuit is not limited thereto as long as the function thereof can be implemented.
Fig. 4 is an equivalent circuit diagram of a first storage sub-circuit according to an embodiment of the present application. As shown in fig. 4, the first storage sub-circuit includes: a first capacitance C1; a first terminal of the first capacitor C1 is connected to the first node N1, and a second terminal of the first capacitor C1 is connected to the first power source terminal ELVDD.
It should be noted that fig. 4 specifically shows an exemplary structure of the first storage sub-circuit, and those skilled in the art can easily understand that the implementation manner of the sub-circuit is not limited thereto as long as the function thereof can be realized.
Fig. 5 is an equivalent circuit diagram of a second memory sub-circuit according to an embodiment of the present application. As shown in fig. 5, the second storage sub-circuit includes: a second capacitance C2; a first terminal of the second capacitor C2 is connected to the second node N2, and a second terminal of the second capacitor C2 is connected to the first power source terminal ELVDD.
It should be noted that fig. 5 specifically shows an exemplary structure of the second storage sub-circuit, and those skilled in the art can easily understand that the implementation manner of the sub-circuit is not limited thereto as long as the function thereof can be realized.
Fig. 6 is an equivalent circuit diagram of a memory control sub-circuit according to an embodiment of the present application. As shown in fig. 6, the memory control sub-circuit includes: a second switching transistor M2, a control electrode of the second switching transistor M2 is connected to the control signal terminal Cont, a first electrode of the second switching transistor M2 is connected to the first node N1, and a second electrode of the second switching transistor M2 is connected to the second node N2.
It should be noted that fig. 6 specifically shows an exemplary structure of the memory control sub-circuit, and those skilled in the art will readily understand that the implementation manner of the sub-circuit is not limited thereto as long as the function thereof can be implemented.
Fig. 7 is an equivalent circuit diagram of a driving sub-circuit according to an embodiment of the present application. As shown in fig. 7, the driving sub-circuit includes: a third switching transistor M3 and a driving transistor M5; a control electrode of the third switching transistor M3 is connected to the light emission control terminal EM, a first electrode of the third switching transistor M3 is connected to the first power source terminal ELVDD, and a second electrode of the third switching transistor M3 is connected to the first electrode of the driving transistor M5; a control electrode of the driving transistor M5 is connected to the second node N2, and a second electrode of the driving transistor M5 is connected to the third node N3.
It should be noted that fig. 7 specifically shows an exemplary structure of the driving sub-circuit, and those skilled in the art will readily understand that the implementation manner of the sub-circuit is not limited thereto as long as the function thereof can be realized.
Fig. 8 is an equivalent circuit diagram of a reset sub-circuit provided in an embodiment of the present application. As shown in fig. 8, the reset sub-circuit includes: a fourth switching transistor M4, a control electrode of the fourth switching transistor M4 is connected to the Reset signal terminal Reset, a first electrode of the fourth switching transistor M4 is connected to the second node N2, and a second electrode of the fourth switching transistor M4 is connected to the Initial signal terminal Initial.
It should be noted that fig. 8 specifically shows an exemplary structure of the reset sub-circuit, and those skilled in the art will readily understand that the implementation manner of the sub-circuit is not limited thereto as long as the function thereof can be realized.
Fig. 9 is an equivalent circuit diagram of a pixel driving circuit according to an embodiment of the present application. As shown in fig. 9, the pixel driving circuit for driving the light emitting element EL to emit light includes: the memory comprises an input sub-circuit, a first storage sub-circuit, a second storage sub-circuit, a storage control sub-circuit, a reset sub-circuit and a driving sub-circuit. Wherein the input sub-circuit comprises a first switching transistor M1; the first storage sub-circuit comprises a first capacitance C1; the second storage sub-circuit comprises a second capacitance C2; the memory control sub-circuit includes a second switching transistor M2; the driving sub-circuit includes a third switching transistor M3 and a driving transistor M5; the reset sub-circuit includes a fourth switching transistor M4.
A control electrode of the first switching transistor M1 is connected to the Gate of the scan signal terminal, a first electrode of the first switching transistor M1 is connected to the Data signal terminal Data, and a second electrode of the first switching transistor M1 is connected to the first node N1; a first terminal of the first capacitor C1 is connected to the first node N1, and a second terminal of the first capacitor C1 is connected to the first power terminal ELVDD; a first terminal of the second capacitor C2 is connected to the second node N2, and a second terminal of the second capacitor C2 is connected to the first power source terminal ELVDD; a control electrode of the second switching transistor M2 is connected to the control signal terminal Cont, a first electrode of the second switching transistor M2 is connected to the first node N1, and a second electrode of the second switching transistor M2 is connected to the second node N2; a control electrode of the third switching transistor M3 is connected to the light emission control terminal EM, a first electrode of the third switching transistor M3 is connected to the first power source terminal ELVDD, and a second electrode of the third switching transistor M3 is connected to the first electrode of the driving transistor M5; a control electrode of the driving transistor M5 is connected to the second node N2, and a second electrode of the driving transistor M5 is connected to the third node N3; a control electrode of the fourth switching transistor M4 is connected to the Reset signal terminal Reset, a first electrode of the fourth switching transistor M4 is connected to the second node N2, and a second electrode of the fourth switching transistor M4 is connected to the Initial signal terminal Initial.
In the embodiment, the switching transistors M1 to M4 and the driving transistor M5 may be P-type thin film transistors, which can unify the process flow, reduce the process steps, and contribute to improving the yield of the product. In addition, in view of the small leakage current of the low temperature polysilicon thin film transistor, it is preferable that all the transistors are low temperature polysilicon thin film transistors in this embodiment, and the thin film transistors may specifically be selected from thin film transistors with a bottom gate structure or thin film transistors with a top gate structure as long as the functions can be realized.
The technical solution of the present embodiment is further explained by the working process of the pixel driving circuit.
Taking the switching transistors M1 to M4 and the driving transistor M5 in the pixel driving circuit provided in this embodiment as an example, fig. 10 is an operation timing diagram of the pixel driving circuit provided in this embodiment, fig. 11 is an operation state diagram of the pixel driving circuit in a pre-writing stage, fig. 12 is an operation state diagram of the pixel driving circuit in a resetting stage, and fig. 13 is an operation state diagram of the pixel driving circuit in a writing stage. As shown in fig. 9 to 13, the pixel drive circuit involved in the present embodiment includes: 4 switching transistors (M1 to M4), 1 driving transistor (M5), 2 capacitor units (C1 and C2), 6 signal input terminals (Data, Gate, Cont, Reset, Initial, and EM), and 2 power supply terminals (ELVDD and ELVSS). Wherein the first power supply terminal ELVDD continuously provides high level signal with voltage VELVDD(ii) a The second power source terminal ELVSS continuously supplies a low level signal.
As shown in fig. 10, in a one-Frame (Frame) period, the pixel driving circuit of the present embodiment includes the following operating states: a pre-write phase T1, a reset phase T2, and a write phase T3.
The pre-writing stage T1 is a pre-writing stage of the current frame data signal and is also a light-emitting stage of the previous frame data signal. In the pre-write period T1, as shown in fig. 11, the signal of the control signal terminal Cont is at a high level, the second switch transistor M2 is turned off, and the potential change of the first node N1 does not affect the potential of the second node N2.
Wherein the pre-write period T1 is a light emitting period of a previous frame data signal, the potential of the second node N2 can be maintained at the light emitting signal voltage, for example, V, written in the write period of the previous frame period by the charge storage function of the second capacitor C2N2＝VELVDD-(c2(VELVDD-Vdata0)+c1(VELVDD-VInitial))/(C1+ C2), where C1 represents the capacitance of the first capacitor C1, C2 represents the capacitance of the second capacitor C2, and VInitialVoltage, V, representing Initial signal terminal Initialdata0Voltage, V, representing the previous frame data signalELVDDRepresenting the voltage of the first power source terminal ELVDD.
Also, the signal of the light emission control terminal EM is low level, the third switching transistor M3 is turned on, the first power source terminal ELVDD is turned on with the first electrode (source electrode) of the driving transistor M5, the signal of the first power source terminal ELVDD is high level, and the voltage is VELVDD. The voltage of the second node N2 (i.e., the gate voltage Vg of the driving transistor M5 is equal to V)N2) A voltage V less than that provided by the signal of the first power terminal ELVDDELVDD(i.e., the source voltage Vs of the driving transistor M5), and the absolute value of the difference between the two is greater than the threshold voltage V of the driving transistor M5thAt this time, the driving transistor M5 is turned on, and a driving current is output to the light emitting element EL by the first power source terminal ELVDD, so that the light emitting element EL emits light.
In the pre-write phase T1, the data signal of the current frame may also be written to the first capacitor C1 through the first switching transistor M1. The signal of the scan signal terminal Gate is a pulse signal, and when the signal of the scan signal terminal Gate is at a low level, the first switching transistor M1 is turned on, and a Data signal input from the Data signal terminal Data through the Data line charges the first capacitor C1 through the first switching transistor M1, so that the Data signal of the current frame can be stored in the first capacitor C1. At this time, the voltage V of the first node N1N1＝Vdata1. When the signal of the scan signal terminal Gate becomes a high level, the first switching transistor M1 is turned off, and the voltage of the first node N1 can be maintained at V by the charge storage function of the first capacitor C1data1。
In the Reset period T2, as shown in fig. 12, the signal at the Reset signal terminal Reset is at a low level, the fourth switching transistor M4 is turned on, and the voltage at the second node N2 is pulled to the voltage V at the Initial signal terminal InitialInitialI.e. VN2＝VInitialFor resetting the second node N2.
Controlling the signal terminal Cont during a reset phase T2The signal is high, the second switching transistor M2 is turned off, and the potential change of the second node N2 does not affect the potential of the first node N1. Then, the signal at the Gate terminal of the scan signal is at high level, the first switching transistor M1 is turned off, and the potential at the first node N1 is kept constant, i.e., VN1＝Vdata1。
In the reset period T2, the signal of the emission control terminal EM is at a high level, the third switching transistor M3 is turned off, the first power terminal ELVDD is turned off from the first electrode of the driving transistor M5, and at this time, the source of the driving transistor M5 is in a Floating state, and even if the driving transistor M5 is turned on, no driving current is supplied to the light emitting element EL. At this stage, the light emitting element EL does not emit light.
In the write stage T3, as shown in fig. 13, the signal of the control signal terminal Cont is at a low level, the second switching transistor M2 is turned on, the first node N1 and the second node N2 are turned on, and a light emitting signal obtained from the current frame data signal stored in the first node N1 is written into the second node N2. Specifically, at this time, the first node N1 and the second node N2 have the same potential, and the potential may be V according to the conservation of chargeN1＝VN2＝VELVDD-(c2(VELVDD-Vdata1)+c1(VELVDD-VInitial) /(C1+ C2), where C1 denotes the capacitance value of the first capacitor C1, C2 denotes the capacitance value of the second capacitor C2, VInitialVoltage, V, representing Initial signal terminal Initialdata1Voltage, V, representing the data signal of the current frameELVDDRepresenting the voltage of the first power source terminal ELVDD.
In the write phase T3, the signal at the Gate of the scan signal terminal is at a high level, and the first switch transistor M1 is turned off; the signal of the Reset signal terminal Reset is at a high level, and the fourth switching transistor M4 is turned off; when the signal of the emission control terminal EM is at a high level and the third switching transistor M3 is turned off, the source of the driving transistor M5 is in a Floating state, and even when the driving transistor M5 is turned on, no driving current is supplied to the light emitting element EL. At this stage, the light emitting element EL does not emit light.
The pixel driving circuit provided by this embodiment can support pre-writing of a data signal of a current frame during a light-emitting period of a previous frame (in other words, pre-writing of a data signal of a next frame during a light-emitting period of the current frame) by providing the first storage sub-circuit, the second storage sub-circuit, and the storage control sub-circuit for controlling connection and disconnection between the first storage sub-circuit and the second storage sub-circuit, so as to improve crosstalk problems caused by a shutter and a picture switching process in three-dimensional stereoscopic display, and improve user experience.
Second embodiment
Based on the inventive concept of the foregoing embodiment, an embodiment of the present application further provides a driving method of a pixel driving circuit, which is applied to the pixel driving circuit provided in the first embodiment. The driving method of the pixel driving circuit provided by the embodiment includes the following steps:
in the pre-writing stage, the driving sub-circuit is controlled to drive the light-emitting element to emit light according to the signal of the light-emitting control end and the light-emitting signal which is stored by the second storage sub-circuit and is obtained according to the previous frame data signal; under the control of the signal of the control signal terminal, the first storage sub-circuit and the second storage sub-circuit are disconnected; under the control of the signal of the scanning signal end, writing the current frame data signal of the data signal end into the first storage sub-circuit;
in the writing stage, under the control of the signal of the control signal end, the connection between the first storage sub-circuit and the second storage sub-circuit is conducted, and the light-emitting signal obtained according to the data signal of the current frame is written into the second storage sub-circuit.
In an exemplary embodiment, the driving method of the present embodiment may further include: in a reset phase between the pre-write phase and the write phase, the second storage sub-circuit is reset under the control of a signal of a reset control terminal.
The driving method provided in this embodiment can refer to the description of the first embodiment, and therefore, the description thereof is omitted.
Third embodiment
Based on the inventive concept of the above embodiments, embodiments of the present application further provide a display device including the pixel driving circuit as described in the first embodiment. The implementation principle and the implementation effect of the pixel driving circuit are similar to those of the first embodiment, and are not described herein again.
The display device provided by the embodiment may include a display substrate, and the pixel driving circuit may be disposed on the display substrate. Illustratively, the display device may be: the OLED display panel comprises any product or component with a display function, such as an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
The display substrate of the display device provided in this embodiment may be manufactured by low temperature Poly-silicon (LTPS), and the design of the plurality of transistors and the plurality of capacitors does not affect the aperture ratio of the module. It should be noted that the display substrate of the display device provided in this embodiment may also adopt an amorphous silicon process. It should be noted that the pixel driving circuit provided in this embodiment may use a thin film transistor made of amorphous silicon, polysilicon, oxide, or the like.
Fig. 14 is a circuit structure example of a display device according to an embodiment of the present application. As shown in fig. 14, the display device provided in this embodiment includes: the display device comprises a pixel driving circuit, a two-dimensional display control circuit and a three-dimensional display control circuit. The two-dimensional display control circuit comprises a plurality of cascaded two-dimensional control sub-circuits, wherein the input end of a first-stage two-dimensional control sub-circuit is connected with an initial control signal end ETV, the input end of an N + 1-stage two-dimensional control sub-circuit is connected with the output end of an Nth-stage two-dimensional control sub-circuit, the output end of any one-stage two-dimensional control sub-circuit is connected with a light-emitting control end EM of a pixel driving circuit, and N is an integer greater than 0; the three-dimensional display control circuit includes a plurality of fifth switching transistors P1 to Pn, a control electrode and a first electrode of any one of the fifth switching transistors are connected to the three-dimensional display control terminal 3DEM, and a second electrode is connected to the light emission control terminal EM of one pixel drive circuit.
The two-dimensional control sub-circuit may include one or more switching transistors to provide a control signal to the light emission control terminal of the pixel driving circuit in the two-dimensional display mode. The specific structure of the two-dimensional control sub-circuit is not limited in the present application as long as the corresponding function can be achieved.
An embodiment of the present application further provides a display control method for a display device, which is applied to the display device described above, and includes: in a two-dimensional display mode, under the control of an initial control signal end ETV and a three-dimensional display control end 3DEM, a signal output by a two-dimensional display control circuit is provided for a light-emitting control end EM of a pixel driving circuit; in the three-dimensional display mode, under the control of the initial control signal end ETV and the three-dimensional display control end 3DEM, a signal of the three-dimensional display control end 3DEM is provided for the light emitting control end EM of the pixel driving circuit.
In the two-dimensional display mode, a signal of the light emission control end EM of any one pixel driving circuit is provided by the output end of the corresponding one of the two-dimensional control sub-circuits. In the three-dimensional display mode, signals of the light emission control terminals EM of all the pixel driving circuits of the display device are provided by the three-dimensional display control terminal 3 DEM.
In the present embodiment, in the three-dimensional display mode, the Reset signal terminals Reset of the plurality of pixel driving circuits are collectively controlled by the display device, the control signal terminals Cont of the plurality of pixel driving circuits are collectively controlled by the display device, and the signal of the emission control terminal EM of the plurality of pixel driving circuits is collectively controlled by the display device.
In the present embodiment, for any one pixel driving circuit, in the two-dimensional display mode, the first node N1 and the second node N2 of the pixel driving circuit are turned on under the control of the signal of the control signal terminal Cont; the second node N2 and the Initial signal terminal Initial are disconnected under the control of the signal of the Reset signal terminal Reset. For example, in the two-dimensional display mode, in the pixel driving circuit shown in fig. 9, the Reset signal terminal Reset may continuously supply a high-level signal, and the control signal terminal Cont may continuously supply a low-level signal.
The display device provided by the embodiment can support the switching between the two-dimensional display mode and the three-dimensional display mode by arranging the two-dimensional display control circuit and the three-dimensional display control circuit, so that the user experience is improved.
In the description of the embodiments of the present application, it should be understood that the terms "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and therefore, should not be construed as limiting the present application.
In the description of the embodiments of the present application, it should be noted that the terms "mounted," "connected," and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected unless explicitly stated or limited otherwise; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Although the embodiments disclosed in the present application are described above, the descriptions are only for the convenience of understanding the present application, and are not intended to limit the present application. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims.

Claims (15)

1. A pixel driving circuit for driving a light emitting element to emit light, the pixel driving circuit comprising: the memory comprises an input sub-circuit, a first storage sub-circuit, a second storage sub-circuit, a storage control sub-circuit and a driving sub-circuit;
the input sub-circuit is connected with the data signal end, the scanning signal end and the first node and is used for providing a signal of the data signal end for the first node under the control of a signal of the scanning signal end;
the first storage sub-circuit is connected with a first node and a first power supply end;
the second storage sub-circuit is connected with the second node and the first power supply end;
the storage control sub-circuit is connected with the control signal end, the first node and the second node and is used for conducting or disconnecting the first node and the second node under the control of a signal of the control signal end so as to enable the connection between the first storage sub-circuit and the second storage sub-circuit to be conducted or disconnected;
the driving sub-circuit is connected with the light-emitting control end, the second node, the third node and the first power end, and is used for switching on or switching off the first power end and the third node under the control of the light-emitting control end and the second node, and the third node is connected with the light-emitting element.
2. The pixel driving circuit according to claim 1, wherein the input sub-circuit comprises: the control electrode of the first switching transistor is connected with the scanning signal end, the first electrode of the first switching transistor is connected with the data signal end, and the second electrode of the first switching transistor is connected with the first node.
3. The pixel driving circuit according to claim 1, wherein the first storage sub-circuit comprises: a first capacitor; the first end of the first capacitor is connected with a first node, and the second end of the first capacitor is connected with a first power supply end.
4. The pixel driving circuit according to claim 1, wherein the second storage sub-circuit comprises: a second capacitor; the first end of the second capacitor is connected with the second node, and the second end of the second capacitor is connected with the first power supply end.
5. The pixel driving circuit according to claim 1, wherein the storage control sub-circuit comprises: and a control electrode of the second switching transistor is connected with the control signal end, a first electrode of the second switching transistor is connected with the first node, and a second electrode of the second switching transistor is connected with the second node.
6. The pixel driving circuit according to claim 1, wherein the driving sub-circuit comprises: a third switching transistor and a driving transistor;
a control electrode of the third switching transistor is connected with the light-emitting control end, a first electrode of the third switching transistor is connected with a first power supply end, and a second electrode of the third switching transistor is connected with a first electrode of the driving transistor; and the control electrode of the driving transistor is connected with the second node, and the second electrode of the driving transistor is connected with the third node.
7. The pixel driving circuit according to claim 1, further comprising: a reset sub-circuit; the reset sub-circuit is connected with the reset signal end, the second node and the initial signal end and used for providing the signal of the initial signal end for the second node under the control of the signal of the reset signal end.
8. The pixel driving circuit of claim 7, wherein the reset sub-circuit comprises: and a control electrode of the fourth switching transistor is connected with the reset signal end, a first electrode of the fourth switching transistor is connected with the second node, and a second electrode of the fourth switching transistor is connected with the initial signal end.
9. The pixel driving circuit according to claim 1, further comprising: a reset sub-circuit;
the input sub-circuit comprising: a first switching transistor, a control electrode of which is connected with a scanning signal end, a first electrode of which is connected with a data signal end, and a second electrode of which is connected with a first node;
the first storage sub-circuit comprising: a first capacitor; a first end of the first capacitor is connected with a first node, and a second end of the first capacitor is connected with a first power supply end;
the second storage sub-circuit comprising: a second capacitor; a first end of the second capacitor is connected with a second node, and a second end of the second capacitor is connected with a first power supply end;
the storage control sub-circuit includes: a control electrode of the second switching transistor is connected with the control signal end, a first electrode of the second switching transistor is connected with the first node, and a second electrode of the second switching transistor is connected with the second node;
the driving sub-circuit includes: a third switching transistor and a driving transistor; a control electrode of the third switching transistor is connected with the light-emitting control end, a first electrode of the third switching transistor is connected with a first power supply end, and a second electrode of the third switching transistor is connected with a first electrode of the driving transistor; the control electrode of the driving transistor is connected with the second node, and the second electrode of the driving transistor is connected with the third node;
the reset sub-circuit includes: and a control electrode of the fourth switching transistor is connected with the reset signal end, a first electrode of the fourth switching transistor is connected with the second node, and a second electrode of the fourth switching transistor is connected with the initial signal end.
10. A driving method of a pixel driving circuit, applied to the pixel driving circuit according to any one of claims 1 to 9, the driving method comprising:
in the pre-writing stage, the driving sub-circuit is controlled to drive the light-emitting element to emit light according to the signal of the light-emitting control end and the light-emitting signal which is stored by the second storage sub-circuit and is obtained according to the previous frame data signal; disconnecting the first memory sub-circuit and the second memory sub-circuit under the control of a signal of a control signal terminal; under the control of the signal of the scanning signal end, writing the current frame data signal of the data signal end into the first storage sub-circuit;
in the writing stage, under the control of the signal of the control signal end, the connection between the first storage sub-circuit and the second storage sub-circuit is conducted, and the light-emitting signal obtained according to the data signal of the current frame is written into the second storage sub-circuit.
11. The driving method according to claim 10, further comprising: in a reset phase between the pre-write phase and the write phase, the second storage sub-circuit is reset under the control of a signal of a reset control terminal.
12. A display device, comprising: a pixel drive circuit as claimed in any one of claims 1 to 9.
13. The display device according to claim 12, further comprising: a two-dimensional display control circuit and a three-dimensional display control circuit;
the two-dimensional display control circuit comprises a plurality of cascaded two-dimensional control sub-circuits, the input end of a first-level two-dimensional control sub-circuit is connected with an initial control signal end, the input end of an N + 1-level two-dimensional control sub-circuit is connected with the output end of an Nth-level two-dimensional control sub-circuit, and N is an integer greater than 0; the output end of any one level of two-dimensional control sub-circuit is connected with the light-emitting control end of one pixel driving circuit;
the three-dimensional display control circuit comprises a plurality of fifth switching transistors, the control electrode and the first electrode of any fifth switching transistor are connected with the three-dimensional display control end, and the second electrode is connected with the light-emitting control end of one pixel driving circuit.
14. A display control method of a display device, applied to the display device according to claim 13, comprising:
in a two-dimensional display mode, under the control of an initial control signal end and a three-dimensional display control end, providing a signal output by a two-dimensional display control circuit for a light-emitting control end of a pixel driving circuit;
in the three-dimensional display mode, under the control of the initial control signal end and the three-dimensional display control end, a signal of the three-dimensional display control end is provided for the light-emitting control end of the pixel driving circuit.
15. The display control method according to claim 14, further comprising: for any pixel driving circuit, under the control of a signal of a control signal end in a two-dimensional display mode, conducting a first node and a second node of the pixel driving circuit; and disconnecting the second node and the initial signal terminal under the control of the signal of the reset signal terminal.
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