CN110727681A - Data storage method and device - Google Patents

Data storage method and device Download PDF

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CN110727681A
CN110727681A CN201910922625.6A CN201910922625A CN110727681A CN 110727681 A CN110727681 A CN 110727681A CN 201910922625 A CN201910922625 A CN 201910922625A CN 110727681 A CN110727681 A CN 110727681A
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frequency domain
frequency
domain signal
signal
digital signal
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CN110727681B (en
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张益宁
于乐
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Beijing Zhidao Hechuang Technology Co Ltd
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Beijing Zhidao Hechuang Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/22Indexing; Data structures therefor; Storage structures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/23Updating
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/24Querying
    • G06F16/245Query processing
    • G06F16/2455Query execution
    • G06F16/24552Database cache management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/20Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
    • G06F16/27Replication, distribution or synchronisation of data between databases or within a distributed database system; Distributed database system architectures therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S40/00Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them
    • Y04S40/20Information technology specific aspects, e.g. CAD, simulation, modelling, system security

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Abstract

The application provides a data storage method and a data storage device, wherein the method comprises the following steps: acquiring a digital signal to be stored and a corresponding corrected sampling rate; carrying out time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal; determining the average phase shift between the frequency domain signal and the historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; processing the frequency domain signal by adopting an average phase shift pair to obtain a phase-shifted frequency domain signal; differential encoding is carried out on the frequency domain signals after phase shifting by adopting historical frequency domain signals, the frequency domain signals after differential encoding are stored in a storage area, and average phase shifting is adopted to process the frequency domain signals to obtain the frequency domain signals after phase shifting; and then, the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, and the frequency domain signals after differential coding are stored in a storage area, so that the storage capacity of digital signals to be stored is reduced.

Description

Data storage method and device
Technical Field
The present application relates to the field of data processing technologies, and in particular, to a data storage method and apparatus.
Background
In recent years, with the continuous development of power systems, the demand for data collected by a power consumption end is higher and higher, data items are increased, and the amount of information is increased. The lossless compression is to perform reversible transformation on data, then directly perform differential coding, determine the bit number occupied by each data after differential coding, determine the maximum bit number, and store each data according to the maximum bit number. However, data after differential encoding is generally large, resulting in a large maximum number of bits, and thus a large storage amount during lossless compression.
Disclosure of Invention
The object of the present application is to solve at least to some extent one of the above mentioned technical problems.
Therefore, a first objective of the present application is to provide a data storage method, which uses an average phase shift to process a frequency domain signal, so as to obtain a phase-shifted frequency domain signal; and then, the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, and the frequency domain signals after differential coding are stored in a storage area, so that the storage capacity of digital signals to be stored is reduced.
A second object of the present application is to propose a data storage device.
A third object of the present application is to propose another data storage device.
A fourth object of the present application is to propose a non-transitory computer-readable storage medium.
In order to achieve the above object, an embodiment of a first aspect of the present application provides a data storage method, including: acquiring a digital signal to be stored and a corresponding corrected sampling rate; the digital signal is a single-phase digital signal of voltage or current in a power grid; performing time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal; determining an average phase shift between the frequency domain signal and a historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length; processing the frequency domain signal by adopting the average phase shift pair to obtain a phase-shifted frequency domain signal; and differentially encoding the phase-shifted frequency domain signals by using the historical frequency domain signals, and storing the differentially encoded frequency domain signals into a storage area.
According to the data storage method, the digital signals to be stored and the corresponding corrected sampling rate are obtained; the digital signal is a single-phase digital signal of voltage or current in a power grid; performing time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal; determining an average phase shift between the frequency domain signal and a historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length; processing the frequency domain signal by adopting the average phase shift pair to obtain a phase-shifted frequency domain signal; carrying out differential encoding on the phase-shifted frequency domain signals by adopting the historical frequency domain signals, and storing the differentially encoded frequency domain signals into a storage area; and then, the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, and the frequency domain signals after differential coding are stored in a storage area, so that the storage capacity of digital signals to be stored is reduced.
To achieve the above object, an embodiment of a second aspect of the present application provides a data storage device, including: the acquisition module is used for acquiring the digital signal to be stored and the corresponding corrected sampling rate; the digital signal is a single-phase digital signal of voltage or current in a power grid; the transformation module is used for carrying out time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal; the phase shift calculation module is used for determining the average phase shift between the frequency domain signal and the historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length; the processing module is used for processing the frequency domain signal by adopting the average phase shift pair to obtain a phase-shifted frequency domain signal; and the coding module is used for carrying out differential coding on the frequency domain signals after the phase shifting by adopting the historical frequency domain signals and storing the frequency domain signals after the differential coding into a storage area.
The data storage device of the embodiment of the application acquires the digital signals to be stored and the corresponding sampling rate; the digital signal is a single-phase digital signal of voltage or current in a power grid; performing time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal; determining an average phase shift between the frequency domain signal and a historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length; processing the frequency domain signal by adopting the average phase shift pair to obtain a phase-shifted frequency domain signal; the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, the frequency domain signals after differential coding are stored in a storage area, and the device adopts average phase shifting to process the frequency domain signals to obtain the frequency domain signals after phase shifting; and then, the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, and the frequency domain signals after differential coding are stored in a storage area, so that the storage capacity of digital signals to be stored is reduced.
To achieve the above object, a third aspect of the present application provides another data storage device, including: memory, processor and computer program stored on the memory and executable on the processor, characterized in that the processor implements the data storage method as described above when executing the program.
In order to achieve the above object, a fourth aspect of the present application provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the data storage method as described above.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic flow chart diagram of a data storage method according to an embodiment of the present application;
FIG. 2 is a schematic flow chart diagram of a data storage method according to another embodiment of the present application;
FIG. 3 is a schematic flow chart diagram of a data storage method according to another embodiment of the present application;
FIG. 4 is a schematic diagram of a data storage device according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a data storage device according to another embodiment of the present application;
FIG. 6 is a schematic diagram of a data storage device according to yet another embodiment of the present application;
FIG. 7 is a schematic diagram of another data storage device according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present application and should not be construed as limiting the present application.
The data storage method and apparatus according to the embodiments of the present application are described below with reference to the drawings. The execution main body of the data storage method provided by the application is a data storage device, and the data storage device can be hardware equipment such as a server connected with each equipment end or software installed on the hardware equipment.
Fig. 1 is a schematic flowchart of a data storage method according to an embodiment of the present application. As shown in fig. 1, the data storage method includes the steps of:
step 101, acquiring a digital signal to be stored and a corresponding corrected sampling rate; the digital signal is a single-phase digital signal of voltage or current in the power grid.
It will be appreciated that in a power grid, voltage or current is transmitted in the form of three-phase electricity, for example, A, B, C phases. Thus, a single phase analog signal of the voltage or current in the grid can be obtained.
In the embodiment of the application, in order to reduce power consumption for obtaining voltage or current in a power grid and better analyze a single-phase analog signal, the single-phase analog signal of the voltage or the current in the power grid is subjected to strong-weak conversion to obtain a weak single-phase analog signal, then the weak single-phase analog signal is subjected to sampling, namely analog-to-digital conversion to obtain a single-phase digital signal of the voltage or the current in the power grid, the digital signal is used as a digital signal to be stored, wherein sampling frequency of the weak single-phase analog signal is used as an original sampling rate, and the corrected sampling rate is obtained after the original sampling rate is corrected.
And 102, performing time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal.
Furthermore, the time-frequency conversion is carried out on the acquired digital signals by combining with the corresponding sampling rate by adopting a preset algorithm. As an example, the digital signal is subjected to time-frequency conversion by Fast Fourier Transform (FFT) with a sampling rate, so as to obtain a frequency-domain signal. It should be noted that the preset algorithm may include, but is not limited to, FFT, wavelet transform, etc.
It will be appreciated that due to errors or clock jumps in the data storage device clock, for example, a clock that did not successfully perform the signal acquisition operation is skipped over, i.e., the acquisition of the analog signal is not performed exactly at the sample rate, and therefore calibration and adjustment of the original acquisition rate is required.
In the embodiment of the application, the original sampling rate of the digital signal and the alternating current frequency of the power grid are obtained; performing time-frequency transformation on the digital signal by combining the original sampling rate to obtain a frequency domain signal after the time-frequency transformation; obtaining an amplitude corresponding to the alternating current frequency in the frequency domain signal after time-frequency transformation; judging whether the amplitude is greater than or equal to a preset amplitude threshold value or not; and if the amplitude is smaller than the preset amplitude threshold, correcting the original sampling rate, and re-executing time-frequency transformation by combining the corrected sampling rate until the amplitude corresponding to the alternating current frequency in the frequency domain signal after the time-frequency transformation is larger than or equal to the preset amplitude threshold.
That is, because the accuracy of the ac frequency of the local power grid is high, the ac frequency of the local power grid can be obtained in advance, and the digital signal is subjected to time-frequency conversion by combining the original sampling rate to obtain a frequency domain signal after the time-frequency conversion; obtaining a corresponding amplitude value in the frequency domain signal after time-frequency transformation according to the alternating current frequency of the power grid, comparing the amplitude value with a preset amplitude value threshold, if the amplitude value is smaller than the preset amplitude value threshold, indicating that an error exists in the sampling rate corresponding to the digital signal, correcting the sampling rate, realizing re-sampling (re-sample) of the digital signal, and performing time-frequency transformation on the digital signal again by combining the corrected sampling rate until the amplitude value corresponding to the alternating current frequency in the frequency domain signal is larger than or equal to the preset amplitude value threshold.
In addition, after the digital signal is subjected to time-frequency transformation by combining the sampling rate to obtain a frequency domain signal, as an example, the frequency domain signal may be compared with a preset fault frequency domain signal to determine whether the frequency domain signal is matched with the fault frequency domain signal; and when the frequency domain signal is matched with the fault frequency domain signal, caching the frequency domain signal into a fault waveform cache region. If the frequency domain signal does not match the faulty frequency domain signal, execution continues with step 103.
As another example, the digital signal is compared with a preset fault time domain signal, and whether the digital signal is matched with the fault time domain signal is judged; and when the digital signal is matched with the fault time domain signal, caching the frequency domain signal corresponding to the digital signal into a fault waveform cache region. If the digital signal does not match the fault time domain signal, execution continues at step 103.
In the embodiment of the application, the frequency domain signal or the digital signal is compared with the corresponding preset fault signal, and when the frequency domain signal or the digital signal is matched with the fault signal, the corresponding frequency domain signal is cached in the fault waveform cache region, so that dual-redundancy storage of the frequency domain signal matched with the fault frequency domain signal can be ensured.
103, determining the average phase shift between the frequency domain signal and the historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is an integral multiple of the time length.
In the embodiment of the application, a group is taken as a delay unit, time-frequency transformation is performed on a group of digital signals in combination with a sampling rate each time to obtain a frequency domain signal, the digital signal before the current group is a historical digital signal, and the frequency domain signal corresponding to the historical digital signal is a historical frequency domain signal. For example, when the delay time is 1, the representative frequency domain signal is a previous set of historical frequency domain signals of the current frequency domain signal, and when the delay time is 5, the representative frequency domain signal is a fifth set of frequency domain signals before the current frequency domain signal. It should be noted that the time lengths of the digital signals of each group are the same, and the time difference between the digital signals and the historical digital signals is an integral multiple of the time lengths. Wherein, the time delay is integral multiple of the time delay.
Optionally, dividing the amplitude of each frequency point in the frequency domain signal by the amplitude of the corresponding frequency point in the historical frequency signal to determine the phase shift of each frequency point; and determining the arithmetic average value of the phase shift of each frequency point as the average phase shift.
And 104, processing the frequency domain signal by adopting the average phase shift pair to obtain a phase-shifted frequency domain signal.
It should be understood that, since there may be a phase difference between the current frequency-domain signal and the historical frequency-domain signal, for example, in the complex domain, when the frequency components of the signal are continuous in the time domain, the current frequency-domain signal is obtained by multiplying the historical frequency-domain signal by a complex number with a modulus of 1. Although the waveforms corresponding to the current frequency domain signal and the historical frequency domain signal do not change significantly, because the difference component of the relation of the sampling time difference is not zero, a phase shift exists, that is, the ratio of each pair of corresponding frequency components of the two sections of frequency domain signals is a complex number with a modulus of 1. Therefore, to eliminate this effect, the current frequency-domain signal may be divided by the average phase shift to obtain a phase-shifted frequency-domain signal.
And 105, differentially encoding the frequency domain signals subjected to phase shift by using the historical frequency domain signals, and storing the differentially encoded frequency domain signals into a storage area.
In the embodiment of the present application, as shown in fig. 2, the historical frequency domain signals are used to perform differential encoding on the phase-shifted frequency domain signals, and the differentially encoded frequency domain signals are stored in the storage area, which includes the following specific steps:
step 201, differential encoding is performed on the phase-shifted frequency domain signal by using the historical frequency domain signal, so as to obtain a differential encoded frequency domain signal.
Step 202, determining parameter information of the differentially encoded frequency domain signal, where the parameter information includes: sampling rate, average phase shift, the number of amplitude difference values of non-zero values and the number of bits occupied by each amplitude difference value; the amplitude difference is the difference between the frequency domain signal and the amplitude of the same frequency point in the frequency domain historical signal.
Step 203, storing the differentially encoded frequency domain signal and the parameter information into a storage area.
In the embodiment of the present application, when storing the frequency domain signal after differential encoding and the parameter information in the storage area, because the number of bits required for each frequency domain signal after differential encoding is different in different storage formats, as an example, when storing the frequency domain signal after differential encoding and the parameter information in the storage area by lossy compression, since the storage method does not need to store a very accurate frequency domain signal, the number of bits occupied by each amplitude difference in the parameter information is quantized, low bits are discarded, high bits that are constantly 0 are discarded together, and then the bits are stored. As another example, when the differentially encoded frequency domain signals and the parameter information are stored in the storage area by lossless compression, since the storage method needs to store the accurate frequency domain signals, the frequency domain signal with the largest amplitude in the differentially encoded frequency domain signals is first found, and the minimum number of bits required for storing the frequency domain signal is stored, for example, the high order bits are discarded, the low order bits are not discarded, and the number of bits required for storing the frequency domain signal is the largest because the amplitude of the frequency domain signal is the largest. Then, all the differentially encoded frequency domain signals and the parameter information are stored based on the number of bits. In addition, it should be noted that the differential encoding is variable length differential encoding, for example, the same number of bits (the number of bits occupied by each amplitude difference) is used for each digital signal; in addition, the number of bits used for different digital signals is different.
According to the data storage method, the digital signals to be stored and the corresponding corrected sampling rate are obtained; the digital signal is a single-phase digital signal of voltage or current in the power grid; carrying out time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal; determining the average phase shift between the frequency domain signal and the historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length; processing the frequency domain signal by adopting an average phase shift pair to obtain a phase-shifted frequency domain signal; differential encoding is carried out on the frequency domain signals after phase shifting by adopting historical frequency domain signals, the frequency domain signals after differential encoding are stored in a storage area, and average phase shifting is adopted to process the frequency domain signals to obtain the frequency domain signals after phase shifting; and then, the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, and the frequency domain signals after differential coding are stored in a storage area, so that the storage capacity of digital signals to be stored is reduced.
It can be understood that, in order to reduce the storage amount of the digital signals, the data storage device stores the frequency domain signals corresponding to the single-phase digital signals of the voltage or the current in the power grid in the manner of the above embodiment, and further, a user can query the data storage device to obtain the corresponding digital signals. Optionally, as shown in fig. 3, the specific steps are as follows:
step 301, receiving a digital signal query request, where the query request includes: a time period to be queried.
Step 302, inquiring the fault waveform buffer area or the storage area according to the inquiry request, and acquiring the frequency domain signal corresponding to the time period.
Step 303, determining a digital signal corresponding to the time period according to the frequency domain signal corresponding to the time period.
In the embodiment of the application, a query request of a user for a digital signal is received, and a fault waveform cache region or a storage region is queried according to the query request, so that a frequency domain signal corresponding to a time period is acquired. And carrying out frequency domain to time domain conversion on the frequency domain signal corresponding to the time period to obtain a digital signal corresponding to the time period. The query request may include, but is not limited to, a time period to be queried.
Corresponding to the data storage methods provided by the above embodiments, an embodiment of the present application further provides a data storage device, and since the data storage device provided by the embodiment of the present application corresponds to the data storage methods provided by the above embodiments, the implementation of the foregoing data storage method is also applicable to the data storage device provided by the present embodiment, and is not described in detail in the present embodiment. FIG. 4 is a schematic diagram of a data storage device according to an embodiment of the present application. As shown in fig. 4, the data storage device includes: an acquisition module 410, a transformation module 420, a phase shift calculation module 430, a processing module 440, an encoding module 450.
The acquiring module 410 is configured to acquire a digital signal to be stored and a corresponding sampling rate; the digital signal is a single-phase digital signal of voltage or current in the power grid; a transform module 420, configured to perform time-frequency transform on the digital signal in combination with the sampling rate to obtain a frequency domain signal; a phase shift calculation module 430, configured to determine an average phase shift between the frequency domain signal and the historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length; a processing module 440, configured to process the frequency domain signal by using the average phase shift to obtain a phase-shifted frequency domain signal; the encoding module 450 is configured to perform differential encoding on the phase-shifted frequency domain signal by using the historical frequency domain signal, and store the differentially encoded frequency domain signal in the storage area.
As a possible implementation manner of the embodiment of the present application, the obtaining module 410 is specifically configured to obtain an original sampling rate of a digital signal and an ac frequency of a power grid; performing time-frequency transformation on the digital signal by combining the original sampling rate to obtain a frequency domain signal after the time-frequency transformation; obtaining an amplitude corresponding to the alternating current frequency in the frequency domain signal after time-frequency transformation; judging whether the amplitude is greater than or equal to a preset amplitude threshold value or not; and if the amplitude is smaller than the preset amplitude threshold, correcting the original sampling rate, and re-executing time-frequency transformation by combining the corrected sampling rate until the amplitude corresponding to the alternating current frequency in the frequency domain signal after the time-frequency transformation is larger than or equal to the preset amplitude threshold.
As a possible implementation manner of the embodiment of the present application, the phase shift calculation module 430 is specifically configured to perform a division operation on the amplitude of each frequency point in the frequency domain signal and the amplitude of the corresponding frequency point in the historical frequency signal, so as to determine the phase shift of each frequency point; and determining the arithmetic average value of the phase shift of each frequency point as the average phase shift.
As a possible implementation manner of the embodiment of the present application, the encoding module 450 is specifically configured to perform differential encoding on the phase-shifted frequency domain signal by using the historical frequency domain signal to obtain a differentially encoded frequency domain signal; determining parameter information of the differentially encoded frequency domain signals, the parameter information comprising: sampling rate, average phase shift, the number of amplitude difference values of non-zero values and the number of bits occupied by each amplitude difference value; the amplitude difference value is the difference value of the amplitudes of the same frequency points in the frequency domain signal and the frequency domain historical signal; and storing the frequency domain signal after differential coding and the parameter information into a storage area.
As a possible implementation manner of the embodiment of the present application, as shown in fig. 5, on the basis of fig. 4, the data storage device further includes: an alignment module 460 and a storage module 470.
The comparing module 460 is configured to compare the frequency domain signal with a preset fault frequency domain signal, and determine whether the frequency domain signal matches the fault frequency domain signal; and the storage module 470 is configured to buffer the frequency domain signal into the fault waveform buffer when the frequency domain signal matches the fault frequency domain signal. A comparing module 460, configured to compare the digital signal with a preset fault time domain signal, and determine whether the digital signal is matched with the fault time domain signal; and the storage module 470 is configured to buffer the frequency domain signal into the fault waveform buffer when the digital signal matches the fault time domain signal.
As a possible implementation manner of the embodiment of the present application, as shown in fig. 6, on the basis of fig. 5, the data storage device further includes: a receiving module 480 and a querying module 490.
The receiving module 480 is configured to receive a digital signal query request, where the query request includes: a time period to be queried; the query module 490 is configured to query the fault waveform buffer or the storage area according to the query request, and obtain a frequency domain signal corresponding to the time period; the phase shift calculation module 430 is further configured to determine a digital signal corresponding to the time segment according to the frequency domain signal corresponding to the time segment.
The data storage device of the embodiment of the application acquires the digital signals to be stored and the corresponding sampling rate; the digital signal is a single-phase digital signal of voltage or current in a power grid; performing time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal; determining an average phase shift between the frequency domain signal and a historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length; processing the frequency domain signal by adopting the average phase shift pair to obtain a phase-shifted frequency domain signal; the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, the frequency domain signals after differential coding are stored in a storage area, and the device adopts average phase shifting to process the frequency domain signals to obtain the frequency domain signals after phase shifting; and then, the historical frequency domain signals are adopted to carry out differential coding on the frequency domain signals after phase shifting, and the frequency domain signals after differential coding are stored in a storage area, so that the storage capacity of digital signals to be stored is reduced.
In order to implement the foregoing embodiments, the present application further provides another data storage device, and fig. 7 is a schematic structural diagram of another data storage device provided in the embodiments of the present application. The data storage device includes:
memory 1001, processor 1002, and computer programs stored on memory 1001 and executable on processor 1002.
The processor 1002, when executing the program, implements the data storage method provided in the above-described embodiments.
Further, the data storage device further includes:
a communication interface 1003 for communicating between the memory 1001 and the processor 1002.
A memory 1001 for storing computer programs that may be run on the processor 1002.
Memory 1001 may include high-speed RAM memory and may also include non-volatile memory (e.g., at least one disk memory).
The processor 1002 is configured to implement the data storage method according to the foregoing embodiment when executing the program.
If the memory 1001, the processor 1002, and the communication interface 1003 are implemented independently, the communication interface 1003, the memory 1001, and the processor 1002 may be connected to each other through a bus and perform communication with each other. The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (Extended Industry Standard Architecture) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 7, but this is not intended to represent only one bus or type of bus.
Optionally, in a specific implementation, if the memory 1001, the processor 1002, and the communication interface 1003 are integrated on one chip, the memory 1001, the processor 1002, and the communication interface 1003 may complete communication with each other through an internal interface.
The processor 1002 may be a Central Processing Unit (CPU), an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits configured to implement embodiments of the present Application.
In order to implement the foregoing embodiments, the present application also proposes a non-transitory computer-readable storage medium on which a computer program is stored, which when executed by a processor implements the data storage method of the foregoing embodiments.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present application in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc. Although embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and that variations, modifications, substitutions and alterations may be made to the above embodiments by those of ordinary skill in the art within the scope of the present application.

Claims (14)

1. A method of storing data, comprising:
acquiring a digital signal to be stored and a corresponding corrected sampling rate; the digital signal is a single-phase digital signal of voltage or current in a power grid;
performing time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal;
determining an average phase shift between the frequency domain signal and a historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length;
processing the frequency domain signal by adopting the average phase shift pair to obtain a phase-shifted frequency domain signal;
and differentially encoding the phase-shifted frequency domain signals by using the historical frequency domain signals, and storing the differentially encoded frequency domain signals into a storage area.
2. The method of claim 1, wherein obtaining the digital signal to be stored and the corresponding corrected sampling rate comprises:
acquiring the original sampling rate of the digital signal and the alternating current frequency of the power grid;
performing time-frequency transformation on the digital signal by combining the original sampling rate to obtain a frequency domain signal after time-frequency transformation;
obtaining the amplitude corresponding to the alternating current frequency in the frequency domain signal after the time-frequency transformation;
judging whether the amplitude is greater than or equal to a preset amplitude threshold value or not;
and if the amplitude is smaller than a preset amplitude threshold, correcting the original sampling rate, and re-executing time-frequency transformation by combining the corrected sampling rate until the amplitude corresponding to the alternating current frequency in the frequency domain signal after the time-frequency transformation is larger than or equal to the preset amplitude threshold.
3. The method of claim 1, wherein determining the average phase shift between the frequency domain signal and the historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal comprises:
dividing the amplitude of each frequency point in the frequency domain signal by the amplitude of the corresponding frequency point in the historical frequency signal to determine the phase shift of each frequency point;
and determining the arithmetic average value of the phase shift of each frequency point as the average phase shift.
4. The method according to claim 1 or 2, wherein the differentially encoding the phase-shifted frequency-domain signals using the historical frequency-domain signals and storing the differentially encoded frequency-domain signals in a storage area comprises:
carrying out differential encoding on the phase-shifted frequency domain signals by adopting the historical frequency domain signals to obtain differentially encoded frequency domain signals;
determining parameter information of the differentially encoded frequency domain signals, the parameter information including: sampling rate, average phase shift, the number of amplitude difference values of non-zero values and the number of bits occupied by each amplitude difference value; the amplitude difference value is the difference value of the amplitudes of the same frequency points in the frequency domain signal and the frequency domain historical signal;
and storing the frequency domain signal subjected to differential coding and the parameter information into a storage area.
5. The method of claim 1, wherein after performing the time-frequency transform on the digital signal with the sampling rate to obtain a frequency-domain signal, the method further comprises:
comparing the frequency domain signal with a preset fault frequency domain signal, and judging whether the frequency domain signal is matched with the fault frequency domain signal; when the frequency domain signal is matched with the fault frequency domain signal, caching the frequency domain signal into a fault waveform cache region;
alternatively, the first and second electrodes may be,
comparing the digital signal with a preset fault time domain signal, and judging whether the digital signal is matched with the fault time domain signal; and when the digital signal is matched with the fault time domain signal, caching the frequency domain signal into a fault waveform cache region.
6. The method of claim 5, further comprising:
receiving a digital signal query request, the query request comprising: a time period to be queried;
inquiring a fault waveform cache region or the storage region according to the inquiry request, and acquiring a frequency domain signal corresponding to the time period;
and determining the digital signal corresponding to the time period according to the frequency domain signal corresponding to the time period.
7. A data storage device, comprising:
the acquisition module is used for acquiring the digital signal to be stored and the corresponding corrected sampling rate; the digital signal is a single-phase digital signal of voltage or current in a power grid;
the transformation module is used for carrying out time-frequency transformation on the digital signal by combining the sampling rate to obtain a frequency domain signal;
the phase shift calculation module is used for determining the average phase shift between the frequency domain signal and the historical frequency domain signal according to the historical frequency domain signal corresponding to the historical digital signal; the time length of the digital signal is the same as that of the historical digital signal, and the time difference value between the digital signal and the historical digital signal is integral multiple of the time length;
the processing module is used for processing the frequency domain signal by adopting the average phase shift to obtain a phase-shifted frequency domain signal;
and the coding module is used for carrying out differential coding on the frequency domain signals after the phase shifting by adopting the historical frequency domain signals and storing the frequency domain signals after the differential coding into a storage area.
8. The apparatus of claim 7, wherein the obtaining module is specifically configured to,
acquiring the original sampling rate of the digital signal and the alternating current frequency of the power grid;
performing time-frequency transformation on the digital signal by combining the original sampling rate to obtain a frequency domain signal after time-frequency transformation;
obtaining the amplitude corresponding to the alternating current frequency in the frequency domain signal after the time-frequency transformation;
judging whether the amplitude is greater than or equal to a preset amplitude threshold value or not;
and if the amplitude is smaller than a preset amplitude threshold, correcting the original sampling rate, and re-executing time-frequency transformation by combining the corrected sampling rate until the amplitude corresponding to the alternating current frequency in the frequency domain signal after the time-frequency transformation is larger than or equal to the preset amplitude threshold.
9. The apparatus of claim 7, wherein the phase shift computation module is specifically configured to,
dividing the amplitude of each frequency point in the frequency domain signal by the amplitude of the corresponding frequency point in the historical frequency signal to determine the phase shift of each frequency point;
and determining the arithmetic average value of the phase shift of each frequency point as the average phase shift.
10. The apparatus according to claim 7 or 8, characterized in that the coding module is specifically configured to,
carrying out differential encoding on the phase-shifted frequency domain signals by adopting the historical frequency domain signals to obtain differentially encoded frequency domain signals;
determining parameter information of the differentially encoded frequency domain signals, the parameter information including: sampling rate, average phase shift, the number of amplitude difference values of non-zero values and the number of bits occupied by each amplitude difference value; the amplitude difference value is the difference value of the amplitudes of the same frequency points in the frequency domain signal and the frequency domain historical signal;
and storing the frequency domain signal subjected to differential coding and the parameter information into a storage area.
11. The apparatus of claim 7, further comprising: the device comprises a comparison module and a storage module;
the comparison module is used for comparing the frequency domain signal with a preset fault frequency domain signal and judging whether the frequency domain signal is matched with the fault frequency domain signal;
the storage module is configured to cache the frequency domain signal in a fault waveform cache region when the frequency domain signal matches the fault frequency domain signal;
alternatively, the first and second electrodes may be,
the comparison module is used for comparing the digital signal with a preset fault time domain signal and judging whether the digital signal is matched with the fault time domain signal;
and the storage module is used for caching the frequency domain signal into a fault waveform cache region when the digital signal is matched with the fault time domain signal.
12. The apparatus of claim 11, further comprising: a receiving module and a query module;
the receiving module is configured to receive a digital signal query request, where the query request includes: a time period to be queried;
the query module is used for querying the fault waveform cache region or the storage region according to the query request and acquiring the frequency domain signal corresponding to the time period;
the phase shift calculation module is further configured to determine a digital signal corresponding to the time period according to the frequency domain signal corresponding to the time period.
13. A data storage device, comprising:
memory, processor and computer program stored on the memory and executable on the processor, characterized in that the processor implements the data storage method according to any of claims 1-6 when executing the program.
14. A non-transitory computer-readable storage medium on which a computer program is stored, the program, when executed by a processor, implementing a data storage method as claimed in any one of claims 1 to 6.
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